Commit | Line | Data |
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f8381cba TG |
1 | /* |
2 | * linux/kernel/time/tick-broadcast.c | |
3 | * | |
4 | * This file contains functions which emulate a local clock-event | |
5 | * device via a broadcast event source. | |
6 | * | |
7 | * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de> | |
8 | * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar | |
9 | * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner | |
10 | * | |
11 | * This code is licenced under the GPL version 2. For details see | |
12 | * kernel-base/COPYING. | |
13 | */ | |
14 | #include <linux/cpu.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/hrtimer.h> | |
17 | #include <linux/irq.h> | |
18 | #include <linux/percpu.h> | |
19 | #include <linux/profile.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/tick.h> | |
22 | ||
23 | #include "tick-internal.h" | |
24 | ||
25 | /* | |
26 | * Broadcast support for broken x86 hardware, where the local apic | |
27 | * timer stops in C3 state. | |
28 | */ | |
29 | ||
30 | struct tick_device tick_broadcast_device; | |
31 | static cpumask_t tick_broadcast_mask; | |
79bf2bb3 | 32 | static DEFINE_SPINLOCK(tick_broadcast_lock); |
f8381cba | 33 | |
5590a536 TG |
34 | #ifdef CONFIG_TICK_ONESHOT |
35 | static void tick_broadcast_clear_oneshot(int cpu); | |
36 | #else | |
37 | static inline void tick_broadcast_clear_oneshot(int cpu) { } | |
38 | #endif | |
39 | ||
289f480a IM |
40 | /* |
41 | * Debugging: see timer_list.c | |
42 | */ | |
43 | struct tick_device *tick_get_broadcast_device(void) | |
44 | { | |
45 | return &tick_broadcast_device; | |
46 | } | |
47 | ||
48 | cpumask_t *tick_get_broadcast_mask(void) | |
49 | { | |
50 | return &tick_broadcast_mask; | |
51 | } | |
52 | ||
f8381cba TG |
53 | /* |
54 | * Start the device in periodic mode | |
55 | */ | |
56 | static void tick_broadcast_start_periodic(struct clock_event_device *bc) | |
57 | { | |
18de5bc4 | 58 | if (bc) |
f8381cba TG |
59 | tick_setup_periodic(bc, 1); |
60 | } | |
61 | ||
62 | /* | |
63 | * Check, if the device can be utilized as broadcast device: | |
64 | */ | |
65 | int tick_check_broadcast_device(struct clock_event_device *dev) | |
66 | { | |
4a93232d VP |
67 | if ((tick_broadcast_device.evtdev && |
68 | tick_broadcast_device.evtdev->rating >= dev->rating) || | |
69 | (dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
f8381cba TG |
70 | return 0; |
71 | ||
72 | clockevents_exchange_device(NULL, dev); | |
73 | tick_broadcast_device.evtdev = dev; | |
74 | if (!cpus_empty(tick_broadcast_mask)) | |
75 | tick_broadcast_start_periodic(dev); | |
76 | return 1; | |
77 | } | |
78 | ||
79 | /* | |
80 | * Check, if the device is the broadcast device | |
81 | */ | |
82 | int tick_is_broadcast_device(struct clock_event_device *dev) | |
83 | { | |
84 | return (dev && tick_broadcast_device.evtdev == dev); | |
85 | } | |
86 | ||
87 | /* | |
88 | * Check, if the device is disfunctional and a place holder, which | |
89 | * needs to be handled by the broadcast device. | |
90 | */ | |
91 | int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu) | |
92 | { | |
93 | unsigned long flags; | |
94 | int ret = 0; | |
95 | ||
96 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
97 | ||
98 | /* | |
99 | * Devices might be registered with both periodic and oneshot | |
100 | * mode disabled. This signals, that the device needs to be | |
101 | * operated from the broadcast device and is a placeholder for | |
102 | * the cpu local device. | |
103 | */ | |
104 | if (!tick_device_is_functional(dev)) { | |
105 | dev->event_handler = tick_handle_periodic; | |
106 | cpu_set(cpu, tick_broadcast_mask); | |
107 | tick_broadcast_start_periodic(tick_broadcast_device.evtdev); | |
108 | ret = 1; | |
5590a536 TG |
109 | } else { |
110 | /* | |
111 | * When the new device is not affected by the stop | |
112 | * feature and the cpu is marked in the broadcast mask | |
113 | * then clear the broadcast bit. | |
114 | */ | |
115 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) { | |
116 | int cpu = smp_processor_id(); | |
f8381cba | 117 | |
5590a536 TG |
118 | cpu_clear(cpu, tick_broadcast_mask); |
119 | tick_broadcast_clear_oneshot(cpu); | |
120 | } | |
121 | } | |
f8381cba TG |
122 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
123 | return ret; | |
124 | } | |
125 | ||
126 | /* | |
127 | * Broadcast the event to the cpus, which are set in the mask | |
128 | */ | |
129 | int tick_do_broadcast(cpumask_t mask) | |
130 | { | |
131 | int ret = 0, cpu = smp_processor_id(); | |
132 | struct tick_device *td; | |
133 | ||
134 | /* | |
135 | * Check, if the current cpu is in the mask | |
136 | */ | |
137 | if (cpu_isset(cpu, mask)) { | |
138 | cpu_clear(cpu, mask); | |
139 | td = &per_cpu(tick_cpu_device, cpu); | |
140 | td->evtdev->event_handler(td->evtdev); | |
141 | ret = 1; | |
142 | } | |
143 | ||
144 | if (!cpus_empty(mask)) { | |
145 | /* | |
146 | * It might be necessary to actually check whether the devices | |
147 | * have different broadcast functions. For now, just use the | |
148 | * one of the first device. This works as long as we have this | |
149 | * misfeature only on x86 (lapic) | |
150 | */ | |
151 | cpu = first_cpu(mask); | |
152 | td = &per_cpu(tick_cpu_device, cpu); | |
153 | td->evtdev->broadcast(mask); | |
154 | ret = 1; | |
155 | } | |
156 | return ret; | |
157 | } | |
158 | ||
159 | /* | |
160 | * Periodic broadcast: | |
161 | * - invoke the broadcast handlers | |
162 | */ | |
163 | static void tick_do_periodic_broadcast(void) | |
164 | { | |
165 | cpumask_t mask; | |
166 | ||
167 | spin_lock(&tick_broadcast_lock); | |
168 | ||
169 | cpus_and(mask, cpu_online_map, tick_broadcast_mask); | |
170 | tick_do_broadcast(mask); | |
171 | ||
172 | spin_unlock(&tick_broadcast_lock); | |
173 | } | |
174 | ||
175 | /* | |
176 | * Event handler for periodic broadcast ticks | |
177 | */ | |
178 | static void tick_handle_periodic_broadcast(struct clock_event_device *dev) | |
179 | { | |
f8381cba TG |
180 | tick_do_periodic_broadcast(); |
181 | ||
182 | /* | |
183 | * The device is in periodic mode. No reprogramming necessary: | |
184 | */ | |
185 | if (dev->mode == CLOCK_EVT_MODE_PERIODIC) | |
186 | return; | |
187 | ||
188 | /* | |
189 | * Setup the next period for devices, which do not have | |
190 | * periodic mode: | |
191 | */ | |
192 | for (;;) { | |
193 | ktime_t next = ktime_add(dev->next_event, tick_period); | |
194 | ||
195 | if (!clockevents_program_event(dev, next, ktime_get())) | |
196 | return; | |
197 | tick_do_periodic_broadcast(); | |
198 | } | |
199 | } | |
200 | ||
201 | /* | |
202 | * Powerstate information: The system enters/leaves a state, where | |
203 | * affected devices might stop | |
204 | */ | |
205 | static void tick_do_broadcast_on_off(void *why) | |
206 | { | |
207 | struct clock_event_device *bc, *dev; | |
208 | struct tick_device *td; | |
209 | unsigned long flags, *reason = why; | |
210 | int cpu; | |
211 | ||
212 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
213 | ||
214 | cpu = smp_processor_id(); | |
215 | td = &per_cpu(tick_cpu_device, cpu); | |
216 | dev = td->evtdev; | |
217 | bc = tick_broadcast_device.evtdev; | |
218 | ||
219 | /* | |
1595f452 | 220 | * Is the device not affected by the powerstate ? |
f8381cba | 221 | */ |
1595f452 | 222 | if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
f8381cba TG |
223 | goto out; |
224 | ||
1595f452 TG |
225 | /* |
226 | * Defect device ? | |
227 | */ | |
228 | if (!tick_device_is_functional(dev)) { | |
229 | /* | |
230 | * AMD C1E wreckage fixup: | |
231 | * | |
232 | * Device was registered functional in the first | |
233 | * place. Now the secondary CPU detected the C1E | |
234 | * misfeature and notifies us to fix it up | |
235 | */ | |
236 | if (*reason != CLOCK_EVT_NOTIFY_BROADCAST_FORCE) | |
237 | goto out; | |
238 | } | |
239 | ||
240 | switch (*reason) { | |
241 | case CLOCK_EVT_NOTIFY_BROADCAST_ON: | |
242 | case CLOCK_EVT_NOTIFY_BROADCAST_FORCE: | |
f8381cba TG |
243 | if (!cpu_isset(cpu, tick_broadcast_mask)) { |
244 | cpu_set(cpu, tick_broadcast_mask); | |
245 | if (td->mode == TICKDEV_MODE_PERIODIC) | |
246 | clockevents_set_mode(dev, | |
247 | CLOCK_EVT_MODE_SHUTDOWN); | |
248 | } | |
1595f452 TG |
249 | break; |
250 | case CLOCK_EVT_NOTIFY_BROADCAST_OFF: | |
f8381cba TG |
251 | if (cpu_isset(cpu, tick_broadcast_mask)) { |
252 | cpu_clear(cpu, tick_broadcast_mask); | |
253 | if (td->mode == TICKDEV_MODE_PERIODIC) | |
254 | tick_setup_periodic(dev, 0); | |
255 | } | |
1595f452 | 256 | break; |
f8381cba TG |
257 | } |
258 | ||
259 | if (cpus_empty(tick_broadcast_mask)) | |
260 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); | |
261 | else { | |
262 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) | |
263 | tick_broadcast_start_periodic(bc); | |
79bf2bb3 TG |
264 | else |
265 | tick_broadcast_setup_oneshot(bc); | |
f8381cba TG |
266 | } |
267 | out: | |
268 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
269 | } | |
270 | ||
271 | /* | |
272 | * Powerstate information: The system enters/leaves a state, where | |
273 | * affected devices might stop. | |
274 | */ | |
275 | void tick_broadcast_on_off(unsigned long reason, int *oncpu) | |
276 | { | |
277 | int cpu = get_cpu(); | |
278 | ||
72fcde96 TG |
279 | if (!cpu_isset(*oncpu, cpu_online_map)) { |
280 | printk(KERN_ERR "tick-braodcast: ignoring broadcast for " | |
281 | "offline CPU #%d\n", *oncpu); | |
282 | } else { | |
283 | ||
284 | if (cpu == *oncpu) | |
285 | tick_do_broadcast_on_off(&reason); | |
286 | else | |
287 | smp_call_function_single(*oncpu, | |
288 | tick_do_broadcast_on_off, | |
289 | &reason, 1, 1); | |
290 | } | |
f8381cba TG |
291 | put_cpu(); |
292 | } | |
293 | ||
294 | /* | |
295 | * Set the periodic handler depending on broadcast on/off | |
296 | */ | |
297 | void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | |
298 | { | |
299 | if (!broadcast) | |
300 | dev->event_handler = tick_handle_periodic; | |
301 | else | |
302 | dev->event_handler = tick_handle_periodic_broadcast; | |
303 | } | |
304 | ||
305 | /* | |
306 | * Remove a CPU from broadcasting | |
307 | */ | |
308 | void tick_shutdown_broadcast(unsigned int *cpup) | |
309 | { | |
310 | struct clock_event_device *bc; | |
311 | unsigned long flags; | |
312 | unsigned int cpu = *cpup; | |
313 | ||
314 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
315 | ||
316 | bc = tick_broadcast_device.evtdev; | |
317 | cpu_clear(cpu, tick_broadcast_mask); | |
318 | ||
319 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) { | |
320 | if (bc && cpus_empty(tick_broadcast_mask)) | |
321 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); | |
322 | } | |
323 | ||
324 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
325 | } | |
79bf2bb3 | 326 | |
6321dd60 TG |
327 | void tick_suspend_broadcast(void) |
328 | { | |
329 | struct clock_event_device *bc; | |
330 | unsigned long flags; | |
331 | ||
332 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
333 | ||
334 | bc = tick_broadcast_device.evtdev; | |
18de5bc4 | 335 | if (bc) |
6321dd60 TG |
336 | clockevents_set_mode(bc, CLOCK_EVT_MODE_SHUTDOWN); |
337 | ||
338 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
339 | } | |
340 | ||
341 | int tick_resume_broadcast(void) | |
342 | { | |
343 | struct clock_event_device *bc; | |
344 | unsigned long flags; | |
345 | int broadcast = 0; | |
346 | ||
347 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
348 | ||
349 | bc = tick_broadcast_device.evtdev; | |
6321dd60 | 350 | |
cd05a1f8 | 351 | if (bc) { |
18de5bc4 TG |
352 | clockevents_set_mode(bc, CLOCK_EVT_MODE_RESUME); |
353 | ||
cd05a1f8 TG |
354 | switch (tick_broadcast_device.mode) { |
355 | case TICKDEV_MODE_PERIODIC: | |
356 | if(!cpus_empty(tick_broadcast_mask)) | |
357 | tick_broadcast_start_periodic(bc); | |
358 | broadcast = cpu_isset(smp_processor_id(), | |
359 | tick_broadcast_mask); | |
360 | break; | |
361 | case TICKDEV_MODE_ONESHOT: | |
362 | broadcast = tick_resume_broadcast_oneshot(bc); | |
363 | break; | |
364 | } | |
6321dd60 TG |
365 | } |
366 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
367 | ||
368 | return broadcast; | |
369 | } | |
370 | ||
371 | ||
79bf2bb3 TG |
372 | #ifdef CONFIG_TICK_ONESHOT |
373 | ||
374 | static cpumask_t tick_broadcast_oneshot_mask; | |
375 | ||
289f480a IM |
376 | /* |
377 | * Debugging: see timer_list.c | |
378 | */ | |
379 | cpumask_t *tick_get_broadcast_oneshot_mask(void) | |
380 | { | |
381 | return &tick_broadcast_oneshot_mask; | |
382 | } | |
383 | ||
79bf2bb3 TG |
384 | static int tick_broadcast_set_event(ktime_t expires, int force) |
385 | { | |
386 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | |
387 | ktime_t now = ktime_get(); | |
388 | int res; | |
389 | ||
390 | for(;;) { | |
391 | res = clockevents_program_event(bc, expires, now); | |
392 | if (!res || !force) | |
393 | return res; | |
394 | now = ktime_get(); | |
395 | expires = ktime_add(now, ktime_set(0, bc->min_delta_ns)); | |
396 | } | |
397 | } | |
398 | ||
cd05a1f8 TG |
399 | int tick_resume_broadcast_oneshot(struct clock_event_device *bc) |
400 | { | |
401 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
b7e113dc | 402 | return 0; |
cd05a1f8 TG |
403 | } |
404 | ||
79bf2bb3 TG |
405 | /* |
406 | * Reprogram the broadcast device: | |
407 | * | |
408 | * Called with tick_broadcast_lock held and interrupts disabled. | |
409 | */ | |
410 | static int tick_broadcast_reprogram(void) | |
411 | { | |
412 | ktime_t expires = { .tv64 = KTIME_MAX }; | |
413 | struct tick_device *td; | |
414 | int cpu; | |
415 | ||
416 | /* | |
417 | * Find the event which expires next: | |
418 | */ | |
419 | for (cpu = first_cpu(tick_broadcast_oneshot_mask); cpu != NR_CPUS; | |
420 | cpu = next_cpu(cpu, tick_broadcast_oneshot_mask)) { | |
421 | td = &per_cpu(tick_cpu_device, cpu); | |
422 | if (td->evtdev->next_event.tv64 < expires.tv64) | |
423 | expires = td->evtdev->next_event; | |
424 | } | |
425 | ||
426 | if (expires.tv64 == KTIME_MAX) | |
427 | return 0; | |
428 | ||
429 | return tick_broadcast_set_event(expires, 0); | |
430 | } | |
431 | ||
432 | /* | |
433 | * Handle oneshot mode broadcasting | |
434 | */ | |
435 | static void tick_handle_oneshot_broadcast(struct clock_event_device *dev) | |
436 | { | |
437 | struct tick_device *td; | |
438 | cpumask_t mask; | |
439 | ktime_t now; | |
440 | int cpu; | |
441 | ||
442 | spin_lock(&tick_broadcast_lock); | |
443 | again: | |
444 | dev->next_event.tv64 = KTIME_MAX; | |
445 | mask = CPU_MASK_NONE; | |
446 | now = ktime_get(); | |
447 | /* Find all expired events */ | |
448 | for (cpu = first_cpu(tick_broadcast_oneshot_mask); cpu != NR_CPUS; | |
449 | cpu = next_cpu(cpu, tick_broadcast_oneshot_mask)) { | |
450 | td = &per_cpu(tick_cpu_device, cpu); | |
451 | if (td->evtdev->next_event.tv64 <= now.tv64) | |
452 | cpu_set(cpu, mask); | |
453 | } | |
454 | ||
455 | /* | |
456 | * Wakeup the cpus which have an expired event. The broadcast | |
457 | * device is reprogrammed in the return from idle code. | |
458 | */ | |
459 | if (!tick_do_broadcast(mask)) { | |
460 | /* | |
461 | * The global event did not expire any CPU local | |
462 | * events. This happens in dyntick mode, as the | |
463 | * maximum PIT delta is quite small. | |
464 | */ | |
465 | if (tick_broadcast_reprogram()) | |
466 | goto again; | |
467 | } | |
468 | spin_unlock(&tick_broadcast_lock); | |
469 | } | |
470 | ||
471 | /* | |
472 | * Powerstate information: The system enters/leaves a state, where | |
473 | * affected devices might stop | |
474 | */ | |
475 | void tick_broadcast_oneshot_control(unsigned long reason) | |
476 | { | |
477 | struct clock_event_device *bc, *dev; | |
478 | struct tick_device *td; | |
479 | unsigned long flags; | |
480 | int cpu; | |
481 | ||
482 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
483 | ||
484 | /* | |
485 | * Periodic mode does not care about the enter/exit of power | |
486 | * states | |
487 | */ | |
488 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) | |
489 | goto out; | |
490 | ||
491 | bc = tick_broadcast_device.evtdev; | |
492 | cpu = smp_processor_id(); | |
493 | td = &per_cpu(tick_cpu_device, cpu); | |
494 | dev = td->evtdev; | |
495 | ||
496 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
497 | goto out; | |
498 | ||
499 | if (reason == CLOCK_EVT_NOTIFY_BROADCAST_ENTER) { | |
500 | if (!cpu_isset(cpu, tick_broadcast_oneshot_mask)) { | |
501 | cpu_set(cpu, tick_broadcast_oneshot_mask); | |
502 | clockevents_set_mode(dev, CLOCK_EVT_MODE_SHUTDOWN); | |
503 | if (dev->next_event.tv64 < bc->next_event.tv64) | |
504 | tick_broadcast_set_event(dev->next_event, 1); | |
505 | } | |
506 | } else { | |
507 | if (cpu_isset(cpu, tick_broadcast_oneshot_mask)) { | |
508 | cpu_clear(cpu, tick_broadcast_oneshot_mask); | |
509 | clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT); | |
510 | if (dev->next_event.tv64 != KTIME_MAX) | |
511 | tick_program_event(dev->next_event, 1); | |
512 | } | |
513 | } | |
514 | ||
515 | out: | |
516 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
517 | } | |
518 | ||
5590a536 TG |
519 | /* |
520 | * Reset the one shot broadcast for a cpu | |
521 | * | |
522 | * Called with tick_broadcast_lock held | |
523 | */ | |
524 | static void tick_broadcast_clear_oneshot(int cpu) | |
525 | { | |
526 | cpu_clear(cpu, tick_broadcast_oneshot_mask); | |
527 | } | |
528 | ||
79bf2bb3 TG |
529 | /** |
530 | * tick_broadcast_setup_highres - setup the broadcast device for highres | |
531 | */ | |
532 | void tick_broadcast_setup_oneshot(struct clock_event_device *bc) | |
533 | { | |
4a93232d VP |
534 | bc->event_handler = tick_handle_oneshot_broadcast; |
535 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
536 | bc->next_event.tv64 = KTIME_MAX; | |
79bf2bb3 TG |
537 | } |
538 | ||
539 | /* | |
540 | * Select oneshot operating mode for the broadcast device | |
541 | */ | |
542 | void tick_broadcast_switch_to_oneshot(void) | |
543 | { | |
544 | struct clock_event_device *bc; | |
545 | unsigned long flags; | |
546 | ||
547 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
548 | ||
549 | tick_broadcast_device.mode = TICKDEV_MODE_ONESHOT; | |
550 | bc = tick_broadcast_device.evtdev; | |
551 | if (bc) | |
552 | tick_broadcast_setup_oneshot(bc); | |
553 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
554 | } | |
555 | ||
556 | ||
557 | /* | |
558 | * Remove a dead CPU from broadcasting | |
559 | */ | |
560 | void tick_shutdown_broadcast_oneshot(unsigned int *cpup) | |
561 | { | |
79bf2bb3 TG |
562 | unsigned long flags; |
563 | unsigned int cpu = *cpup; | |
564 | ||
565 | spin_lock_irqsave(&tick_broadcast_lock, flags); | |
566 | ||
31d9b393 TG |
567 | /* |
568 | * Clear the broadcast mask flag for the dead cpu, but do not | |
569 | * stop the broadcast device! | |
570 | */ | |
79bf2bb3 TG |
571 | cpu_clear(cpu, tick_broadcast_oneshot_mask); |
572 | ||
79bf2bb3 TG |
573 | spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
574 | } | |
575 | ||
576 | #endif |