[x86] Resolve non-PIC undefweak symbols in executable
[deliverable/binutils-gdb.git] / ld / emultempl / armelf.em
CommitLineData
252b5132 1# This shell script emits a C file. -*- C -*-
6f2750fe 2# Copyright (C) 1991-2016 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
1db37fe6 31static char * thumb_entry_symbol = NULL;
e489d0ae 32static int byteswap_code = 0;
9c504268 33static int target1_is_rel = 0${TARGET1_IS_REL};
1db37fe6 34static char * target2_type = "${TARGET2_TYPE}";
319850b4 35static int fix_v4bx = 0;
33bfe774 36static int use_blx = 0;
c6dd86c6 37static bfd_arm_vfp11_fix vfp11_denorm_fix = BFD_ARM_VFP11_FIX_DEFAULT;
a504d23a 38static bfd_arm_stm32l4xx_fix stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
48229727 39static int fix_cortex_a8 = -1;
bf21ed78 40static int no_enum_size_warning = 0;
a9dc9481 41static int no_wchar_size_warning = 0;
27e55c4d 42static int pic_veneer = 0;
85fdf906 43static int merge_exidx_entries = -1;
2de70689 44static int fix_arm1176 = 1;
7ca69e9e 45
252b5132 46static void
0c7a8e5a 47gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
48{
49#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 50 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 51#endif /* not TARGET_ */
66be1055 52 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 53 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 54 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
252b5132
RH
55}
56
3940d2c3
NC
57static void
58gld${EMULATION_NAME}_set_symbols (void)
59{
60 /* PR 19106: The section resizing code in gldarmelf_after_allocation
61 is effectively the same as relaxation, so prevent early memory
62 region checks which produce bogus error messages.
63 Note - this test has nothing to do with symbols. It is just here
64 because this is the first emulation routine that is called after
65 the command line has been parsed. */
66 if (!bfd_link_relocatable (&link_info))
67 TARGET_ENABLE_RELAXATION;
68}
69
1220a729 70static void
0c7a8e5a 71arm_elf_before_allocation (void)
1220a729 72{
d504ffc8
DJ
73 bfd_elf32_arm_set_byteswap_code (&link_info, byteswap_code);
74
c6dd86c6
JB
75 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
76 due to architecture version. */
f13a99db 77 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 78
a504d23a
LA
79 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
80 unnecessary due to architecture version. */
81 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
82
48229727
JB
83 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
84 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
85
d504ffc8
DJ
86 /* We should be able to set the size of the interworking stub section. We
87 can't do it until later if we have dynamic sections, though. */
cbc704f3 88 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
89 {
90 /* Here we rummage through the found bfds to collect glue information. */
91 LANG_FOR_EACH_INPUT_STATEMENT (is)
92 {
c6dd86c6
JB
93 /* Initialise mapping tables for code/data. */
94 bfd_elf32_arm_init_maps (is->the_bfd);
95
d504ffc8 96 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 97 &link_info)
a504d23a
LA
98 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
99 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
100 &link_info))
252b5132
RH
101 /* xgettext:c-format */
102 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 103 }
3e6b1042
DJ
104
105 /* We have seen it all. Allocate it, and carry on. */
106 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 107 }
252b5132 108
063d4ee1
AM
109 /* Call the standard elf routine. */
110 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
111}
112
906e58ca
NC
113/* Fake input file for stubs. */
114static lang_input_statement_type *stub_file;
115
116/* Whether we need to call gldarm_layout_sections_again. */
117static int need_laying_out = 0;
118
119/* Maximum size of a group of input sections that can be handled by
120 one stub section. A value of +/-1 indicates the bfd back-end
121 should use a suitable default size. */
122static bfd_signed_vma group_size = 1;
123
124struct hook_stub_info
125{
126 lang_statement_list_type add;
127 asection *input_section;
128};
129
130/* Traverse the linker tree to find the spot where the stub goes. */
131
132static bfd_boolean
133hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
134{
135 lang_statement_union_type *l;
136 bfd_boolean ret;
137
138 for (; (l = *lp) != NULL; lp = &l->header.next)
139 {
140 switch (l->header.type)
141 {
142 case lang_constructors_statement_enum:
143 ret = hook_in_stub (info, &constructor_list.head);
144 if (ret)
145 return ret;
146 break;
147
148 case lang_output_section_statement_enum:
149 ret = hook_in_stub (info,
150 &l->output_section_statement.children.head);
151 if (ret)
152 return ret;
153 break;
154
155 case lang_wild_statement_enum:
156 ret = hook_in_stub (info, &l->wild_statement.children.head);
157 if (ret)
158 return ret;
159 break;
160
161 case lang_group_statement_enum:
162 ret = hook_in_stub (info, &l->group_statement.children.head);
163 if (ret)
164 return ret;
165 break;
166
167 case lang_input_section_enum:
168 if (l->input_section.section == info->input_section)
169 {
170 /* We've found our section. Insert the stub immediately
07d72278
DJ
171 after its associated input section. */
172 *(info->add.tail) = l->header.next;
173 l->header.next = info->add.head;
906e58ca
NC
174 return TRUE;
175 }
176 break;
177
178 case lang_data_statement_enum:
179 case lang_reloc_statement_enum:
180 case lang_object_symbols_statement_enum:
181 case lang_output_statement_enum:
182 case lang_target_statement_enum:
183 case lang_input_statement_enum:
184 case lang_assignment_statement_enum:
185 case lang_padding_statement_enum:
186 case lang_address_statement_enum:
187 case lang_fill_statement_enum:
188 break;
189
190 default:
191 FAIL ();
192 break;
193 }
194 }
195 return FALSE;
196}
197
198
199/* Call-back for elf32_arm_size_stubs. */
200
201/* Create a new stub section, and arrange for it to be linked
07d72278 202 immediately after INPUT_SECTION. */
906e58ca
NC
203
204static asection *
7a89b94e
NC
205elf32_arm_add_stub_section (const char * stub_sec_name,
206 asection * input_section,
207 unsigned int alignment_power)
906e58ca
NC
208{
209 asection *stub_sec;
210 flagword flags;
211 asection *output_section;
906e58ca
NC
212 lang_output_section_statement_type *os;
213 struct hook_stub_info info;
214
906e58ca
NC
215 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
216 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
217 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
218 stub_sec_name, flags);
219 if (stub_sec == NULL)
906e58ca
NC
220 goto err_ret;
221
7a89b94e 222 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca
NC
223
224 output_section = input_section->output_section;
24ef1aa7 225 os = lang_output_section_get (output_section);
906e58ca
NC
226
227 info.input_section = input_section;
228 lang_list_init (&info.add);
b9c361e0 229 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
230
231 if (info.add.head == NULL)
232 goto err_ret;
233
234 if (hook_in_stub (&info, &os->children.head))
235 return stub_sec;
236
237 err_ret:
238 einfo ("%X%P: can not make stub section: %E\n");
239 return NULL;
240}
241
242/* Another call-back for elf_arm_size_stubs. */
243
6f798e5c 244static void
906e58ca
NC
245gldarm_layout_sections_again (void)
246{
247 /* If we have changed sizes of the stub sections, then we need
248 to recalculate all the section offsets. This may mean we need to
249 add even more stubs. */
250 gld${EMULATION_NAME}_map_segments (TRUE);
251 need_laying_out = -1;
252}
253
254static void
255build_section_lists (lang_statement_union_type *statement)
256{
257 if (statement->header.type == lang_input_section_enum)
258 {
259 asection *i = statement->input_section.section;
260
dbaa2011 261 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
262 && (i->flags & SEC_EXCLUDE) == 0
263 && i->output_section != NULL
264 && i->output_section->owner == link_info.output_bfd)
265 elf32_arm_next_input_section (& link_info, i);
266 }
267}
268
2468f9c9
PB
269static int
270compare_output_sec_vma (const void *a, const void *b)
271{
272 asection *asec = *(asection **) a, *bsec = *(asection **) b;
273 asection *aout = asec->output_section, *bout = bsec->output_section;
274 bfd_vma avma, bvma;
e2caaa1f 275
2468f9c9
PB
276 /* If there's no output section for some reason, compare equal. */
277 if (!aout || !bout)
278 return 0;
e2caaa1f 279
2468f9c9
PB
280 avma = aout->vma + asec->output_offset;
281 bvma = bout->vma + bsec->output_offset;
e2caaa1f 282
2468f9c9
PB
283 if (avma > bvma)
284 return 1;
285 else if (avma < bvma)
286 return -1;
e2caaa1f 287
2468f9c9
PB
288 return 0;
289}
290
906e58ca 291static void
eaeb0a9d 292gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 293{
75938853
AM
294 int ret;
295
491d01d3
YU
296 /* Build a sorted list of input text sections, then use that to process
297 the unwind table index. */
298 unsigned int list_size = 10;
299 asection **sec_list = (asection **)
300 xmalloc (list_size * sizeof (asection *));
301 unsigned int sec_count = 0;
302
303 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 304 {
491d01d3
YU
305 bfd *abfd = is->the_bfd;
306 asection *sec;
e2caaa1f 307
491d01d3
YU
308 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
309 continue;
e2caaa1f 310
491d01d3
YU
311 for (sec = abfd->sections; sec != NULL; sec = sec->next)
312 {
313 asection *out_sec = sec->output_section;
314
315 if (out_sec
316 && elf_section_data (sec)
317 && elf_section_type (sec) == SHT_PROGBITS
318 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
319 && (sec->flags & SEC_EXCLUDE) == 0
320 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
321 && out_sec != bfd_abs_section_ptr)
2468f9c9 322 {
491d01d3 323 if (sec_count == list_size)
2468f9c9 324 {
491d01d3
YU
325 list_size *= 2;
326 sec_list = (asection **)
327 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 328 }
491d01d3
YU
329
330 sec_list[sec_count++] = sec;
2468f9c9
PB
331 }
332 }
491d01d3 333 }
e2caaa1f 334
491d01d3 335 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 336
491d01d3
YU
337 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
338 merge_exidx_entries))
339 need_laying_out = 1;
e2caaa1f 340
491d01d3 341 free (sec_list);
6f798e5c 342
906e58ca
NC
343 /* bfd_elf32_discard_info just plays with debugging sections,
344 ie. doesn't affect any code, so we can delay resizing the
345 sections. It's likely we'll resize everything in the process of
346 adding stubs. */
75938853
AM
347 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
348 if (ret < 0)
349 {
350 einfo ("%X%P: .eh_frame/.stab edit: %E\n");
351 return;
352 }
353 else if (ret > 0)
906e58ca
NC
354 need_laying_out = 1;
355
356 /* If generating a relocatable output file, then we don't
357 have to examine the relocs. */
0e1862bb 358 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 359 {
75938853 360 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
361 if (ret != 0)
362 {
363 if (ret < 0)
364 {
1a51c1a4 365 einfo ("%X%P: could not compute sections lists for stub generation: %E\n");
906e58ca
NC
366 return;
367 }
368
369 lang_for_each_statement (build_section_lists);
370
371 /* Call into the BFD backend to do the real work. */
372 if (! elf32_arm_size_stubs (link_info.output_bfd,
373 stub_file->the_bfd,
374 & link_info,
375 group_size,
376 & elf32_arm_add_stub_section,
377 & gldarm_layout_sections_again))
378 {
1a51c1a4 379 einfo ("%X%P: cannot size stub section: %E\n");
906e58ca
NC
380 return;
381 }
382 }
383 }
384
385 if (need_laying_out != -1)
386 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
387}
388
389static void
390gld${EMULATION_NAME}_finish (void)
391{
392 struct bfd_link_hash_entry * h;
393
394 {
395 LANG_FOR_EACH_INPUT_STATEMENT (is)
396 {
397 /* Figure out where VFP11 erratum veneers (and the labels returning
398 from same) have been placed. */
399 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
400
401 /* Figure out where STM32L4XX erratum veneers (and the labels returning
402 from them) have been placed. */
403 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
404 }
405 }
906e58ca 406
0e1862bb 407 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
408 {
409 /* Now build the linker stubs. */
410 if (stub_file->the_bfd->sections != NULL)
411 {
412 if (! elf32_arm_build_stubs (& link_info))
413 einfo ("%X%P: can not build stubs: %E\n");
414 }
415 }
416
417 finish_default ();
c56feb2b 418
1d022697
PB
419 if (thumb_entry_symbol)
420 {
421 h = bfd_link_hash_lookup (link_info.hash, thumb_entry_symbol,
422 FALSE, FALSE, TRUE);
423 }
424 else
425 {
426 struct elf_link_hash_entry * eh;
427
428 if (!entry_symbol.name)
429 return;
430
431 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
432 FALSE, FALSE, TRUE);
433 eh = (struct elf_link_hash_entry *)h;
35fc36a8 434 if (!h || eh->target_internal != ST_BRANCH_TO_THUMB)
1d022697
PB
435 return;
436 }
0c7a8e5a 437
6f798e5c
NC
438
439 if (h != (struct bfd_link_hash_entry *) NULL
440 && (h->type == bfd_link_hash_defined
441 || h->type == bfd_link_hash_defweak)
442 && h->u.def.section->output_section != NULL)
443 {
444 static char buffer[32];
88f7bcd5 445 bfd_vma val;
0c7a8e5a 446
88f7bcd5
NC
447 /* Special procesing is required for a Thumb entry symbol. The
448 bottom bit of its address must be set. */
449 val = (h->u.def.value
f13a99db 450 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
451 h->u.def.section->output_section)
452 + h->u.def.section->output_offset);
0c7a8e5a 453
88f7bcd5 454 val |= 1;
6f798e5c 455
88f7bcd5 456 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 457 where the lang_finish() function will pick it up. */
88f7bcd5
NC
458 buffer[0] = '0';
459 buffer[1] = 'x';
0c7a8e5a 460
88f7bcd5 461 sprintf_vma (buffer + 2, val);
6f798e5c 462
1d022697
PB
463 if (thumb_entry_symbol != NULL && entry_symbol.name != NULL
464 && entry_from_cmdline)
88f7bcd5
NC
465 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
466 thumb_entry_symbol, entry_symbol.name);
467 entry_symbol.name = buffer;
6f798e5c 468 }
88f7bcd5 469 else
6241fe3d 470 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
88f7bcd5 471 thumb_entry_symbol);
6f798e5c
NC
472}
473
bf21ed78 474/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
475 After the output has been created, but before inputs are read. */
476static void
477arm_elf_create_output_section_statements (void)
478{
b8976b05
NC
479 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
480 {
481 /* The arm backend needs special fields in the output hash structure.
482 These will only be created if the output format is an arm format,
483 hence we do not support linking and changing output formats at the
484 same time. Use a link followed by objcopy to change output formats. */
485 einfo ("%F%X%P: error: Cannot change output format whilst linking ARM binaries.\n");
486 return;
487 }
488
f13a99db
AM
489 bfd_elf32_arm_set_target_relocs (link_info.output_bfd, &link_info,
490 target1_is_rel,
bf21ed78 491 target2_type, fix_v4bx, use_blx,
a504d23a
LA
492 vfp11_denorm_fix, stm32l4xx_fix,
493 no_enum_size_warning,
a9dc9481 494 no_wchar_size_warning,
e2caaa1f 495 pic_veneer, fix_cortex_a8,
2de70689 496 fix_arm1176);
906e58ca
NC
497
498 stub_file = lang_add_input_file ("linker stubs",
499 lang_input_file_is_fake_enum,
500 NULL);
501 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
502 if (stub_file->the_bfd == NULL
503 || ! bfd_set_arch_mach (stub_file->the_bfd,
504 bfd_get_arch (link_info.output_bfd),
505 bfd_get_mach (link_info.output_bfd)))
506 {
507 einfo ("%X%P: can not create BFD %E\n");
508 return;
509 }
e2caaa1f 510
906e58ca
NC
511 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
512 ldlang_add_file (stub_file);
3e6b1042
DJ
513
514 /* Also use the stub file for stubs placed in a single output section. */
515 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
516 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
517}
518
519/* Avoid processing the fake stub_file in vercheck, stat_needed and
520 check_needed routines. */
521
522static void (*real_func) (lang_input_statement_type *);
523
524static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
525{
526 if (l != stub_file)
527 (*real_func) (l);
3674e28a
PB
528}
529
906e58ca
NC
530static void
531arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
532{
533 real_func = func;
534 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
535}
536
537#define lang_for_each_input_file arm_lang_for_each_input_file
538
252b5132
RH
539EOF
540
41392f03
AM
541# Define some shell vars to insert bits of code into the standard elf
542# parse_args and list_options functions.
543#
544PARSE_AND_LIST_PROLOGUE='
545#define OPTION_THUMB_ENTRY 301
e489d0ae 546#define OPTION_BE8 302
9c504268
PB
547#define OPTION_TARGET1_REL 303
548#define OPTION_TARGET1_ABS 304
3674e28a 549#define OPTION_TARGET2 305
33bfe774
JB
550#define OPTION_FIX_V4BX 306
551#define OPTION_USE_BLX 307
c6dd86c6 552#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 553#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 554#define OPTION_PIC_VENEER 310
845b51d6 555#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 556#define OPTION_STUBGROUP_SIZE 312
a9dc9481 557#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
558#define OPTION_FIX_CORTEX_A8 314
559#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 560#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
561#define OPTION_FIX_ARM1176 317
562#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 563#define OPTION_LONG_PLT 319
a504d23a 564#define OPTION_STM32L4XX_FIX 320
41392f03 565'
252b5132 566
ef5bdbd1 567PARSE_AND_LIST_SHORTOPTS=p
252b5132 568
41392f03
AM
569PARSE_AND_LIST_LONGOPTS='
570 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
571 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 572 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
573 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
574 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 575 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 576 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 577 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 578 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 579 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 580 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 581 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 582 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 583 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 584 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
585 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
586 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 587 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
588 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
589 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 590 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
41392f03 591'
252b5132 592
41392f03 593PARSE_AND_LIST_OPTIONS='
442996ee 594 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 595 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
596 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
597 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
598 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
599 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 600 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
601 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
602 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 603 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 604 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 605 " enum sizes\n"));
a272e28c 606 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 607 " wchar_t sizes\n"));
442996ee 608 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
609 fprintf (file, _(" --long-plt Generate long .plt entries\n"
610 " to handle large .plt/.got displacements\n"));
906e58ca 611 fprintf (file, _("\
a272e28c
NC
612 --stub-group-size=N Maximum size of a group of input sections that\n\
613 can be handled by one stub section. A negative\n\
614 value locates all stubs after their branches\n\
615 (with a group size of -N), while a positive\n\
616 value allows two groups of input sections, one\n\
617 before, and one after each stub section.\n\
618 Values of +/-1 indicate the linker should\n\
619 choose suitable defaults.\n"));
48229727 620 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 621 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 622 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 623'
252b5132 624
41392f03
AM
625PARSE_AND_LIST_ARGS_CASES='
626 case '\'p\'':
dea514f5 627 /* Only here for backwards compatibility. */
41392f03 628 break;
252b5132 629
41392f03
AM
630 case OPTION_THUMB_ENTRY:
631 thumb_entry_symbol = optarg;
632 break;
e489d0ae
PB
633
634 case OPTION_BE8:
635 byteswap_code = 1;
636 break;
9c504268
PB
637
638 case OPTION_TARGET1_REL:
639 target1_is_rel = 1;
640 break;
641
642 case OPTION_TARGET1_ABS:
643 target1_is_rel = 0;
644 break;
3674e28a
PB
645
646 case OPTION_TARGET2:
647 target2_type = optarg;
648 break;
319850b4
JB
649
650 case OPTION_FIX_V4BX:
651 fix_v4bx = 1;
652 break;
33bfe774 653
845b51d6
PB
654 case OPTION_FIX_V4BX_INTERWORKING:
655 fix_v4bx = 2;
656 break;
657
33bfe774
JB
658 case OPTION_USE_BLX:
659 use_blx = 1;
660 break;
92b93329 661
c6dd86c6
JB
662 case OPTION_VFP11_DENORM_FIX:
663 if (strcmp (optarg, "none") == 0)
664 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
665 else if (strcmp (optarg, "scalar") == 0)
666 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
667 else if (strcmp (optarg, "vector") == 0)
668 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
669 else
670 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
671 break;
bf21ed78 672
a504d23a
LA
673 case OPTION_STM32L4XX_FIX:
674 if (!optarg)
675 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
676 else if (strcmp (optarg, "none") == 0)
677 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
678 else if (strcmp (optarg, "default") == 0)
679 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
680 else if (strcmp (optarg, "all") == 0)
681 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
682 else
683 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
684 break;
685
bf21ed78
MS
686 case OPTION_NO_ENUM_SIZE_WARNING:
687 no_enum_size_warning = 1;
688 break;
27e55c4d 689
a9dc9481
JM
690 case OPTION_NO_WCHAR_SIZE_WARNING:
691 no_wchar_size_warning = 1;
692 break;
693
27e55c4d
PB
694 case OPTION_PIC_VENEER:
695 pic_veneer = 1;
696 break;
906e58ca
NC
697
698 case OPTION_STUBGROUP_SIZE:
699 {
700 const char *end;
701
702 group_size = bfd_scan_vma (optarg, &end, 0);
703 if (*end)
704 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
705 }
706 break;
48229727
JB
707
708 case OPTION_FIX_CORTEX_A8:
709 fix_cortex_a8 = 1;
710 break;
711
712 case OPTION_NO_FIX_CORTEX_A8:
713 fix_cortex_a8 = 0;
714 break;
85fdf906
AH
715
716 case OPTION_NO_MERGE_EXIDX_ENTRIES:
717 merge_exidx_entries = 0;
2de70689 718 break;
85fdf906 719
2de70689
MGD
720 case OPTION_FIX_ARM1176:
721 fix_arm1176 = 1;
722 break;
723
724 case OPTION_NO_FIX_ARM1176:
725 fix_arm1176 = 0;
726 break;
1db37fe6
YG
727
728 case OPTION_LONG_PLT:
729 bfd_elf32_arm_use_long_plt ();
730 break;
41392f03 731'
252b5132 732
3e6b1042 733# We have our own before_allocation etc. functions, but they call
41392f03 734# the standard routines, so give them a different name.
41392f03 735LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 736LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 737LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 738
41392f03
AM
739# Replace the elf before_parse function with our own.
740LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 741LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 742
41392f03 743# Call the extra arm-elf function
906e58ca 744LDEMUL_FINISH=gld${EMULATION_NAME}_finish
This page took 0.70209 seconds and 4 git commands to generate.