Use %pI, %pR, %pS, %pT in place of %I, %R, %S and %T.
[deliverable/binutils-gdb.git] / ld / emultempl / armelf.em
CommitLineData
252b5132 1# This shell script emits a C file. -*- C -*-
219d1afa 2# Copyright (C) 1991-2018 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
68c39892
TP
31static struct elf32_arm_params params =
32{
33 NULL, /* thumb_entry_symbol */
34 0, /* byteswap_code */
35 0${TARGET1_IS_REL}, /* target1_is_rel */
36 "${TARGET2_TYPE}", /* target2_type */
37 0, /* fix_v4bx */
38 0, /* use_blx */
39 BFD_ARM_VFP11_FIX_DEFAULT, /* vfp11_denorm_fix */
40 BFD_ARM_STM32L4XX_FIX_NONE, /* stm32l4xx_fix */
41 0, /* no_enum_size_warning */
42 0, /* no_wchar_size_warning */
43 0, /* pic_veneer */
44 -1, /* fix_cortex_a8 */
45 1, /* fix_arm1176 */
46 -1, /* merge_exidx_entries */
47 0, /* cmse_implib */
48 NULL /* in_implib_bfd */
49};
0955507f 50static char *in_implib_filename = NULL;
7ca69e9e 51
252b5132 52static void
0c7a8e5a 53gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
54{
55#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 56 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 57#endif /* not TARGET_ */
66be1055 58 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 59 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 60 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
5c3261b0 61 link_info.check_relocs_after_open_input = TRUE;
576438f0 62 link_info.relro = DEFAULT_LD_Z_RELRO;
252b5132
RH
63}
64
3940d2c3
NC
65static void
66gld${EMULATION_NAME}_set_symbols (void)
67{
68 /* PR 19106: The section resizing code in gldarmelf_after_allocation
69 is effectively the same as relaxation, so prevent early memory
70 region checks which produce bogus error messages.
71 Note - this test has nothing to do with symbols. It is just here
72 because this is the first emulation routine that is called after
73 the command line has been parsed. */
74 if (!bfd_link_relocatable (&link_info))
75 TARGET_ENABLE_RELAXATION;
76}
77
1220a729 78static void
0c7a8e5a 79arm_elf_before_allocation (void)
1220a729 80{
68c39892 81 bfd_elf32_arm_set_byteswap_code (&link_info, params.byteswap_code);
d504ffc8 82
c6dd86c6
JB
83 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
84 due to architecture version. */
f13a99db 85 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 86
a504d23a
LA
87 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
88 unnecessary due to architecture version. */
89 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
90
48229727
JB
91 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
92 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
93
daa4adae
TP
94 /* Ensure the output sections of veneers needing a dedicated one is not
95 removed. */
96 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
97
d504ffc8
DJ
98 /* We should be able to set the size of the interworking stub section. We
99 can't do it until later if we have dynamic sections, though. */
cbc704f3 100 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
101 {
102 /* Here we rummage through the found bfds to collect glue information. */
103 LANG_FOR_EACH_INPUT_STATEMENT (is)
104 {
6c19b93b
AM
105 /* Initialise mapping tables for code/data. */
106 bfd_elf32_arm_init_maps (is->the_bfd);
c6dd86c6 107
d504ffc8 108 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 109 &link_info)
a504d23a
LA
110 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
111 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
112 &link_info))
252b5132
RH
113 /* xgettext:c-format */
114 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 115 }
3e6b1042
DJ
116
117 /* We have seen it all. Allocate it, and carry on. */
118 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 119 }
252b5132 120
063d4ee1
AM
121 /* Call the standard elf routine. */
122 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
123}
124
906e58ca
NC
125/* Fake input file for stubs. */
126static lang_input_statement_type *stub_file;
127
128/* Whether we need to call gldarm_layout_sections_again. */
129static int need_laying_out = 0;
130
131/* Maximum size of a group of input sections that can be handled by
132 one stub section. A value of +/-1 indicates the bfd back-end
133 should use a suitable default size. */
134static bfd_signed_vma group_size = 1;
135
136struct hook_stub_info
137{
138 lang_statement_list_type add;
139 asection *input_section;
140};
141
142/* Traverse the linker tree to find the spot where the stub goes. */
143
144static bfd_boolean
145hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
146{
147 lang_statement_union_type *l;
148 bfd_boolean ret;
149
150 for (; (l = *lp) != NULL; lp = &l->header.next)
151 {
152 switch (l->header.type)
153 {
154 case lang_constructors_statement_enum:
155 ret = hook_in_stub (info, &constructor_list.head);
156 if (ret)
157 return ret;
158 break;
159
160 case lang_output_section_statement_enum:
161 ret = hook_in_stub (info,
162 &l->output_section_statement.children.head);
163 if (ret)
164 return ret;
165 break;
166
167 case lang_wild_statement_enum:
168 ret = hook_in_stub (info, &l->wild_statement.children.head);
169 if (ret)
170 return ret;
171 break;
172
173 case lang_group_statement_enum:
174 ret = hook_in_stub (info, &l->group_statement.children.head);
175 if (ret)
176 return ret;
177 break;
178
179 case lang_input_section_enum:
180 if (l->input_section.section == info->input_section)
181 {
182 /* We've found our section. Insert the stub immediately
07d72278
DJ
183 after its associated input section. */
184 *(info->add.tail) = l->header.next;
185 l->header.next = info->add.head;
906e58ca
NC
186 return TRUE;
187 }
188 break;
189
190 case lang_data_statement_enum:
191 case lang_reloc_statement_enum:
192 case lang_object_symbols_statement_enum:
193 case lang_output_statement_enum:
194 case lang_target_statement_enum:
195 case lang_input_statement_enum:
196 case lang_assignment_statement_enum:
197 case lang_padding_statement_enum:
198 case lang_address_statement_enum:
199 case lang_fill_statement_enum:
200 break;
201
202 default:
203 FAIL ();
204 break;
205 }
206 }
207 return FALSE;
208}
209
210
211/* Call-back for elf32_arm_size_stubs. */
212
213/* Create a new stub section, and arrange for it to be linked
07d72278 214 immediately after INPUT_SECTION. */
906e58ca
NC
215
216static asection *
7a89b94e 217elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
218 asection * output_section,
219 asection * after_input_section,
7a89b94e 220 unsigned int alignment_power)
906e58ca
NC
221{
222 asection *stub_sec;
223 flagword flags;
906e58ca
NC
224 lang_output_section_statement_type *os;
225 struct hook_stub_info info;
226
906e58ca
NC
227 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
228 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
229 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
230 stub_sec_name, flags);
231 if (stub_sec == NULL)
906e58ca
NC
232 goto err_ret;
233
7a89b94e 234 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca 235
24ef1aa7 236 os = lang_output_section_get (output_section);
906e58ca 237
6bde4c52 238 info.input_section = after_input_section;
906e58ca 239 lang_list_init (&info.add);
b9c361e0 240 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
241
242 if (info.add.head == NULL)
243 goto err_ret;
244
6bde4c52
TP
245 if (after_input_section == NULL)
246 {
247 lang_statement_union_type **lp = &os->children.head;
248 lang_statement_union_type *l, *lprev = NULL;
249
250 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
251
252 if (lprev)
253 lprev->header.next = info.add.head;
254 else
255 os->children.head = info.add.head;
256
257 return stub_sec;
258 }
259 else
260 {
261 if (hook_in_stub (&info, &os->children.head))
262 return stub_sec;
263 }
906e58ca
NC
264
265 err_ret:
d003af55 266 einfo (_("%X%P: can not make stub section: %E\n"));
906e58ca
NC
267 return NULL;
268}
269
270/* Another call-back for elf_arm_size_stubs. */
271
6f798e5c 272static void
906e58ca
NC
273gldarm_layout_sections_again (void)
274{
275 /* If we have changed sizes of the stub sections, then we need
276 to recalculate all the section offsets. This may mean we need to
277 add even more stubs. */
278 gld${EMULATION_NAME}_map_segments (TRUE);
279 need_laying_out = -1;
280}
281
282static void
283build_section_lists (lang_statement_union_type *statement)
284{
285 if (statement->header.type == lang_input_section_enum)
286 {
287 asection *i = statement->input_section.section;
288
dbaa2011 289 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
290 && (i->flags & SEC_EXCLUDE) == 0
291 && i->output_section != NULL
292 && i->output_section->owner == link_info.output_bfd)
293 elf32_arm_next_input_section (& link_info, i);
294 }
295}
296
2468f9c9
PB
297static int
298compare_output_sec_vma (const void *a, const void *b)
299{
300 asection *asec = *(asection **) a, *bsec = *(asection **) b;
301 asection *aout = asec->output_section, *bout = bsec->output_section;
302 bfd_vma avma, bvma;
e2caaa1f 303
2468f9c9
PB
304 /* If there's no output section for some reason, compare equal. */
305 if (!aout || !bout)
306 return 0;
e2caaa1f 307
2468f9c9
PB
308 avma = aout->vma + asec->output_offset;
309 bvma = bout->vma + bsec->output_offset;
e2caaa1f 310
2468f9c9
PB
311 if (avma > bvma)
312 return 1;
313 else if (avma < bvma)
314 return -1;
e2caaa1f 315
2468f9c9
PB
316 return 0;
317}
318
906e58ca 319static void
eaeb0a9d 320gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 321{
75938853
AM
322 int ret;
323
491d01d3
YU
324 /* Build a sorted list of input text sections, then use that to process
325 the unwind table index. */
326 unsigned int list_size = 10;
327 asection **sec_list = (asection **)
328 xmalloc (list_size * sizeof (asection *));
329 unsigned int sec_count = 0;
330
331 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 332 {
491d01d3
YU
333 bfd *abfd = is->the_bfd;
334 asection *sec;
e2caaa1f 335
491d01d3
YU
336 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
337 continue;
e2caaa1f 338
491d01d3
YU
339 for (sec = abfd->sections; sec != NULL; sec = sec->next)
340 {
341 asection *out_sec = sec->output_section;
342
343 if (out_sec
344 && elf_section_data (sec)
345 && elf_section_type (sec) == SHT_PROGBITS
346 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
347 && (sec->flags & SEC_EXCLUDE) == 0
348 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
349 && out_sec != bfd_abs_section_ptr)
2468f9c9 350 {
491d01d3 351 if (sec_count == list_size)
2468f9c9 352 {
491d01d3
YU
353 list_size *= 2;
354 sec_list = (asection **)
355 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 356 }
491d01d3
YU
357
358 sec_list[sec_count++] = sec;
2468f9c9
PB
359 }
360 }
491d01d3 361 }
e2caaa1f 362
491d01d3 363 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 364
491d01d3 365 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
68c39892 366 params.merge_exidx_entries))
491d01d3 367 need_laying_out = 1;
e2caaa1f 368
491d01d3 369 free (sec_list);
6f798e5c 370
906e58ca
NC
371 /* bfd_elf32_discard_info just plays with debugging sections,
372 ie. doesn't affect any code, so we can delay resizing the
373 sections. It's likely we'll resize everything in the process of
374 adding stubs. */
75938853
AM
375 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
376 if (ret < 0)
377 {
d003af55 378 einfo (_("%X%P: .eh_frame/.stab edit: %E\n"));
75938853
AM
379 return;
380 }
381 else if (ret > 0)
906e58ca
NC
382 need_laying_out = 1;
383
384 /* If generating a relocatable output file, then we don't
385 have to examine the relocs. */
0e1862bb 386 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 387 {
75938853 388 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
389 if (ret != 0)
390 {
391 if (ret < 0)
392 {
d003af55
AM
393 einfo (_("%X%P: could not compute sections lists "
394 "for stub generation: %E\n"));
906e58ca
NC
395 return;
396 }
397
398 lang_for_each_statement (build_section_lists);
399
400 /* Call into the BFD backend to do the real work. */
401 if (! elf32_arm_size_stubs (link_info.output_bfd,
402 stub_file->the_bfd,
403 & link_info,
404 group_size,
405 & elf32_arm_add_stub_section,
406 & gldarm_layout_sections_again))
407 {
d003af55 408 einfo (_("%X%P: cannot size stub section: %E\n"));
906e58ca
NC
409 return;
410 }
411 }
412 }
413
414 if (need_laying_out != -1)
415 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
416}
417
418static void
419gld${EMULATION_NAME}_finish (void)
420{
421 struct bfd_link_hash_entry * h;
422
423 {
424 LANG_FOR_EACH_INPUT_STATEMENT (is)
425 {
6c19b93b
AM
426 /* Figure out where VFP11 erratum veneers (and the labels returning
427 from same) have been placed. */
428 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
429
430 /* Figure out where STM32L4XX erratum veneers (and the labels returning
431 from them) have been placed. */
432 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
433 }
434 }
906e58ca 435
0e1862bb 436 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
437 {
438 /* Now build the linker stubs. */
439 if (stub_file->the_bfd->sections != NULL)
440 {
441 if (! elf32_arm_build_stubs (& link_info))
d003af55 442 einfo (_("%X%P: can not build stubs: %E\n"));
906e58ca
NC
443 }
444 }
445
446 finish_default ();
c56feb2b 447
68c39892 448 if (params.thumb_entry_symbol)
1d022697 449 {
68c39892 450 h = bfd_link_hash_lookup (link_info.hash, params.thumb_entry_symbol,
1d022697
PB
451 FALSE, FALSE, TRUE);
452 }
453 else
454 {
455 struct elf_link_hash_entry * eh;
456
457 if (!entry_symbol.name)
458 return;
459
460 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
461 FALSE, FALSE, TRUE);
462 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
463 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
464 != ST_BRANCH_TO_THUMB)
1d022697
PB
465 return;
466 }
0c7a8e5a 467
6f798e5c
NC
468
469 if (h != (struct bfd_link_hash_entry *) NULL
470 && (h->type == bfd_link_hash_defined
471 || h->type == bfd_link_hash_defweak)
472 && h->u.def.section->output_section != NULL)
473 {
474 static char buffer[32];
88f7bcd5 475 bfd_vma val;
0c7a8e5a 476
88f7bcd5
NC
477 /* Special procesing is required for a Thumb entry symbol. The
478 bottom bit of its address must be set. */
479 val = (h->u.def.value
f13a99db 480 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
481 h->u.def.section->output_section)
482 + h->u.def.section->output_offset);
0c7a8e5a 483
88f7bcd5 484 val |= 1;
6f798e5c 485
88f7bcd5 486 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 487 where the lang_finish() function will pick it up. */
88f7bcd5
NC
488 buffer[0] = '0';
489 buffer[1] = 'x';
0c7a8e5a 490
88f7bcd5 491 sprintf_vma (buffer + 2, val);
6f798e5c 492
68c39892 493 if (params.thumb_entry_symbol != NULL && entry_symbol.name != NULL
1d022697 494 && entry_from_cmdline)
88f7bcd5 495 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
68c39892 496 params.thumb_entry_symbol, entry_symbol.name);
88f7bcd5 497 entry_symbol.name = buffer;
6f798e5c 498 }
88f7bcd5 499 else
6241fe3d 500 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
68c39892 501 params.thumb_entry_symbol);
6f798e5c
NC
502}
503
bf21ed78 504/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
505 After the output has been created, but before inputs are read. */
506static void
507arm_elf_create_output_section_statements (void)
508{
b8976b05
NC
509 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
510 {
511 /* The arm backend needs special fields in the output hash structure.
512 These will only be created if the output format is an arm format,
513 hence we do not support linking and changing output formats at the
514 same time. Use a link followed by objcopy to change output formats. */
d003af55
AM
515 einfo (_("%F%X%P: error: Cannot change output format "
516 "whilst linking ARM binaries.\n"));
b8976b05
NC
517 return;
518 }
519
0955507f
TP
520 if (in_implib_filename)
521 {
68c39892
TP
522 params.in_implib_bfd = bfd_openr (in_implib_filename,
523 bfd_get_target (link_info.output_bfd));
0955507f 524
68c39892 525 if (params.in_implib_bfd == NULL)
d003af55 526 einfo (_("%F%s: Can't open: %E\n"), in_implib_filename);
0955507f 527
68c39892 528 if (!bfd_check_format (params.in_implib_bfd, bfd_object))
d003af55 529 einfo (_("%F%s: Not a relocatable file: %E\n"), in_implib_filename);
0955507f 530 }
0955507f 531
68c39892 532 bfd_elf32_arm_set_target_params (link_info.output_bfd, &link_info, &params);
906e58ca
NC
533
534 stub_file = lang_add_input_file ("linker stubs",
6c19b93b
AM
535 lang_input_file_is_fake_enum,
536 NULL);
906e58ca
NC
537 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
538 if (stub_file->the_bfd == NULL
539 || ! bfd_set_arch_mach (stub_file->the_bfd,
6c19b93b
AM
540 bfd_get_arch (link_info.output_bfd),
541 bfd_get_mach (link_info.output_bfd)))
906e58ca 542 {
d003af55 543 einfo (_("%X%P: can not create BFD %E\n"));
906e58ca
NC
544 return;
545 }
e2caaa1f 546
906e58ca
NC
547 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
548 ldlang_add_file (stub_file);
3e6b1042
DJ
549
550 /* Also use the stub file for stubs placed in a single output section. */
551 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
552 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
553}
554
555/* Avoid processing the fake stub_file in vercheck, stat_needed and
556 check_needed routines. */
557
558static void (*real_func) (lang_input_statement_type *);
559
560static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
561{
562 if (l != stub_file)
563 (*real_func) (l);
3674e28a
PB
564}
565
906e58ca
NC
566static void
567arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
568{
569 real_func = func;
570 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
571}
572
573#define lang_for_each_input_file arm_lang_for_each_input_file
574
252b5132
RH
575EOF
576
41392f03
AM
577# Define some shell vars to insert bits of code into the standard elf
578# parse_args and list_options functions.
579#
580PARSE_AND_LIST_PROLOGUE='
581#define OPTION_THUMB_ENTRY 301
e489d0ae 582#define OPTION_BE8 302
9c504268
PB
583#define OPTION_TARGET1_REL 303
584#define OPTION_TARGET1_ABS 304
3674e28a 585#define OPTION_TARGET2 305
33bfe774
JB
586#define OPTION_FIX_V4BX 306
587#define OPTION_USE_BLX 307
c6dd86c6 588#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 589#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 590#define OPTION_PIC_VENEER 310
845b51d6 591#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 592#define OPTION_STUBGROUP_SIZE 312
a9dc9481 593#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
594#define OPTION_FIX_CORTEX_A8 314
595#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 596#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
597#define OPTION_FIX_ARM1176 317
598#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 599#define OPTION_LONG_PLT 319
a504d23a 600#define OPTION_STM32L4XX_FIX 320
54ddd295 601#define OPTION_CMSE_IMPLIB 321
0955507f 602#define OPTION_IN_IMPLIB 322
41392f03 603'
252b5132 604
ef5bdbd1 605PARSE_AND_LIST_SHORTOPTS=p
252b5132 606
41392f03
AM
607PARSE_AND_LIST_LONGOPTS='
608 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
609 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 610 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
611 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
612 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 613 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 614 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 615 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 616 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 617 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 618 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 619 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 620 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 621 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 622 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
623 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
624 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 625 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
626 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
627 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 628 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 629 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
0955507f 630 { "in-implib", required_argument, NULL, OPTION_IN_IMPLIB },
41392f03 631'
252b5132 632
41392f03 633PARSE_AND_LIST_OPTIONS='
442996ee 634 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 635 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
636 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
637 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
638 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
639 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 640 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
641 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
642 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 643 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 644 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 645 " enum sizes\n"));
a272e28c 646 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 647 " wchar_t sizes\n"));
442996ee 648 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
649 fprintf (file, _(" --long-plt Generate long .plt entries\n"
650 " to handle large .plt/.got displacements\n"));
54ddd295
TP
651 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
652 " library as per ARMv8-M Security Extensions\n"));
0955507f
TP
653 fprintf (file, _(" --in-implib Import library whose symbols address must\n"
654 " remain stable\n"));
906e58ca 655 fprintf (file, _("\
a272e28c
NC
656 --stub-group-size=N Maximum size of a group of input sections that\n\
657 can be handled by one stub section. A negative\n\
658 value locates all stubs after their branches\n\
659 (with a group size of -N), while a positive\n\
660 value allows two groups of input sections, one\n\
661 before, and one after each stub section.\n\
662 Values of +/-1 indicate the linker should\n\
663 choose suitable defaults.\n"));
48229727 664 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 665 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 666 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 667'
252b5132 668
41392f03
AM
669PARSE_AND_LIST_ARGS_CASES='
670 case '\'p\'':
dea514f5 671 /* Only here for backwards compatibility. */
41392f03 672 break;
252b5132 673
41392f03 674 case OPTION_THUMB_ENTRY:
68c39892 675 params.thumb_entry_symbol = optarg;
41392f03 676 break;
e489d0ae
PB
677
678 case OPTION_BE8:
68c39892 679 params.byteswap_code = 1;
e489d0ae 680 break;
9c504268
PB
681
682 case OPTION_TARGET1_REL:
68c39892 683 params.target1_is_rel = 1;
9c504268
PB
684 break;
685
686 case OPTION_TARGET1_ABS:
68c39892 687 params.target1_is_rel = 0;
9c504268 688 break;
3674e28a
PB
689
690 case OPTION_TARGET2:
68c39892 691 params.target2_type = optarg;
3674e28a 692 break;
319850b4
JB
693
694 case OPTION_FIX_V4BX:
68c39892 695 params.fix_v4bx = 1;
319850b4 696 break;
33bfe774 697
845b51d6 698 case OPTION_FIX_V4BX_INTERWORKING:
68c39892 699 params.fix_v4bx = 2;
845b51d6
PB
700 break;
701
33bfe774 702 case OPTION_USE_BLX:
68c39892 703 params.use_blx = 1;
33bfe774 704 break;
92b93329 705
c6dd86c6
JB
706 case OPTION_VFP11_DENORM_FIX:
707 if (strcmp (optarg, "none") == 0)
6c19b93b 708 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
c6dd86c6 709 else if (strcmp (optarg, "scalar") == 0)
6c19b93b 710 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
c6dd86c6 711 else if (strcmp (optarg, "vector") == 0)
6c19b93b 712 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
c6dd86c6 713 else
6c19b93b 714 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
c6dd86c6 715 break;
bf21ed78 716
a504d23a
LA
717 case OPTION_STM32L4XX_FIX:
718 if (!optarg)
6c19b93b 719 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 720 else if (strcmp (optarg, "none") == 0)
6c19b93b 721 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
a504d23a 722 else if (strcmp (optarg, "default") == 0)
6c19b93b 723 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 724 else if (strcmp (optarg, "all") == 0)
6c19b93b 725 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
a504d23a 726 else
6c19b93b 727 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
a504d23a
LA
728 break;
729
bf21ed78 730 case OPTION_NO_ENUM_SIZE_WARNING:
68c39892 731 params.no_enum_size_warning = 1;
bf21ed78 732 break;
27e55c4d 733
a9dc9481 734 case OPTION_NO_WCHAR_SIZE_WARNING:
68c39892 735 params.no_wchar_size_warning = 1;
a9dc9481
JM
736 break;
737
27e55c4d 738 case OPTION_PIC_VENEER:
68c39892 739 params.pic_veneer = 1;
27e55c4d 740 break;
906e58ca
NC
741
742 case OPTION_STUBGROUP_SIZE:
743 {
744 const char *end;
745
6c19b93b
AM
746 group_size = bfd_scan_vma (optarg, &end, 0);
747 if (*end)
906e58ca
NC
748 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
749 }
750 break;
48229727
JB
751
752 case OPTION_FIX_CORTEX_A8:
68c39892 753 params.fix_cortex_a8 = 1;
48229727
JB
754 break;
755
756 case OPTION_NO_FIX_CORTEX_A8:
68c39892 757 params.fix_cortex_a8 = 0;
48229727 758 break;
85fdf906
AH
759
760 case OPTION_NO_MERGE_EXIDX_ENTRIES:
68c39892 761 params.merge_exidx_entries = 0;
2de70689 762 break;
85fdf906 763
2de70689 764 case OPTION_FIX_ARM1176:
68c39892 765 params.fix_arm1176 = 1;
2de70689
MGD
766 break;
767
768 case OPTION_NO_FIX_ARM1176:
68c39892 769 params.fix_arm1176 = 0;
2de70689 770 break;
1db37fe6
YG
771
772 case OPTION_LONG_PLT:
773 bfd_elf32_arm_use_long_plt ();
774 break;
54ddd295
TP
775
776 case OPTION_CMSE_IMPLIB:
68c39892 777 params.cmse_implib = 1;
54ddd295 778 break;
0955507f
TP
779
780 case OPTION_IN_IMPLIB:
781 in_implib_filename = optarg;
782 break;
41392f03 783'
252b5132 784
3e6b1042 785# We have our own before_allocation etc. functions, but they call
41392f03 786# the standard routines, so give them a different name.
41392f03 787LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 788LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 789LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 790
41392f03
AM
791# Replace the elf before_parse function with our own.
792LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 793LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 794
41392f03 795# Call the extra arm-elf function
906e58ca 796LDEMUL_FINISH=gld${EMULATION_NAME}_finish
This page took 0.816813 seconds and 4 git commands to generate.