Place .shstrtab section after .symtab and .strtab, thus restoring monotonically incre...
[deliverable/binutils-gdb.git] / ld / emultempl / armelf.em
CommitLineData
252b5132 1# This shell script emits a C file. -*- C -*-
6f2750fe 2# Copyright (C) 1991-2016 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
1db37fe6 31static char * thumb_entry_symbol = NULL;
e489d0ae 32static int byteswap_code = 0;
9c504268 33static int target1_is_rel = 0${TARGET1_IS_REL};
1db37fe6 34static char * target2_type = "${TARGET2_TYPE}";
319850b4 35static int fix_v4bx = 0;
33bfe774 36static int use_blx = 0;
c6dd86c6 37static bfd_arm_vfp11_fix vfp11_denorm_fix = BFD_ARM_VFP11_FIX_DEFAULT;
a504d23a 38static bfd_arm_stm32l4xx_fix stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
48229727 39static int fix_cortex_a8 = -1;
bf21ed78 40static int no_enum_size_warning = 0;
a9dc9481 41static int no_wchar_size_warning = 0;
27e55c4d 42static int pic_veneer = 0;
85fdf906 43static int merge_exidx_entries = -1;
2de70689 44static int fix_arm1176 = 1;
54ddd295 45static int cmse_implib = 0;
7ca69e9e 46
252b5132 47static void
0c7a8e5a 48gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
49{
50#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 51 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 52#endif /* not TARGET_ */
66be1055 53 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 54 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 55 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
252b5132
RH
56}
57
3940d2c3
NC
58static void
59gld${EMULATION_NAME}_set_symbols (void)
60{
61 /* PR 19106: The section resizing code in gldarmelf_after_allocation
62 is effectively the same as relaxation, so prevent early memory
63 region checks which produce bogus error messages.
64 Note - this test has nothing to do with symbols. It is just here
65 because this is the first emulation routine that is called after
66 the command line has been parsed. */
67 if (!bfd_link_relocatable (&link_info))
68 TARGET_ENABLE_RELAXATION;
69}
70
1220a729 71static void
0c7a8e5a 72arm_elf_before_allocation (void)
1220a729 73{
d504ffc8
DJ
74 bfd_elf32_arm_set_byteswap_code (&link_info, byteswap_code);
75
c6dd86c6
JB
76 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
77 due to architecture version. */
f13a99db 78 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 79
a504d23a
LA
80 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
81 unnecessary due to architecture version. */
82 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
83
48229727
JB
84 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
85 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
86
daa4adae
TP
87 /* Ensure the output sections of veneers needing a dedicated one is not
88 removed. */
89 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
90
d504ffc8
DJ
91 /* We should be able to set the size of the interworking stub section. We
92 can't do it until later if we have dynamic sections, though. */
cbc704f3 93 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
94 {
95 /* Here we rummage through the found bfds to collect glue information. */
96 LANG_FOR_EACH_INPUT_STATEMENT (is)
97 {
c6dd86c6
JB
98 /* Initialise mapping tables for code/data. */
99 bfd_elf32_arm_init_maps (is->the_bfd);
100
d504ffc8 101 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 102 &link_info)
a504d23a
LA
103 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
104 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
105 &link_info))
252b5132
RH
106 /* xgettext:c-format */
107 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 108 }
3e6b1042
DJ
109
110 /* We have seen it all. Allocate it, and carry on. */
111 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 112 }
252b5132 113
063d4ee1
AM
114 /* Call the standard elf routine. */
115 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
116}
117
906e58ca
NC
118/* Fake input file for stubs. */
119static lang_input_statement_type *stub_file;
120
121/* Whether we need to call gldarm_layout_sections_again. */
122static int need_laying_out = 0;
123
124/* Maximum size of a group of input sections that can be handled by
125 one stub section. A value of +/-1 indicates the bfd back-end
126 should use a suitable default size. */
127static bfd_signed_vma group_size = 1;
128
129struct hook_stub_info
130{
131 lang_statement_list_type add;
132 asection *input_section;
133};
134
135/* Traverse the linker tree to find the spot where the stub goes. */
136
137static bfd_boolean
138hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
139{
140 lang_statement_union_type *l;
141 bfd_boolean ret;
142
143 for (; (l = *lp) != NULL; lp = &l->header.next)
144 {
145 switch (l->header.type)
146 {
147 case lang_constructors_statement_enum:
148 ret = hook_in_stub (info, &constructor_list.head);
149 if (ret)
150 return ret;
151 break;
152
153 case lang_output_section_statement_enum:
154 ret = hook_in_stub (info,
155 &l->output_section_statement.children.head);
156 if (ret)
157 return ret;
158 break;
159
160 case lang_wild_statement_enum:
161 ret = hook_in_stub (info, &l->wild_statement.children.head);
162 if (ret)
163 return ret;
164 break;
165
166 case lang_group_statement_enum:
167 ret = hook_in_stub (info, &l->group_statement.children.head);
168 if (ret)
169 return ret;
170 break;
171
172 case lang_input_section_enum:
173 if (l->input_section.section == info->input_section)
174 {
175 /* We've found our section. Insert the stub immediately
07d72278
DJ
176 after its associated input section. */
177 *(info->add.tail) = l->header.next;
178 l->header.next = info->add.head;
906e58ca
NC
179 return TRUE;
180 }
181 break;
182
183 case lang_data_statement_enum:
184 case lang_reloc_statement_enum:
185 case lang_object_symbols_statement_enum:
186 case lang_output_statement_enum:
187 case lang_target_statement_enum:
188 case lang_input_statement_enum:
189 case lang_assignment_statement_enum:
190 case lang_padding_statement_enum:
191 case lang_address_statement_enum:
192 case lang_fill_statement_enum:
193 break;
194
195 default:
196 FAIL ();
197 break;
198 }
199 }
200 return FALSE;
201}
202
203
204/* Call-back for elf32_arm_size_stubs. */
205
206/* Create a new stub section, and arrange for it to be linked
07d72278 207 immediately after INPUT_SECTION. */
906e58ca
NC
208
209static asection *
7a89b94e 210elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
211 asection * output_section,
212 asection * after_input_section,
7a89b94e 213 unsigned int alignment_power)
906e58ca
NC
214{
215 asection *stub_sec;
216 flagword flags;
906e58ca
NC
217 lang_output_section_statement_type *os;
218 struct hook_stub_info info;
219
906e58ca
NC
220 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
221 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
222 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
223 stub_sec_name, flags);
224 if (stub_sec == NULL)
906e58ca
NC
225 goto err_ret;
226
7a89b94e 227 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca 228
24ef1aa7 229 os = lang_output_section_get (output_section);
906e58ca 230
6bde4c52 231 info.input_section = after_input_section;
906e58ca 232 lang_list_init (&info.add);
b9c361e0 233 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
234
235 if (info.add.head == NULL)
236 goto err_ret;
237
6bde4c52
TP
238 if (after_input_section == NULL)
239 {
240 lang_statement_union_type **lp = &os->children.head;
241 lang_statement_union_type *l, *lprev = NULL;
242
243 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
244
245 if (lprev)
246 lprev->header.next = info.add.head;
247 else
248 os->children.head = info.add.head;
249
250 return stub_sec;
251 }
252 else
253 {
254 if (hook_in_stub (&info, &os->children.head))
255 return stub_sec;
256 }
906e58ca
NC
257
258 err_ret:
259 einfo ("%X%P: can not make stub section: %E\n");
260 return NULL;
261}
262
263/* Another call-back for elf_arm_size_stubs. */
264
6f798e5c 265static void
906e58ca
NC
266gldarm_layout_sections_again (void)
267{
268 /* If we have changed sizes of the stub sections, then we need
269 to recalculate all the section offsets. This may mean we need to
270 add even more stubs. */
271 gld${EMULATION_NAME}_map_segments (TRUE);
272 need_laying_out = -1;
273}
274
275static void
276build_section_lists (lang_statement_union_type *statement)
277{
278 if (statement->header.type == lang_input_section_enum)
279 {
280 asection *i = statement->input_section.section;
281
dbaa2011 282 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
283 && (i->flags & SEC_EXCLUDE) == 0
284 && i->output_section != NULL
285 && i->output_section->owner == link_info.output_bfd)
286 elf32_arm_next_input_section (& link_info, i);
287 }
288}
289
2468f9c9
PB
290static int
291compare_output_sec_vma (const void *a, const void *b)
292{
293 asection *asec = *(asection **) a, *bsec = *(asection **) b;
294 asection *aout = asec->output_section, *bout = bsec->output_section;
295 bfd_vma avma, bvma;
e2caaa1f 296
2468f9c9
PB
297 /* If there's no output section for some reason, compare equal. */
298 if (!aout || !bout)
299 return 0;
e2caaa1f 300
2468f9c9
PB
301 avma = aout->vma + asec->output_offset;
302 bvma = bout->vma + bsec->output_offset;
e2caaa1f 303
2468f9c9
PB
304 if (avma > bvma)
305 return 1;
306 else if (avma < bvma)
307 return -1;
e2caaa1f 308
2468f9c9
PB
309 return 0;
310}
311
906e58ca 312static void
eaeb0a9d 313gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 314{
75938853
AM
315 int ret;
316
491d01d3
YU
317 /* Build a sorted list of input text sections, then use that to process
318 the unwind table index. */
319 unsigned int list_size = 10;
320 asection **sec_list = (asection **)
321 xmalloc (list_size * sizeof (asection *));
322 unsigned int sec_count = 0;
323
324 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 325 {
491d01d3
YU
326 bfd *abfd = is->the_bfd;
327 asection *sec;
e2caaa1f 328
491d01d3
YU
329 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
330 continue;
e2caaa1f 331
491d01d3
YU
332 for (sec = abfd->sections; sec != NULL; sec = sec->next)
333 {
334 asection *out_sec = sec->output_section;
335
336 if (out_sec
337 && elf_section_data (sec)
338 && elf_section_type (sec) == SHT_PROGBITS
339 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
340 && (sec->flags & SEC_EXCLUDE) == 0
341 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
342 && out_sec != bfd_abs_section_ptr)
2468f9c9 343 {
491d01d3 344 if (sec_count == list_size)
2468f9c9 345 {
491d01d3
YU
346 list_size *= 2;
347 sec_list = (asection **)
348 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 349 }
491d01d3
YU
350
351 sec_list[sec_count++] = sec;
2468f9c9
PB
352 }
353 }
491d01d3 354 }
e2caaa1f 355
491d01d3 356 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 357
491d01d3
YU
358 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
359 merge_exidx_entries))
360 need_laying_out = 1;
e2caaa1f 361
491d01d3 362 free (sec_list);
6f798e5c 363
906e58ca
NC
364 /* bfd_elf32_discard_info just plays with debugging sections,
365 ie. doesn't affect any code, so we can delay resizing the
366 sections. It's likely we'll resize everything in the process of
367 adding stubs. */
75938853
AM
368 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
369 if (ret < 0)
370 {
371 einfo ("%X%P: .eh_frame/.stab edit: %E\n");
372 return;
373 }
374 else if (ret > 0)
906e58ca
NC
375 need_laying_out = 1;
376
377 /* If generating a relocatable output file, then we don't
378 have to examine the relocs. */
0e1862bb 379 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 380 {
75938853 381 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
382 if (ret != 0)
383 {
384 if (ret < 0)
385 {
1a51c1a4 386 einfo ("%X%P: could not compute sections lists for stub generation: %E\n");
906e58ca
NC
387 return;
388 }
389
390 lang_for_each_statement (build_section_lists);
391
392 /* Call into the BFD backend to do the real work. */
393 if (! elf32_arm_size_stubs (link_info.output_bfd,
394 stub_file->the_bfd,
395 & link_info,
396 group_size,
397 & elf32_arm_add_stub_section,
398 & gldarm_layout_sections_again))
399 {
1a51c1a4 400 einfo ("%X%P: cannot size stub section: %E\n");
906e58ca
NC
401 return;
402 }
403 }
404 }
405
406 if (need_laying_out != -1)
407 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
408}
409
410static void
411gld${EMULATION_NAME}_finish (void)
412{
413 struct bfd_link_hash_entry * h;
414
415 {
416 LANG_FOR_EACH_INPUT_STATEMENT (is)
417 {
418 /* Figure out where VFP11 erratum veneers (and the labels returning
419 from same) have been placed. */
420 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
421
422 /* Figure out where STM32L4XX erratum veneers (and the labels returning
423 from them) have been placed. */
424 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
425 }
426 }
906e58ca 427
0e1862bb 428 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
429 {
430 /* Now build the linker stubs. */
431 if (stub_file->the_bfd->sections != NULL)
432 {
433 if (! elf32_arm_build_stubs (& link_info))
434 einfo ("%X%P: can not build stubs: %E\n");
435 }
436 }
437
438 finish_default ();
c56feb2b 439
1d022697
PB
440 if (thumb_entry_symbol)
441 {
442 h = bfd_link_hash_lookup (link_info.hash, thumb_entry_symbol,
443 FALSE, FALSE, TRUE);
444 }
445 else
446 {
447 struct elf_link_hash_entry * eh;
448
449 if (!entry_symbol.name)
450 return;
451
452 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
453 FALSE, FALSE, TRUE);
454 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
455 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
456 != ST_BRANCH_TO_THUMB)
1d022697
PB
457 return;
458 }
0c7a8e5a 459
6f798e5c
NC
460
461 if (h != (struct bfd_link_hash_entry *) NULL
462 && (h->type == bfd_link_hash_defined
463 || h->type == bfd_link_hash_defweak)
464 && h->u.def.section->output_section != NULL)
465 {
466 static char buffer[32];
88f7bcd5 467 bfd_vma val;
0c7a8e5a 468
88f7bcd5
NC
469 /* Special procesing is required for a Thumb entry symbol. The
470 bottom bit of its address must be set. */
471 val = (h->u.def.value
f13a99db 472 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
473 h->u.def.section->output_section)
474 + h->u.def.section->output_offset);
0c7a8e5a 475
88f7bcd5 476 val |= 1;
6f798e5c 477
88f7bcd5 478 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 479 where the lang_finish() function will pick it up. */
88f7bcd5
NC
480 buffer[0] = '0';
481 buffer[1] = 'x';
0c7a8e5a 482
88f7bcd5 483 sprintf_vma (buffer + 2, val);
6f798e5c 484
1d022697
PB
485 if (thumb_entry_symbol != NULL && entry_symbol.name != NULL
486 && entry_from_cmdline)
88f7bcd5
NC
487 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
488 thumb_entry_symbol, entry_symbol.name);
489 entry_symbol.name = buffer;
6f798e5c 490 }
88f7bcd5 491 else
6241fe3d 492 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
88f7bcd5 493 thumb_entry_symbol);
6f798e5c
NC
494}
495
bf21ed78 496/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
497 After the output has been created, but before inputs are read. */
498static void
499arm_elf_create_output_section_statements (void)
500{
b8976b05
NC
501 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
502 {
503 /* The arm backend needs special fields in the output hash structure.
504 These will only be created if the output format is an arm format,
505 hence we do not support linking and changing output formats at the
506 same time. Use a link followed by objcopy to change output formats. */
507 einfo ("%F%X%P: error: Cannot change output format whilst linking ARM binaries.\n");
508 return;
509 }
510
f13a99db
AM
511 bfd_elf32_arm_set_target_relocs (link_info.output_bfd, &link_info,
512 target1_is_rel,
bf21ed78 513 target2_type, fix_v4bx, use_blx,
a504d23a
LA
514 vfp11_denorm_fix, stm32l4xx_fix,
515 no_enum_size_warning,
a9dc9481 516 no_wchar_size_warning,
e2caaa1f 517 pic_veneer, fix_cortex_a8,
54ddd295 518 fix_arm1176, cmse_implib);
906e58ca
NC
519
520 stub_file = lang_add_input_file ("linker stubs",
521 lang_input_file_is_fake_enum,
522 NULL);
523 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
524 if (stub_file->the_bfd == NULL
525 || ! bfd_set_arch_mach (stub_file->the_bfd,
526 bfd_get_arch (link_info.output_bfd),
527 bfd_get_mach (link_info.output_bfd)))
528 {
529 einfo ("%X%P: can not create BFD %E\n");
530 return;
531 }
e2caaa1f 532
906e58ca
NC
533 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
534 ldlang_add_file (stub_file);
3e6b1042
DJ
535
536 /* Also use the stub file for stubs placed in a single output section. */
537 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
538 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
539}
540
541/* Avoid processing the fake stub_file in vercheck, stat_needed and
542 check_needed routines. */
543
544static void (*real_func) (lang_input_statement_type *);
545
546static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
547{
548 if (l != stub_file)
549 (*real_func) (l);
3674e28a
PB
550}
551
906e58ca
NC
552static void
553arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
554{
555 real_func = func;
556 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
557}
558
559#define lang_for_each_input_file arm_lang_for_each_input_file
560
252b5132
RH
561EOF
562
41392f03
AM
563# Define some shell vars to insert bits of code into the standard elf
564# parse_args and list_options functions.
565#
566PARSE_AND_LIST_PROLOGUE='
567#define OPTION_THUMB_ENTRY 301
e489d0ae 568#define OPTION_BE8 302
9c504268
PB
569#define OPTION_TARGET1_REL 303
570#define OPTION_TARGET1_ABS 304
3674e28a 571#define OPTION_TARGET2 305
33bfe774
JB
572#define OPTION_FIX_V4BX 306
573#define OPTION_USE_BLX 307
c6dd86c6 574#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 575#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 576#define OPTION_PIC_VENEER 310
845b51d6 577#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 578#define OPTION_STUBGROUP_SIZE 312
a9dc9481 579#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
580#define OPTION_FIX_CORTEX_A8 314
581#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 582#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
583#define OPTION_FIX_ARM1176 317
584#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 585#define OPTION_LONG_PLT 319
a504d23a 586#define OPTION_STM32L4XX_FIX 320
54ddd295 587#define OPTION_CMSE_IMPLIB 321
41392f03 588'
252b5132 589
ef5bdbd1 590PARSE_AND_LIST_SHORTOPTS=p
252b5132 591
41392f03
AM
592PARSE_AND_LIST_LONGOPTS='
593 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
594 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 595 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
596 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
597 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 598 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 599 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 600 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 601 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 602 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 603 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 604 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 605 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 606 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 607 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
608 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
609 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 610 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
611 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
612 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 613 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 614 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
41392f03 615'
252b5132 616
41392f03 617PARSE_AND_LIST_OPTIONS='
442996ee 618 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 619 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
620 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
621 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
622 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
623 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 624 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
625 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
626 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 627 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 628 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 629 " enum sizes\n"));
a272e28c 630 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 631 " wchar_t sizes\n"));
442996ee 632 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
633 fprintf (file, _(" --long-plt Generate long .plt entries\n"
634 " to handle large .plt/.got displacements\n"));
54ddd295
TP
635 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
636 " library as per ARMv8-M Security Extensions\n"));
906e58ca 637 fprintf (file, _("\
a272e28c
NC
638 --stub-group-size=N Maximum size of a group of input sections that\n\
639 can be handled by one stub section. A negative\n\
640 value locates all stubs after their branches\n\
641 (with a group size of -N), while a positive\n\
642 value allows two groups of input sections, one\n\
643 before, and one after each stub section.\n\
644 Values of +/-1 indicate the linker should\n\
645 choose suitable defaults.\n"));
48229727 646 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 647 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 648 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 649'
252b5132 650
41392f03
AM
651PARSE_AND_LIST_ARGS_CASES='
652 case '\'p\'':
dea514f5 653 /* Only here for backwards compatibility. */
41392f03 654 break;
252b5132 655
41392f03
AM
656 case OPTION_THUMB_ENTRY:
657 thumb_entry_symbol = optarg;
658 break;
e489d0ae
PB
659
660 case OPTION_BE8:
661 byteswap_code = 1;
662 break;
9c504268
PB
663
664 case OPTION_TARGET1_REL:
665 target1_is_rel = 1;
666 break;
667
668 case OPTION_TARGET1_ABS:
669 target1_is_rel = 0;
670 break;
3674e28a
PB
671
672 case OPTION_TARGET2:
673 target2_type = optarg;
674 break;
319850b4
JB
675
676 case OPTION_FIX_V4BX:
677 fix_v4bx = 1;
678 break;
33bfe774 679
845b51d6
PB
680 case OPTION_FIX_V4BX_INTERWORKING:
681 fix_v4bx = 2;
682 break;
683
33bfe774
JB
684 case OPTION_USE_BLX:
685 use_blx = 1;
686 break;
92b93329 687
c6dd86c6
JB
688 case OPTION_VFP11_DENORM_FIX:
689 if (strcmp (optarg, "none") == 0)
690 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
691 else if (strcmp (optarg, "scalar") == 0)
692 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
693 else if (strcmp (optarg, "vector") == 0)
694 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
695 else
696 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
697 break;
bf21ed78 698
a504d23a
LA
699 case OPTION_STM32L4XX_FIX:
700 if (!optarg)
701 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
702 else if (strcmp (optarg, "none") == 0)
703 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
704 else if (strcmp (optarg, "default") == 0)
705 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
706 else if (strcmp (optarg, "all") == 0)
707 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
708 else
709 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
710 break;
711
bf21ed78
MS
712 case OPTION_NO_ENUM_SIZE_WARNING:
713 no_enum_size_warning = 1;
714 break;
27e55c4d 715
a9dc9481
JM
716 case OPTION_NO_WCHAR_SIZE_WARNING:
717 no_wchar_size_warning = 1;
718 break;
719
27e55c4d
PB
720 case OPTION_PIC_VENEER:
721 pic_veneer = 1;
722 break;
906e58ca
NC
723
724 case OPTION_STUBGROUP_SIZE:
725 {
726 const char *end;
727
728 group_size = bfd_scan_vma (optarg, &end, 0);
729 if (*end)
730 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
731 }
732 break;
48229727
JB
733
734 case OPTION_FIX_CORTEX_A8:
735 fix_cortex_a8 = 1;
736 break;
737
738 case OPTION_NO_FIX_CORTEX_A8:
739 fix_cortex_a8 = 0;
740 break;
85fdf906
AH
741
742 case OPTION_NO_MERGE_EXIDX_ENTRIES:
743 merge_exidx_entries = 0;
2de70689 744 break;
85fdf906 745
2de70689
MGD
746 case OPTION_FIX_ARM1176:
747 fix_arm1176 = 1;
748 break;
749
750 case OPTION_NO_FIX_ARM1176:
751 fix_arm1176 = 0;
752 break;
1db37fe6
YG
753
754 case OPTION_LONG_PLT:
755 bfd_elf32_arm_use_long_plt ();
756 break;
54ddd295
TP
757
758 case OPTION_CMSE_IMPLIB:
759 cmse_implib = 1;
760 break;
41392f03 761'
252b5132 762
3e6b1042 763# We have our own before_allocation etc. functions, but they call
41392f03 764# the standard routines, so give them a different name.
41392f03 765LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 766LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 767LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 768
41392f03
AM
769# Replace the elf before_parse function with our own.
770LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 771LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 772
41392f03 773# Call the extra arm-elf function
906e58ca 774LDEMUL_FINISH=gld${EMULATION_NAME}_finish
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