Commit | Line | Data |
---|---|---|
0e7461c1 AM |
1 | |
2 | MEMORY | |
3 | { | |
4 | rom (rx) : ORIGIN = 0x100, LENGTH = 0x100 | |
5 | ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100 | |
6 | ||
7 | } | |
8 | ||
9 | SECTIONS | |
10 | { | |
11 | .text : {*(.text .text.*)} >rom | |
12 | .data : {data_load = LOADADDR (.data); | |
13 | data_start = ADDR (.data); | |
14 | *(.data .data.*)} >ram AT>rom | |
15 | /DISCARD/ : { *(.*) } | |
16 | } |