Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
1da177e4 LT |
17 | */ |
18 | ||
19 | #include <linux/cache.h> | |
17e5ad6c | 20 | #include <linux/dma-mapping.h> |
1da177e4 LT |
21 | #include <linux/mm.h> |
22 | #include <linux/module.h> | |
1da177e4 | 23 | #include <linux/spinlock.h> |
8c5df16b | 24 | #include <linux/swiotlb.h> |
1da177e4 | 25 | #include <linux/string.h> |
0016fdee | 26 | #include <linux/swiotlb.h> |
1da177e4 LT |
27 | #include <linux/types.h> |
28 | #include <linux/ctype.h> | |
29 | ||
30 | #include <asm/io.h> | |
1da177e4 | 31 | #include <asm/dma.h> |
17e5ad6c | 32 | #include <asm/scatterlist.h> |
1da177e4 LT |
33 | |
34 | #include <linux/init.h> | |
35 | #include <linux/bootmem.h> | |
a8522509 | 36 | #include <linux/iommu-helper.h> |
1da177e4 LT |
37 | |
38 | #define OFFSET(val,align) ((unsigned long) \ | |
39 | ( (val) & ( (align) - 1))) | |
40 | ||
f9527f12 | 41 | #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg))) |
93fbff63 | 42 | #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg)) |
1da177e4 | 43 | |
0b9afede AW |
44 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
45 | ||
46 | /* | |
47 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
48 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
49 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
50 | */ | |
51 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
52 | ||
de69e0f0 JL |
53 | /* |
54 | * Enumeration for sync targets | |
55 | */ | |
56 | enum dma_sync_target { | |
57 | SYNC_FOR_CPU = 0, | |
58 | SYNC_FOR_DEVICE = 1, | |
59 | }; | |
60 | ||
1da177e4 LT |
61 | int swiotlb_force; |
62 | ||
63 | /* | |
64 | * Used to do a quick range check in swiotlb_unmap_single and | |
65 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | |
66 | * API. | |
67 | */ | |
68 | static char *io_tlb_start, *io_tlb_end; | |
69 | ||
70 | /* | |
71 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
72 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
73 | */ | |
74 | static unsigned long io_tlb_nslabs; | |
75 | ||
76 | /* | |
77 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
78 | */ | |
79 | static unsigned long io_tlb_overflow = 32*1024; | |
80 | ||
81 | void *io_tlb_overflow_buffer; | |
82 | ||
83 | /* | |
84 | * This is a free list describing the number of free entries available from | |
85 | * each index | |
86 | */ | |
87 | static unsigned int *io_tlb_list; | |
88 | static unsigned int io_tlb_index; | |
89 | ||
90 | /* | |
91 | * We need to save away the original address corresponding to a mapped entry | |
92 | * for the sync operations. | |
93 | */ | |
25667d67 | 94 | static unsigned char **io_tlb_orig_addr; |
1da177e4 LT |
95 | |
96 | /* | |
97 | * Protect the above data structures in the map and unmap calls | |
98 | */ | |
99 | static DEFINE_SPINLOCK(io_tlb_lock); | |
100 | ||
101 | static int __init | |
102 | setup_io_tlb_npages(char *str) | |
103 | { | |
104 | if (isdigit(*str)) { | |
e8579e72 | 105 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
106 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
107 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
108 | } | |
109 | if (*str == ',') | |
110 | ++str; | |
111 | if (!strcmp(str, "force")) | |
112 | swiotlb_force = 1; | |
113 | return 1; | |
114 | } | |
115 | __setup("swiotlb=", setup_io_tlb_npages); | |
116 | /* make io_tlb_overflow tunable too? */ | |
117 | ||
8c5df16b JF |
118 | void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs) |
119 | { | |
120 | return alloc_bootmem_low_pages(size); | |
121 | } | |
122 | ||
123 | void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs) | |
124 | { | |
125 | return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order); | |
126 | } | |
127 | ||
1da177e4 LT |
128 | /* |
129 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 130 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 131 | */ |
563aaf06 JB |
132 | void __init |
133 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 134 | { |
563aaf06 | 135 | unsigned long i, bytes; |
1da177e4 LT |
136 | |
137 | if (!io_tlb_nslabs) { | |
e8579e72 | 138 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
139 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
140 | } | |
141 | ||
563aaf06 JB |
142 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
143 | ||
1da177e4 LT |
144 | /* |
145 | * Get IO TLB memory from the low pages | |
146 | */ | |
8c5df16b | 147 | io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs); |
1da177e4 LT |
148 | if (!io_tlb_start) |
149 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 150 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
151 | |
152 | /* | |
153 | * Allocate and initialize the free list array. This array is used | |
154 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
155 | * between io_tlb_start and io_tlb_end. | |
156 | */ | |
157 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 158 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
159 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
160 | io_tlb_index = 0; | |
25667d67 | 161 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); |
1da177e4 LT |
162 | |
163 | /* | |
164 | * Get the overflow emergency buffer | |
165 | */ | |
166 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
167 | if (!io_tlb_overflow_buffer) |
168 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
169 | ||
25667d67 TL |
170 | printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", |
171 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
1da177e4 LT |
172 | } |
173 | ||
563aaf06 JB |
174 | void __init |
175 | swiotlb_init(void) | |
1da177e4 | 176 | { |
25667d67 | 177 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
178 | } |
179 | ||
0b9afede AW |
180 | /* |
181 | * Systems with larger DMA zones (those that don't support ISA) can | |
182 | * initialize the swiotlb later using the slab allocator if needed. | |
183 | * This should be just like above, but with some error catching. | |
184 | */ | |
185 | int | |
563aaf06 | 186 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 187 | { |
563aaf06 | 188 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
189 | unsigned int order; |
190 | ||
191 | if (!io_tlb_nslabs) { | |
192 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
193 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
194 | } | |
195 | ||
196 | /* | |
197 | * Get IO TLB memory from the low pages | |
198 | */ | |
563aaf06 | 199 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 200 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 201 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
202 | |
203 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
8c5df16b | 204 | io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs); |
0b9afede AW |
205 | if (io_tlb_start) |
206 | break; | |
207 | order--; | |
208 | } | |
209 | ||
210 | if (!io_tlb_start) | |
211 | goto cleanup1; | |
212 | ||
563aaf06 | 213 | if (order != get_order(bytes)) { |
0b9afede AW |
214 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
215 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
216 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 217 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 218 | } |
563aaf06 JB |
219 | io_tlb_end = io_tlb_start + bytes; |
220 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
221 | |
222 | /* | |
223 | * Allocate and initialize the free list array. This array is used | |
224 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
225 | * between io_tlb_start and io_tlb_end. | |
226 | */ | |
227 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
228 | get_order(io_tlb_nslabs * sizeof(int))); | |
229 | if (!io_tlb_list) | |
230 | goto cleanup2; | |
231 | ||
232 | for (i = 0; i < io_tlb_nslabs; i++) | |
233 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
234 | io_tlb_index = 0; | |
235 | ||
25667d67 TL |
236 | io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL, |
237 | get_order(io_tlb_nslabs * sizeof(char *))); | |
0b9afede AW |
238 | if (!io_tlb_orig_addr) |
239 | goto cleanup3; | |
240 | ||
25667d67 | 241 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *)); |
0b9afede AW |
242 | |
243 | /* | |
244 | * Get the overflow emergency buffer | |
245 | */ | |
246 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
247 | get_order(io_tlb_overflow)); | |
248 | if (!io_tlb_overflow_buffer) | |
249 | goto cleanup4; | |
250 | ||
25667d67 TL |
251 | printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " |
252 | "0x%lx\n", bytes >> 20, | |
253 | virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); | |
0b9afede AW |
254 | |
255 | return 0; | |
256 | ||
257 | cleanup4: | |
25667d67 TL |
258 | free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * |
259 | sizeof(char *))); | |
0b9afede AW |
260 | io_tlb_orig_addr = NULL; |
261 | cleanup3: | |
25667d67 TL |
262 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
263 | sizeof(int))); | |
0b9afede | 264 | io_tlb_list = NULL; |
0b9afede | 265 | cleanup2: |
563aaf06 | 266 | io_tlb_end = NULL; |
0b9afede AW |
267 | free_pages((unsigned long)io_tlb_start, order); |
268 | io_tlb_start = NULL; | |
269 | cleanup1: | |
270 | io_tlb_nslabs = req_nslabs; | |
271 | return -ENOMEM; | |
272 | } | |
273 | ||
be6b0267 | 274 | static int |
2797982e | 275 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) |
1da177e4 | 276 | { |
07a2c01a | 277 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); |
1da177e4 LT |
278 | } |
279 | ||
640aebfe FT |
280 | static int is_swiotlb_buffer(char *addr) |
281 | { | |
282 | return addr >= io_tlb_start && addr < io_tlb_end; | |
283 | } | |
284 | ||
1da177e4 LT |
285 | /* |
286 | * Allocates bounce buffer and returns its kernel virtual address. | |
287 | */ | |
288 | static void * | |
25667d67 | 289 | map_single(struct device *hwdev, char *buffer, size_t size, int dir) |
1da177e4 LT |
290 | { |
291 | unsigned long flags; | |
292 | char *dma_addr; | |
293 | unsigned int nslots, stride, index, wrap; | |
294 | int i; | |
681cc5cd FT |
295 | unsigned long start_dma_addr; |
296 | unsigned long mask; | |
297 | unsigned long offset_slots; | |
298 | unsigned long max_slots; | |
299 | ||
300 | mask = dma_get_seg_boundary(hwdev); | |
301 | start_dma_addr = virt_to_bus(io_tlb_start) & mask; | |
302 | ||
303 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
304 | |
305 | /* | |
306 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
307 | */ | |
b15a3891 JB |
308 | max_slots = mask + 1 |
309 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
310 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
311 | |
312 | /* | |
313 | * For mappings greater than a page, we limit the stride (and | |
314 | * hence alignment) to a page size. | |
315 | */ | |
316 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
317 | if (size > PAGE_SIZE) | |
318 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
319 | else | |
320 | stride = 1; | |
321 | ||
34814545 | 322 | BUG_ON(!nslots); |
1da177e4 LT |
323 | |
324 | /* | |
325 | * Find suitable number of IO TLB entries size that will fit this | |
326 | * request and allocate a buffer from that IO TLB pool. | |
327 | */ | |
328 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
329 | index = ALIGN(io_tlb_index, stride); |
330 | if (index >= io_tlb_nslabs) | |
331 | index = 0; | |
332 | wrap = index; | |
333 | ||
334 | do { | |
a8522509 FT |
335 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
336 | max_slots)) { | |
b15a3891 JB |
337 | index += stride; |
338 | if (index >= io_tlb_nslabs) | |
339 | index = 0; | |
a7133a15 AM |
340 | if (index == wrap) |
341 | goto not_found; | |
342 | } | |
343 | ||
344 | /* | |
345 | * If we find a slot that indicates we have 'nslots' number of | |
346 | * contiguous buffers, we allocate the buffers from that slot | |
347 | * and mark the entries as '0' indicating unavailable. | |
348 | */ | |
349 | if (io_tlb_list[index] >= nslots) { | |
350 | int count = 0; | |
351 | ||
352 | for (i = index; i < (int) (index + nslots); i++) | |
353 | io_tlb_list[i] = 0; | |
354 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
355 | io_tlb_list[i] = ++count; | |
356 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 357 | |
a7133a15 AM |
358 | /* |
359 | * Update the indices to avoid searching in the next | |
360 | * round. | |
361 | */ | |
362 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
363 | ? (index + nslots) : 0); | |
364 | ||
365 | goto found; | |
366 | } | |
367 | index += stride; | |
368 | if (index >= io_tlb_nslabs) | |
369 | index = 0; | |
370 | } while (index != wrap); | |
371 | ||
372 | not_found: | |
373 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
374 | return NULL; | |
375 | found: | |
1da177e4 LT |
376 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
377 | ||
378 | /* | |
379 | * Save away the mapping from the original address to the DMA address. | |
380 | * This is needed when we sync the memory. Then we sync the buffer if | |
381 | * needed. | |
382 | */ | |
df336d1c KF |
383 | for (i = 0; i < nslots; i++) |
384 | io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT); | |
1da177e4 | 385 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
25667d67 | 386 | memcpy(dma_addr, buffer, size); |
1da177e4 LT |
387 | |
388 | return dma_addr; | |
389 | } | |
390 | ||
391 | /* | |
392 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
393 | */ | |
394 | static void | |
395 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | |
396 | { | |
397 | unsigned long flags; | |
398 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
399 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
25667d67 | 400 | char *buffer = io_tlb_orig_addr[index]; |
1da177e4 LT |
401 | |
402 | /* | |
403 | * First, sync the memory before unmapping the entry | |
404 | */ | |
25667d67 | 405 | if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
1da177e4 LT |
406 | /* |
407 | * bounce... copy the data back into the original buffer * and | |
408 | * delete the bounce buffer. | |
409 | */ | |
25667d67 | 410 | memcpy(buffer, dma_addr, size); |
1da177e4 LT |
411 | |
412 | /* | |
413 | * Return the buffer to the free list by setting the corresponding | |
414 | * entries to indicate the number of contigous entries available. | |
415 | * While returning the entries to the free list, we merge the entries | |
416 | * with slots below and above the pool being returned. | |
417 | */ | |
418 | spin_lock_irqsave(&io_tlb_lock, flags); | |
419 | { | |
420 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
421 | io_tlb_list[index + nslots] : 0); | |
422 | /* | |
423 | * Step 1: return the slots to the free list, merging the | |
424 | * slots with superceeding slots | |
425 | */ | |
426 | for (i = index + nslots - 1; i >= index; i--) | |
427 | io_tlb_list[i] = ++count; | |
428 | /* | |
429 | * Step 2: merge the returned slots with the preceding slots, | |
430 | * if available (non zero) | |
431 | */ | |
432 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
433 | io_tlb_list[i] = ++count; | |
434 | } | |
435 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
436 | } | |
437 | ||
438 | static void | |
de69e0f0 JL |
439 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
440 | int dir, int target) | |
1da177e4 LT |
441 | { |
442 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
25667d67 | 443 | char *buffer = io_tlb_orig_addr[index]; |
1da177e4 | 444 | |
df336d1c KF |
445 | buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); |
446 | ||
de69e0f0 JL |
447 | switch (target) { |
448 | case SYNC_FOR_CPU: | |
449 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
25667d67 | 450 | memcpy(buffer, dma_addr, size); |
34814545 ES |
451 | else |
452 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
453 | break; |
454 | case SYNC_FOR_DEVICE: | |
455 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
25667d67 | 456 | memcpy(dma_addr, buffer, size); |
34814545 ES |
457 | else |
458 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
459 | break; |
460 | default: | |
1da177e4 | 461 | BUG(); |
de69e0f0 | 462 | } |
1da177e4 LT |
463 | } |
464 | ||
465 | void * | |
466 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 467 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 468 | { |
563aaf06 | 469 | dma_addr_t dev_addr; |
1da177e4 LT |
470 | void *ret; |
471 | int order = get_order(size); | |
1e74f300 FT |
472 | u64 dma_mask = DMA_32BIT_MASK; |
473 | ||
474 | if (hwdev && hwdev->coherent_dma_mask) | |
475 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 476 | |
25667d67 | 477 | ret = (void *)__get_free_pages(flags, order); |
1e74f300 | 478 | if (ret && !is_buffer_dma_capable(dma_mask, virt_to_bus(ret), size)) { |
1da177e4 LT |
479 | /* |
480 | * The allocated memory isn't reachable by the device. | |
481 | * Fall back on swiotlb_map_single(). | |
482 | */ | |
483 | free_pages((unsigned long) ret, order); | |
484 | ret = NULL; | |
485 | } | |
486 | if (!ret) { | |
487 | /* | |
488 | * We are either out of memory or the device can't DMA | |
489 | * to GFP_DMA memory; fall back on | |
490 | * swiotlb_map_single(), which will grab memory from | |
491 | * the lowest available address range. | |
492 | */ | |
9dfda12b FT |
493 | ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE); |
494 | if (!ret) | |
1da177e4 | 495 | return NULL; |
1da177e4 LT |
496 | } |
497 | ||
498 | memset(ret, 0, size); | |
93fbff63 | 499 | dev_addr = virt_to_bus(ret); |
1da177e4 LT |
500 | |
501 | /* Confirm address can be DMA'd by device */ | |
1e74f300 | 502 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { |
563aaf06 | 503 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 504 | (unsigned long long)dma_mask, |
563aaf06 | 505 | (unsigned long long)dev_addr); |
a2b89b59 FT |
506 | |
507 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
508 | unmap_single(hwdev, ret, size, DMA_TO_DEVICE); | |
509 | return NULL; | |
1da177e4 LT |
510 | } |
511 | *dma_handle = dev_addr; | |
512 | return ret; | |
513 | } | |
514 | ||
515 | void | |
516 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
517 | dma_addr_t dma_handle) | |
518 | { | |
aa24886e | 519 | WARN_ON(irqs_disabled()); |
640aebfe | 520 | if (!is_swiotlb_buffer(vaddr)) |
1da177e4 LT |
521 | free_pages((unsigned long) vaddr, get_order(size)); |
522 | else | |
523 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
21f6c4de | 524 | unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 LT |
525 | } |
526 | ||
527 | static void | |
528 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
529 | { | |
530 | /* | |
531 | * Ran out of IOMMU space for this operation. This is very bad. | |
532 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 533 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
534 | * When the mapping is small enough return a static buffer to limit |
535 | * the damage, or panic when the transfer is too big. | |
536 | */ | |
563aaf06 | 537 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
1da177e4 LT |
538 | "device %s\n", size, dev ? dev->bus_id : "?"); |
539 | ||
540 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
541 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
542 | panic("DMA: Memory would be corrupted\n"); | |
543 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
544 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
545 | } |
546 | } | |
547 | ||
548 | /* | |
549 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 550 | * physical address to use is returned. |
1da177e4 LT |
551 | * |
552 | * Once the device is given the dma address, the device owns this memory until | |
553 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | |
554 | */ | |
555 | dma_addr_t | |
309df0c5 AK |
556 | swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, |
557 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 558 | { |
563aaf06 | 559 | dma_addr_t dev_addr = virt_to_bus(ptr); |
1da177e4 LT |
560 | void *map; |
561 | ||
34814545 | 562 | BUG_ON(dir == DMA_NONE); |
1da177e4 LT |
563 | /* |
564 | * If the pointer passed in happens to be in the device's DMA window, | |
565 | * we can safely return the device addr and not worry about bounce | |
566 | * buffering it. | |
567 | */ | |
2797982e | 568 | if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
569 | return dev_addr; |
570 | ||
571 | /* | |
572 | * Oh well, have to allocate and map a bounce buffer. | |
573 | */ | |
25667d67 | 574 | map = map_single(hwdev, ptr, size, dir); |
1da177e4 LT |
575 | if (!map) { |
576 | swiotlb_full(hwdev, size, dir, 1); | |
577 | map = io_tlb_overflow_buffer; | |
578 | } | |
579 | ||
93fbff63 | 580 | dev_addr = virt_to_bus(map); |
1da177e4 LT |
581 | |
582 | /* | |
583 | * Ensure that the address returned is DMA'ble | |
584 | */ | |
2797982e | 585 | if (address_needs_mapping(hwdev, dev_addr, size)) |
1da177e4 LT |
586 | panic("map_single: bounce buffer is not DMA'ble"); |
587 | ||
588 | return dev_addr; | |
589 | } | |
309df0c5 AK |
590 | EXPORT_SYMBOL(swiotlb_map_single_attrs); |
591 | ||
592 | dma_addr_t | |
593 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | |
594 | { | |
595 | return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL); | |
596 | } | |
1da177e4 | 597 | |
1da177e4 LT |
598 | /* |
599 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
600 | * match what was provided for in a previous swiotlb_map_single call. All | |
601 | * other usages are undefined. | |
602 | * | |
603 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
604 | * whatever the device wrote there. | |
605 | */ | |
606 | void | |
309df0c5 AK |
607 | swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, |
608 | size_t size, int dir, struct dma_attrs *attrs) | |
1da177e4 | 609 | { |
93fbff63 | 610 | char *dma_addr = bus_to_virt(dev_addr); |
1da177e4 | 611 | |
34814545 | 612 | BUG_ON(dir == DMA_NONE); |
640aebfe | 613 | if (is_swiotlb_buffer(dma_addr)) |
1da177e4 LT |
614 | unmap_single(hwdev, dma_addr, size, dir); |
615 | else if (dir == DMA_FROM_DEVICE) | |
cde14bbf | 616 | dma_mark_clean(dma_addr, size); |
1da177e4 | 617 | } |
309df0c5 | 618 | EXPORT_SYMBOL(swiotlb_unmap_single_attrs); |
1da177e4 | 619 | |
309df0c5 AK |
620 | void |
621 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | |
622 | int dir) | |
623 | { | |
624 | return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL); | |
625 | } | |
1da177e4 LT |
626 | /* |
627 | * Make physical memory consistent for a single streaming mode DMA translation | |
628 | * after a transfer. | |
629 | * | |
630 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | |
17e5ad6c TL |
631 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
632 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
633 | * address back to the card, you must first perform a |
634 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
635 | */ | |
be6b0267 | 636 | static void |
8270f3f1 | 637 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 638 | size_t size, int dir, int target) |
1da177e4 | 639 | { |
93fbff63 | 640 | char *dma_addr = bus_to_virt(dev_addr); |
1da177e4 | 641 | |
34814545 | 642 | BUG_ON(dir == DMA_NONE); |
640aebfe | 643 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 644 | sync_single(hwdev, dma_addr, size, dir, target); |
1da177e4 | 645 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 646 | dma_mark_clean(dma_addr, size); |
1da177e4 LT |
647 | } |
648 | ||
8270f3f1 JL |
649 | void |
650 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
651 | size_t size, int dir) | |
652 | { | |
de69e0f0 | 653 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 JL |
654 | } |
655 | ||
1da177e4 LT |
656 | void |
657 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
658 | size_t size, int dir) | |
659 | { | |
de69e0f0 | 660 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 LT |
661 | } |
662 | ||
878a97cf JL |
663 | /* |
664 | * Same as above, but for a sub-range of the mapping. | |
665 | */ | |
be6b0267 | 666 | static void |
878a97cf | 667 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
668 | unsigned long offset, size_t size, |
669 | int dir, int target) | |
878a97cf | 670 | { |
93fbff63 | 671 | char *dma_addr = bus_to_virt(dev_addr) + offset; |
878a97cf | 672 | |
34814545 | 673 | BUG_ON(dir == DMA_NONE); |
640aebfe | 674 | if (is_swiotlb_buffer(dma_addr)) |
de69e0f0 | 675 | sync_single(hwdev, dma_addr, size, dir, target); |
878a97cf | 676 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 677 | dma_mark_clean(dma_addr, size); |
878a97cf JL |
678 | } |
679 | ||
680 | void | |
681 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
682 | unsigned long offset, size_t size, int dir) | |
683 | { | |
de69e0f0 JL |
684 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
685 | SYNC_FOR_CPU); | |
878a97cf JL |
686 | } |
687 | ||
688 | void | |
689 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
690 | unsigned long offset, size_t size, int dir) | |
691 | { | |
de69e0f0 JL |
692 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
693 | SYNC_FOR_DEVICE); | |
878a97cf JL |
694 | } |
695 | ||
309df0c5 AK |
696 | void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int, |
697 | struct dma_attrs *); | |
1da177e4 LT |
698 | /* |
699 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
700 | * This is the scatter-gather version of the above swiotlb_map_single | |
701 | * interface. Here the scatter gather list elements are each tagged with the | |
702 | * appropriate dma address and length. They are obtained via | |
703 | * sg_dma_{address,length}(SG). | |
704 | * | |
705 | * NOTE: An implementation may be able to use a smaller number of | |
706 | * DMA address/length pairs than there are SG table elements. | |
707 | * (for example via virtual mapping capabilities) | |
708 | * The routine returns the number of addr/length pairs actually | |
709 | * used, at most nents. | |
710 | * | |
711 | * Device ownership issues as mentioned above for swiotlb_map_single are the | |
712 | * same here. | |
713 | */ | |
714 | int | |
309df0c5 AK |
715 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
716 | int dir, struct dma_attrs *attrs) | |
1da177e4 | 717 | { |
dbfd49fe | 718 | struct scatterlist *sg; |
25667d67 | 719 | void *addr; |
563aaf06 | 720 | dma_addr_t dev_addr; |
1da177e4 LT |
721 | int i; |
722 | ||
34814545 | 723 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 724 | |
dbfd49fe | 725 | for_each_sg(sgl, sg, nelems, i) { |
25667d67 TL |
726 | addr = SG_ENT_VIRT_ADDRESS(sg); |
727 | dev_addr = virt_to_bus(addr); | |
2797982e FT |
728 | if (swiotlb_force || |
729 | address_needs_mapping(hwdev, dev_addr, sg->length)) { | |
25667d67 | 730 | void *map = map_single(hwdev, addr, sg->length, dir); |
7e870233 | 731 | if (!map) { |
1da177e4 LT |
732 | /* Don't panic here, we expect map_sg users |
733 | to do proper error handling. */ | |
734 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
735 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
736 | attrs); | |
dbfd49fe | 737 | sgl[0].dma_length = 0; |
1da177e4 LT |
738 | return 0; |
739 | } | |
cde14bbf | 740 | sg->dma_address = virt_to_bus(map); |
1da177e4 LT |
741 | } else |
742 | sg->dma_address = dev_addr; | |
743 | sg->dma_length = sg->length; | |
744 | } | |
745 | return nelems; | |
746 | } | |
309df0c5 AK |
747 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
748 | ||
749 | int | |
750 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
751 | int dir) | |
752 | { | |
753 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
754 | } | |
1da177e4 LT |
755 | |
756 | /* | |
757 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
758 | * concerning calls here are the same as for swiotlb_unmap_single() above. | |
759 | */ | |
760 | void | |
309df0c5 AK |
761 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
762 | int nelems, int dir, struct dma_attrs *attrs) | |
1da177e4 | 763 | { |
dbfd49fe | 764 | struct scatterlist *sg; |
1da177e4 LT |
765 | int i; |
766 | ||
34814545 | 767 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 768 | |
dbfd49fe | 769 | for_each_sg(sgl, sg, nelems, i) { |
1da177e4 | 770 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) |
93fbff63 JB |
771 | unmap_single(hwdev, bus_to_virt(sg->dma_address), |
772 | sg->dma_length, dir); | |
1da177e4 | 773 | else if (dir == DMA_FROM_DEVICE) |
cde14bbf | 774 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); |
dbfd49fe | 775 | } |
1da177e4 | 776 | } |
309df0c5 AK |
777 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
778 | ||
779 | void | |
780 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
781 | int dir) | |
782 | { | |
783 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
784 | } | |
1da177e4 LT |
785 | |
786 | /* | |
787 | * Make physical memory consistent for a set of streaming mode DMA translations | |
788 | * after a transfer. | |
789 | * | |
790 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
791 | * and usage. | |
792 | */ | |
be6b0267 | 793 | static void |
dbfd49fe | 794 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 795 | int nelems, int dir, int target) |
1da177e4 | 796 | { |
dbfd49fe | 797 | struct scatterlist *sg; |
1da177e4 LT |
798 | int i; |
799 | ||
34814545 | 800 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 801 | |
dbfd49fe | 802 | for_each_sg(sgl, sg, nelems, i) { |
1da177e4 | 803 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) |
93fbff63 | 804 | sync_single(hwdev, bus_to_virt(sg->dma_address), |
de69e0f0 | 805 | sg->dma_length, dir, target); |
cde14bbf JB |
806 | else if (dir == DMA_FROM_DEVICE) |
807 | dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | |
dbfd49fe | 808 | } |
1da177e4 LT |
809 | } |
810 | ||
8270f3f1 JL |
811 | void |
812 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
813 | int nelems, int dir) | |
814 | { | |
de69e0f0 | 815 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 JL |
816 | } |
817 | ||
1da177e4 LT |
818 | void |
819 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
820 | int nelems, int dir) | |
821 | { | |
de69e0f0 | 822 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 LT |
823 | } |
824 | ||
825 | int | |
8d8bb39b | 826 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 827 | { |
93fbff63 | 828 | return (dma_addr == virt_to_bus(io_tlb_overflow_buffer)); |
1da177e4 LT |
829 | } |
830 | ||
831 | /* | |
17e5ad6c | 832 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 833 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 834 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
835 | * this function. |
836 | */ | |
837 | int | |
563aaf06 | 838 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 839 | { |
25667d67 | 840 | return virt_to_bus(io_tlb_end - 1) <= mask; |
1da177e4 LT |
841 | } |
842 | ||
1da177e4 LT |
843 | EXPORT_SYMBOL(swiotlb_map_single); |
844 | EXPORT_SYMBOL(swiotlb_unmap_single); | |
845 | EXPORT_SYMBOL(swiotlb_map_sg); | |
846 | EXPORT_SYMBOL(swiotlb_unmap_sg); | |
847 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | |
848 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | |
878a97cf JL |
849 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
850 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); | |
1da177e4 LT |
851 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
852 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | |
853 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | |
25667d67 TL |
854 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
855 | EXPORT_SYMBOL(swiotlb_free_coherent); | |
1da177e4 | 856 | EXPORT_SYMBOL(swiotlb_dma_supported); |