gdb/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
5eb3690e
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12012-05-18 Alan Modra <amodra@gmail.com>
2
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3 * ia64-opc.c: Remove #include "ansidecl.h".
4 * z8kgen.c: Include sysdep.h first.
5
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6 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
7 * bfin-dis.c: Likewise.
8 * i860-dis.c: Likewise.
9 * ia64-dis.c: Likewise.
10 * ia64-gen.c: Likewise.
11 * m68hc11-dis.c: Likewise.
12 * mmix-dis.c: Likewise.
13 * msp430-dis.c: Likewise.
14 * or32-dis.c: Likewise.
15 * rl78-dis.c: Likewise.
16 * rx-dis.c: Likewise.
17 * tic4x-dis.c: Likewise.
18 * tilegx-opc.c: Likewise.
19 * tilepro-opc.c: Likewise.
20 * rx-decode.c: Regenerate.
21
a4ebc835
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222012-05-17 James Lemke <jwlemke@codesourcery.com>
23
24 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
25
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262012-05-17 James Lemke <jwlemke@codesourcery.com>
27
28 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
29
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302012-05-17 Daniel Richard G. <skunk@iskunk.org>
31 Nick Clifton <nickc@redhat.com>
32
33 PR 14072
34 * configure.in: Add check that sysdep.h has been included before
35 any system header files.
36 * configure: Regenerate.
37 * config.in: Regenerate.
38 * sysdep.h: Generate an error if included before config.h.
39 * alpha-opc.c: Include sysdep.h before any other header file.
40 * alpha-dis.c: Likewise.
41 * avr-dis.c: Likewise.
42 * cgen-opc.c: Likewise.
43 * cr16-dis.c: Likewise.
44 * cris-dis.c: Likewise.
45 * crx-dis.c: Likewise.
46 * d10v-dis.c: Likewise.
47 * d10v-opc.c: Likewise.
48 * d30v-dis.c: Likewise.
49 * d30v-opc.c: Likewise.
50 * h8500-dis.c: Likewise.
51 * i370-dis.c: Likewise.
52 * i370-opc.c: Likewise.
53 * m10200-dis.c: Likewise.
54 * m10300-dis.c: Likewise.
55 * micromips-opc.c: Likewise.
56 * mips-opc.c: Likewise.
57 * mips61-opc.c: Likewise.
58 * moxie-dis.c: Likewise.
59 * or32-opc.c: Likewise.
60 * pj-dis.c: Likewise.
61 * ppc-dis.c: Likewise.
62 * ppc-opc.c: Likewise.
63 * s390-dis.c: Likewise.
64 * sh-dis.c: Likewise.
65 * sh64-dis.c: Likewise.
66 * sparc-dis.c: Likewise.
67 * sparc-opc.c: Likewise.
68 * spu-dis.c: Likewise.
69 * tic30-dis.c: Likewise.
70 * tic54x-dis.c: Likewise.
71 * tic80-dis.c: Likewise.
72 * tic80-opc.c: Likewise.
73 * tilegx-dis.c: Likewise.
74 * tilepro-dis.c: Likewise.
75 * v850-dis.c: Likewise.
76 * v850-opc.c: Likewise.
77 * vax-dis.c: Likewise.
78 * w65-dis.c: Likewise.
79 * xgate-dis.c: Likewise.
80 * xtensa-dis.c: Likewise.
81 * rl78-decode.opc: Likewise.
82 * rl78-decode.c: Regenerate.
83 * rx-decode.opc: Likewise.
84 * rx-decode.c: Regenerate.
85
e1dad58d
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862012-05-17 Alan Modra <amodra@gmail.com>
87
88 * ppc_dis.c: Don't include elf/ppc.h.
89
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902012-05-16 Meador Inge <meadori@codesourcery.com>
91
92 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
93 to PUSH/POP {reg}.
94
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952012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
96 Stephane Carrez <stcarrez@nerim.fr>
97
98 * configure.in: Add S12X and XGATE co-processor support to m68hc11
99 target.
100 * disassemble.c: Likewise.
101 * configure: Regenerate.
102 * m68hc11-dis.c: Make objdump output more consistent, use hex
103 instead of decimal and use 0x prefix for hex.
104 * m68hc11-opc.c: Add S12X and XGATE opcodes.
105
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1062012-05-14 James Lemke <jwlemke@codesourcery.com>
107
108 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
109 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
110 (vle_opcd_indices): New array.
111 (lookup_vle): New function.
112 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
113 (print_insn_powerpc): Likewise.
114 * ppc-opc.c: Likewise.
115
1162012-05-14 Catherine Moore <clm@codesourcery.com>
117 Maciej W. Rozycki <macro@codesourcery.com>
118 Rhonda Wittels <rhonda@codesourcery.com>
119 Nathan Froyd <froydnj@codesourcery.com>
120
121 * ppc-opc.c (insert_arx, extract_arx): New functions.
122 (insert_ary, extract_ary): New functions.
123 (insert_li20, extract_li20): New functions.
124 (insert_rx, extract_rx): New functions.
125 (insert_ry, extract_ry): New functions.
126 (insert_sci8, extract_sci8): New functions.
127 (insert_sci8n, extract_sci8n): New functions.
128 (insert_sd4h, extract_sd4h): New functions.
129 (insert_sd4w, extract_sd4w): New functions.
130 (insert_vlesi, extract_vlesi): New functions.
131 (insert_vlensi, extract_vlensi): New functions.
132 (insert_vleui, extract_vleui): New functions.
133 (insert_vleil, extract_vleil): New functions.
134 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
135 (BI16, BI32, BO32, B8): New.
136 (B15, B24, CRD32, CRS): New.
137 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
138 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
139 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
140 (SH6_MASK): Use PPC_OPSHIFT_INV.
141 (SI8, UI5, OIMM5, UI7, BO16): New.
142 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
143 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
144 (ALLOW8_SPRG): New.
145 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
146 (OPVUP, OPVUP_MASK OPVUP): New
147 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
148 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
149 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
150 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
151 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
152 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
153 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
154 (SE_IM5, SE_IM5_MASK): New.
155 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
156 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
157 (BO32DNZ, BO32DZ): New.
158 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
159 (PPCVLE): New.
160 (powerpc_opcodes): Add new VLE instructions. Update existing
161 instruction to include PPCVLE if supported.
162 * ppc-dis.c (ppc_opts): Add vle entry.
163 (get_powerpc_dialect): New function.
164 (powerpc_init_dialect): VLE support.
165 (print_insn_big_powerpc): Call get_powerpc_dialect.
166 (print_insn_little_powerpc): Likewise.
167 (operand_value_powerpc): Handle negative shift counts.
168 (print_insn_powerpc): Handle 2-byte instruction lengths.
169
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1702012-05-11 Daniel Richard G. <skunk@iskunk.org>
171
172 PR binutils/14028
173 * configure.in: Invoke ACX_HEADER_STRING.
174 * configure: Regenerate.
175 * config.in: Regenerate.
176 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
177 string.h and strings.h.
178
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1792012-05-11 Nick Clifton <nickc@redhat.com>
180
181 PR binutils/14006
182 * arm-dis.c (print_insn): Fix detection of instruction mode in
183 files containing multiple executable sections.
184
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1852012-05-03 Sean Keys <skeys@ipdatasys.com>
186
187 * Makefile.in, configure: regenerate
188 * disassemble.c (disassembler): Recognize ARCH_XGATE.
189 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
190 New functions.
191 * configure.in: Recognize xgate.
192 * xgate-dis.c, xgate-opc.c: New files for support of xgate
193 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
194 and opcode generation for xgate.
195
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1962012-04-30 DJ Delorie <dj@redhat.com>
197
198 * rx-decode.opc (MOV): Do not sign-extend immediates which are
199 already the maximum bit size.
200 * rx-decode.c: Regenerate.
201
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2022012-04-27 David S. Miller <davem@davemloft.net>
203
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204 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
205 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
206
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207 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
208 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
209
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210 * sparc-opc.c (CBCOND): New define.
211 (CBCOND_XCC): Likewise.
212 (cbcond): New helper macro.
213 (sparc_opcodes): Add compare-and-branch instructions.
214
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215 * sparc-dis.c (print_insn_sparc): Handle ')'.
216 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
217
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218 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
219 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
220
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2212012-04-12 David S. Miller <davem@davemloft.net>
222
223 * sparc-dis.c (X_DISP10): Define.
224 (print_insn_sparc): Handle '='.
225
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2262012-04-01 Mike Frysinger <vapier@gentoo.org>
227
228 * bfin-dis.c (fmtconst): Replace decimal handling with a single
229 sprintf call and the '*' field width.
230
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2312012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
232
233 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
234
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2352012-03-16 Alan Modra <amodra@gmail.com>
236
237 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
238 (powerpc_opcd_indices): Bump array size.
239 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
240 corresponding to unused opcodes to following entry.
241 (lookup_powerpc): New function, extracted and optimised from..
242 (print_insn_powerpc): ..here.
243
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2442012-03-15 Alan Modra <amodra@gmail.com>
245 James Lemke <jwlemke@codesourcery.com>
246
247 * disassemble.c (disassemble_init_for_target): Handle ppc init.
248 * ppc-dis.c (private): New var.
249 (powerpc_init_dialect): Don't return calloc failure, instead use
250 private.
251 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
252 (powerpc_opcd_indices): New array.
253 (disassemble_init_powerpc): New function.
254 (print_insn_big_powerpc): Don't init dialect here.
255 (print_insn_little_powerpc): Likewise.
256 (print_insn_powerpc): Start search using powerpc_opcd_indices.
257
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2582012-03-10 Edmar Wienskoski <edmar@freescale.com>
259
260 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
261 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
262 (PPCVEC2, PPCTMR, E6500): New short names.
263 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
264 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
265 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
266 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
267 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
268 optional operands on sync instruction for E6500 target.
269
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2702012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
271
272 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
273
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2742012-02-27 Alan Modra <amodra@gmail.com>
275
276 * mt-dis.c: Regenerate.
277
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2782012-02-27 Alan Modra <amodra@gmail.com>
279
280 * v850-opc.c (extract_v8): Rearrange to make it obvious this
281 is the inverse of corresponding insert function.
282 (extract_d22, extract_u9, extract_r4): Likewise.
283 (extract_d9): Correct sign extension.
284 (extract_d16_15): Don't assume "long" is 32 bits, and don't
285 rely on implementation defined behaviour for shift right of
286 signed types.
287 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
288 (extract_d23): Likewise, and correct mask.
289
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2902012-02-27 Alan Modra <amodra@gmail.com>
291
292 * crx-dis.c (print_arg): Mask constant to 32 bits.
293 * crx-opc.c (cst4_map): Use int array.
294
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2952012-02-27 Alan Modra <amodra@gmail.com>
296
297 * arc-dis.c (BITS): Don't use shifts to mask off bits.
298 (FIELDD): Sign extend with xor,sub.
299
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3002012-02-25 Walter Lee <walt@tilera.com>
301
302 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
303 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
304 TILEPRO_OPC_LW_TLS_SN.
305
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3062012-02-21 H.J. Lu <hongjiu.lu@intel.com>
307
308 * i386-opc.h (HLEPrefixNone): New.
309 (HLEPrefixLock): Likewise.
310 (HLEPrefixAny): Likewise.
311 (HLEPrefixRelease): Likewise.
312
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3132012-02-08 H.J. Lu <hongjiu.lu@intel.com>
314
315 * i386-dis.c (HLE_Fixup1): New.
316 (HLE_Fixup2): Likewise.
317 (HLE_Fixup3): Likewise.
318 (Ebh1): Likewise.
319 (Evh1): Likewise.
320 (Ebh2): Likewise.
321 (Evh2): Likewise.
322 (Ebh3): Likewise.
323 (Evh3): Likewise.
324 (MOD_C6_REG_7): Likewise.
325 (MOD_C7_REG_7): Likewise.
326 (RM_C6_REG_7): Likewise.
327 (RM_C7_REG_7): Likewise.
328 (XACQUIRE_PREFIX): Likewise.
329 (XRELEASE_PREFIX): Likewise.
330 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
331 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
332 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
333 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
334 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
335 MOD_C6_REG_7 and MOD_C7_REG_7.
336 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
337 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
338 xtest.
339 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
340 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
341
342 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
343 CPU_RTM_FLAGS.
344 (cpu_flags): Add CpuHLE and CpuRTM.
345 (opcode_modifiers): Add HLEPrefixOk.
346
347 * i386-opc.h (CpuHLE): New.
348 (CpuRTM): Likewise.
349 (HLEPrefixOk): Likewise.
350 (i386_cpu_flags): Add cpuhle and cpurtm.
351 (i386_opcode_modifier): Add hleprefixok.
352
353 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
354 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
355 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
356 operand. Add xacquire, xrelease, xabort, xbegin, xend and
357 xtest.
358 * i386-init.h: Regenerated.
359 * i386-tbl.h: Likewise.
360
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3612012-01-24 DJ Delorie <dj@redhat.com>
362
363 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
364 * rl78-decode.c: Regenerate.
365
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3662012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
367
368 PR binutils/10173
369 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
370
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3712012-01-17 Andreas Schwab <schwab@linux-m68k.org>
372
373 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
374 register and move them after pmove with PSR/PCSR register.
375
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3762012-01-13 H.J. Lu <hongjiu.lu@intel.com>
377
378 * i386-dis.c (mod_table): Add vmfunc.
379
380 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
381 (cpu_flags): CpuVMFUNC.
382
383 * i386-opc.h (CpuVMFUNC): New.
384 (i386_cpu_flags): Add cpuvmfunc.
385
386 * i386-opc.tbl: Add vmfunc.
387 * i386-init.h: Regenerated.
388 * i386-tbl.h: Likewise.
5011093d 389
23e1d329 390For older changes see ChangeLog-2011
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391\f
392Local Variables:
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393mode: change-log
394left-margin: 8
395fill-column: 74
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396version-control: never
397End:
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