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Add new Chinese (simplified) translation
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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32fba81d
NC		 12006-01-16 Nick Clifton <nickc@redhat.com>
2
3 * po/zh_CN.po: New Chinese (simplified) translation.
4 * configure.in (ALL_LINGUAS): Add "zh_CH".
5 * configure: Regenerate.
6
1b3a26b5
PB		 72006-01-05 Paul Brook <paul@codesourcery.com>
8
9 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
10
db313fa6
DD		 112006-01-06 DJ Delorie <dj@redhat.com>
12
13 * m32c-desc.c: Regenerate.
14 * m32c-opc.c: Regenerate.
15 * m32c-opc.h: Regenerate.
16
54d46aca
DD		 172006-01-03 DJ Delorie <dj@redhat.com>
18
19 * cgen-ibld.in (extract_normal): Avoid memory range errors.
20 * m32c-ibld.c: Regenerated.
21
c85a332d
AM		 222005-12-27 Alan Modra <amodra@bigpond.net.au>
23
24 * Makefile.am: Run "make dep-am".
25 * Makefile.in: Regenerate.
26 * po/POTFILES.in: Regenerate.
27
54758c3e
NC		 282005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
29
30 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
31 invokevirtual, invokespecial, invokestatic, invokeinterface,
32 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
33 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
34 getstatic_quick, putstatic_quick, getstatic2_quick,
35 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
36 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
37 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
38 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
39 getfield_quick_w, putfield_quick_w, nonnull_quick,
40 agetfield_quick, aputfield_quick, agetstatic_quick,
41 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
42 opcodes.
43
d031aafb
NS		 442005-12-16 Nathan Sidwell <nathan@codesourcery.com>
45
46 Second part of ms1 to mt renaming.
47 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
48 (stamp-mt): Adjust rule.
49 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
50 adjust.
51 * Makefile.in: Rebuilt.
52 * configure: Rebuilt.
53 * configure.in (bfd_mt_arch): Rename & adjust.
54 * disassemble.c (ARCH_mt): Renamed.
55 (disassembler): Adjust.
56 * mt-asm.c: Renamed, rebuilt.
57 * mt-desc.c: Renamed, rebuilt.
58 * mt-desc.h: Renamed, rebuilt.
59 * mt-dis.c: Renamed, rebuilt.
60 * mt-ibld.c: Renamed, rebuilt.
61 * mt-opc.c: Renamed, rebuilt.
62 * mt-opc.h: Renamed, rebuilt.
63
eda87aba
DD		 642005-12-13 DJ Delorie <dj@redhat.com>
65
66 * m32c-desc.c: Regenerate.
67 * m32c-opc.c: Regenerate.
68 * m32c-opc.h: Regenerate.
69
4970f871
NS		 702005-12-12 Nathan Sidwell <nathan@codesourcery.com>
71
72 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
73 * Makefile.in: Rebuilt.
74 * configure.in: Replace ms1 files with mt files.
75 * configure: Rebuilt.
76
272c9217
JB		 772005-12-08 Jan Beulich <jbeulich@novell.com>
78
79 * i386-dis.c (MAXLEN): Reduce to architectural limit.
80 (fetch_data): Check for sufficient buffer size.
81
422673a9
JB		 822005-12-08 Jan Beulich <jbeulich@novell.com>
83
84 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
85
6e50d963
AM		 862005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
87
88 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
89
cf54500c
HPN		 902005-12-07 Hans-Peter Nilsson <hp@axis.com>
91
92 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
93 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
94
cb712a9e
L		 952005-12-06 H.J. Lu <hongjiu.lu@intel.com>
96
97 PR gas/1874
98 * i386-dis.c (address_mode): New enum type.
99 (address_mode): New variable.
100 (mode_64bit): Removed.
101 (ckprefix): Updated to check address_mode instead of mode_64bit.
102 (prefix_name): Likewise.
103 (print_insn): Likewise.
104 (putop): Likewise.
105 (print_operand_value): Likewise.
106 (intel_operand_size): Likewise.
107 (OP_E): Likewise.
108 (OP_G): Likewise.
109 (set_op): Likewise.
110 (OP_REG): Likewise.
111 (OP_I): Likewise.
112 (OP_I64): Likewise.
113 (OP_OFF): Likewise.
114 (OP_OFF64): Likewise.
115 (ptr_reg): Likewise.
116 (OP_C): Likewise.
117 (SVME_Fixup): Likewise.
118 (print_insn): Set address_mode.
119 (PNI_Fixup): Add 64bit and address size override support for
120 monitor and mwait.
121
cdedc9f0
HPN		 1222005-12-06 Hans-Peter Nilsson <hp@axis.com>
123
124 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
125 (print_with_operands): Check for prefix when [PC+] is seen.
126
3609e0fe
DB		 1272005-12-02 Dave Brolley <brolley@redhat.com>
128
129 * configure.in (cgen_files): Add cgen-bitset.lo.
130 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
131 * Makefile.am (CFILES): Add cgen-bitset.c.
132 (ALL_MACHINES): Add cgen-bitset.lo.
133 (cgen-bitset.lo): New target.
6e50d963
AM		 134 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
135 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
136 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
3609e0fe
DB		 137 (cgen_bitset_union): Moved from here ...
138 * cgen-bitset.c: ... to here. New file.
139 * Makefile.in: Regenerated.
140 * configure: Regenerated.
141
aa2273ba
JW		 1422005-11-22 James E Wilson <wilson@specifix.com>
143
144 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
145 opcode_fprintf_vma): New.
146 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
147
ce7a772b
AM		 1482005-11-16 Alan Modra <amodra@bigpond.net.au>
149
150 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
151 frsqrtes.
152
0499d65b
TS		 1532005-11-14 David Ung <davidu@mips.com>
154
155 * mips16-opc.c: Add MIPS16e save/restore opcodes.
156 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
157 codes for save/restore.
158
dc82c973
AS		 1592005-11-10 Andreas Schwab <schwab@suse.de>
160
161 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
162 coprocessor ID 1.
163
dbb33a87
NC		 1642005-11-08 H.J. Lu <hongjiu.lu@intel.com>
165
166 * m32c-desc.c: Regenerated.
167
6f84a2a6
NS		 1682005-11-08 Nathan Sidwell <nathan@codesourcery.com>
169
170 Add ms2.
171 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
172 ms1-opc.c, ms1-opc.h: Regenerated.
173
a541e3ce
SE		 1742005-11-07 Steve Ellcey <sje@cup.hp.com>
175
176 * configure: Regenerate after modifying bfd/warning.m4.
177
3e7d61b2
AM		 1782005-11-07 Alan Modra <amodra@bigpond.net.au>
179
180 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
181 ignored rex prefixes here.
182 (print_insn): Instead, handle them similarly to fwait followed
183 by non-fp insns.
184
a92e0d0a
L		 1852005-11-02 H.J. Lu <hongjiu.lu@intel.com>
186
187 * iq2000-desc.c: Regenerated.
188 * iq2000-desc.h: Likewise.
189 * iq2000-dis.c: Likewise.
190 * iq2000-opc.c: Likewise.
191
36b0c57d
PB		 1922005-11-02 Paul Brook <paul@codesourcery.com>
193
194 * arm-dis.c (print_insn_thumb32): Word align blx target address.
195
9a2ff3f5
AM		 1962005-10-31 Alan Modra <amodra@bigpond.net.au>
197
198 * arm-dis.c (print_insn): Warning fix.
199
9e5169a8
L		 2002005-10-30 H.J. Lu <hongjiu.lu@intel.com>
201
202 * Makefile.am: Run "make dep-am".
203 * Makefile.in: Regenerated.
204
205 * dep-in.sed: Replace " ./" with " ".
206
fb53f5a8
DB		 2072005-10-28 Dave Brolley <brolley@redhat.com>
208
209 * All CGEN-generated sources: Regenerate.
210
211 Contribute the following changes:
212 2005-09-19 Dave Brolley <brolley@redhat.com>
213
214 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
215 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
216 bfd_arch_m32c case.
217
218 2005-02-16 Dave Brolley <brolley@redhat.com>
219
220 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
221 cgen_isa_mask_* to cgen_bitset_*.
222 * cgen-opc.c: Likewise.
223
224 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
225
226 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
227 * *-dis.c: Regenerate.
228
229 2003-06-05 DJ Delorie <dj@redhat.com>
230
231 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
232 it, as it may point to a reused buffer. Set prev_isas when we
233 change cpus.
234
235 2002-12-13 Dave Brolley <brolley@redhat.com>
236
237 * cgen-opc.c (cgen_isa_mask_create): New support function for
238 CGEN_ISA_MASK.
239 (cgen_isa_mask_init): Ditto.
240 (cgen_isa_mask_clear): Ditto.
241 (cgen_isa_mask_add): Ditto.
242 (cgen_isa_mask_set): Ditto.
243 (cgen_isa_supported): Ditto.
244 (cgen_isa_mask_compare): Ditto.
245 (cgen_isa_mask_intersection): Ditto.
246 (cgen_isa_mask_copy): Ditto.
247 (cgen_isa_mask_combine): Ditto.
248 * cgen-dis.in (libiberty.h): #include it.
249 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
250 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
251 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
252 * Makefile.in: Regenerated.
253
c6552317
DD		 2542005-10-27 DJ Delorie <dj@redhat.com>
255
256 * m32c-asm.c: Regenerate.
257 * m32c-desc.c: Regenerate.
258 * m32c-desc.h: Regenerate.
259 * m32c-dis.c: Regenerate.
260 * m32c-ibld.c: Regenerate.
261 * m32c-opc.c: Regenerate.
262 * m32c-opc.h: Regenerate.
263
f75eb1c0
DD		 2642005-10-26 DJ Delorie <dj@redhat.com>
265
266 * m32c-asm.c: Regenerate.
267 * m32c-desc.c: Regenerate.
268 * m32c-desc.h: Regenerate.
269 * m32c-dis.c: Regenerate.
270 * m32c-ibld.c: Regenerate.
271 * m32c-opc.c: Regenerate.
272 * m32c-opc.h: Regenerate.
273
f1022c90
PB		 2742005-10-26 Paul Brook <paul@codesourcery.com>
275
276 * arm-dis.c (arm_opcodes): Correct "sel" entry.
277
e277c00b
AM		 2782005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
279
280 * m32r-asm.c: Regenerate.
281
92e0a941
DD		 2822005-10-25 DJ Delorie <dj@redhat.com>
283
284 * m32c-asm.c: Regenerate.
285 * m32c-desc.c: Regenerate.
286 * m32c-desc.h: Regenerate.
287 * m32c-dis.c: Regenerate.
288 * m32c-ibld.c: Regenerate.
289 * m32c-opc.c: Regenerate.
290 * m32c-opc.h: Regenerate.
291
3c9b82ba
NC		 2922005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
293
294 * configure.in: Add target architecture bfd_arch_z80.
295 * configure: Regenerated.
3e7d61b2 296 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 297 bfd_arch_z80.
298 * z80-dis.c: New file.
299
3caac5b8
AM		 3002005-10-25 Alan Modra <amodra@bigpond.net.au>
301
302 * po/POTFILES.in: Regenerate.
303 * po/opcodes.pot: Regenerate.
304
6a2375c6
JB		 3052005-10-24 Jan Beulich <jbeulich@novell.com>
306
307 * ia64-asmtab.c: Regenerate.
308
a1a280bb
DD		 3092005-10-21 DJ Delorie <dj@redhat.com>
310
311 * m32c-asm.c: Regenerate.
312 * m32c-desc.c: Regenerate.
313 * m32c-desc.h: Regenerate.
314 * m32c-dis.c: Regenerate.
315 * m32c-ibld.c: Regenerate.
316 * m32c-opc.c: Regenerate.
317 * m32c-opc.h: Regenerate.
318
b7d48530
NC		 3192005-10-21 Nick Clifton <nickc@redhat.com>
320
321 * bfin-dis.c: Tidy up code, removing redundant constructs.
322
8dd744b6
MS		 3232005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
324
325 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
326 instructions.
327
e74eb924
NC		 3282005-10-18 Nick Clifton <nickc@redhat.com>
329
330 * m32r-asm.c: Regenerate after updating m32r.opc.
331
471e4e36
JZ		 3322005-10-18 Jie Zhang <jie.zhang@analog.com>
333
334 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
335 reading instruction from memory.
336
5e03663f
NC		 3372005-10-18 Nick Clifton <nickc@redhat.com>
338
339 * m32r-asm.c: Regenerate after updating m32r.opc.
340
ab7c9a26
NC		 3412005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
342
343 * m32r-asm.c: Regenerate after updating m32r.opc.
344
19590ef7
RE		 3452005-10-08 James Lemke <jim@wasabisystems.com>
346
347 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
348 operations.
349
6edfbbad
DJ		 3502005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
351
352 * ppc-dis.c (struct dis_private): Remove.
353 (powerpc_dialect): Avoid aliasing warnings.
354 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
355
095f2843
NC		 3562005-09-30 Nick Clifton <nickc@redhat.com>
357
358 * po/ga.po: New Irish translation.
359 * configure.in (ALL_LINGUAS): Add "ga".
360 * configure: Regenerate.
361
fdd3b9b3
L		 3622005-09-30 H.J. Lu <hongjiu.lu@intel.com>
363
364 * Makefile.am: Run "make dep-am".
365 * Makefile.in: Regenerated.
366 * aclocal.m4: Likewise.
367 * configure: Likewise.
368
4b7f6baa
CM		 3692005-09-30 Catherine Moore <clm@cm00re.com>
370
371 * Makefile.am: Bfin support.
372 * Makefile.in: Regenerated.
373 * aclocal.m4: Regenerated.
374 * bfin-dis.c: New file.
375 * configure.in: Bfin support.
376 * configure: Regenerated.
377 * disassemble.c (ARCH_bfin): Define.
378 (disassembler): Add case for bfd_arch_bfin.
379
1a114b12
JB		 3802005-09-28 Jan Beulich <jbeulich@novell.com>
381
382 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
383 (indirEv): Use it.
384 (stackEv): New.
385 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
386 (dis386): Document and use new 'V' meta character. Use it for
387 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
388 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
389 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
390 data prefix as used whenever DFLAG was examined. Handle 'V'.
391 (intel_operand_size): Use stack_v_mode.
392 (OP_E): Use stack_v_mode, but handle only the special case of
393 64-bit mode without operand size override here; fall through to
394 v_mode case otherwise.
395 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
396 and no operand size override is present.
397 (OP_J): Use get32s for obtaining the displacement also when rex64
398 is present.
399
3eb17e6b
PB		 4002005-09-08 Paul Brook <paul@codesourcery.com>
401
402 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
403
61cc0267
CF		 4042005-09-06 Chao-ying Fu <fu@mips.com>
405
406 * mips-opc.c (MT32): New define.
407 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
408 bottom to avoid opcode collision with "mftr" and "mttr".
409 Add MT instructions.
410 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
411 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
412 formats.
413
b13dd07a
PB		 4142005-09-02 Paul Brook <paul@codesourcery.com>
415
416 * arm-dis.c (coprocessor_opcodes): Add null terminator.
417
8f06b2d8
PB		 4182005-09-02 Paul Brook <paul@codesourcery.com>
419
420 * arm-dis.c (coprocessor_opcodes): New.
421 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
422 (print_insn_coprocessor): New function.
423 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
424 format characters.
425 (print_insn_thumb32): Use print_insn_coprocessor.
426
a2dfd01f
PB		 4272005-08-30 Paul Brook <paul@codesourcery.com>
428
429 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
430
3f31e633
JB		 4312005-08-26 Jan Beulich <jbeulich@novell.com>
432
433 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
434 re-use.
435 (OP_E): Call intel_operand_size, move call site out of mode
436 dependent code.
437 (OP_OFF): Call intel_operand_size if suffix_always. Remove
438 ATTRIBUTE_UNUSED from parameters.
439 (OP_OFF64): Likewise.
440 (OP_ESreg): Call intel_operand_size.
441 (OP_DSreg): Likewise.
442 (OP_DIR): Use colon rather than semicolon as separator of far
443 jump/call operands.
444
fd25c5a9
CF		 4452005-08-25 Chao-ying Fu <fu@mips.com>
446
447 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
448 (mips_builtin_opcodes): Add DSP instructions.
449 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
450 mips64, mips64r2.
451 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
452 operand formats.
453
dd8b7c22
DU		 4542005-08-23 David Ung <davidu@mips.com>
455
456 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 457 instructions to the table.
dd8b7c22 458
c17ae8a2
AM		 4592005-08-18 Alan Modra <amodra@bigpond.net.au>
460
848cf006 461 * a29k-dis.c: Delete.
c17ae8a2
AM		 462 * Makefile.am: Remove a29k support.
463 * configure.in: Likewise.
464 * disassemble.c: Likewise.
465 * Makefile.in: Regenerate.
466 * configure: Regenerate.
467 * po/POTFILES.in: Regenerate.
468
36ae0db3
DJ		 4692005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
470
471 * ppc-dis.c (powerpc_dialect): Handle e300.
472 (print_ppc_disassembler_options): Likewise.
473 * ppc-opc.c (PPCE300): Define.
474 (powerpc_opcodes): Mark icbt as available for the e300.
475
63a3357b
DA		 4762005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
477
478 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
479 Use "rp" instead of "%r2" in "b,l" insns.
480
ad101263
MS		 4812005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
482
483 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
484 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
485 (main): Likewise.
486 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
487 and 4 bit optional masks.
488 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
489 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
490 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
491 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
492 (s390_opformats): Likewise.
493 * s390-opc.txt: Add new instructions for cpu type z9-109.
494
f1fa1093
DA		 4952005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
496
497 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
498
e9f89963
PB		 4992005-07-29 Paul Brook <paul@codesourcery.com>
500
501 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
502
92e90b6e
PB		 5032005-07-29 Paul Brook <paul@codesourcery.com>
504
505 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
506 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
507
fd54057a
DD		 5082005-07-25 DJ Delorie <dj@redhat.com>
509
510 * m32c-asm.c Regenerate.
511 * m32c-dis.c Regenerate.
512
760c0f6a
DD		 5132005-07-20 DJ Delorie <dj@redhat.com>
514
515 * disassemble.c (disassemble_init_for_target): M32C ISAs are
516 enums, so convert them to bit masks, which attributes are.
517
85da3a56
NC		 5182005-07-18 Nick Clifton <nickc@redhat.com>
519
520 * configure.in: Restore alpha ordering to list of arches.
521 * configure: Regenerate.
522 * disassemble.c: Restore alpha ordering to list of arches.
523
5242005-07-18 Nick Clifton <nickc@redhat.com>
525
526 * m32c-asm.c: Regenerate.
527 * m32c-desc.c: Regenerate.
528 * m32c-desc.h: Regenerate.
529 * m32c-dis.c: Regenerate.
530 * m32c-ibld.h: Regenerate.
531 * m32c-opc.c: Regenerate.
532 * m32c-opc.h: Regenerate.
533
22cbf2e7
L		 5342005-07-18 H.J. Lu <hongjiu.lu@intel.com>
535
536 * i386-dis.c (PNI_Fixup): Update comment.
537 (VMX_Fixup): Properly handle the suffix check.
538
0aea0460
DA		 5392005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
540
541 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
542 mfctl disassembly.
543
0f82ff91
AM		 5442005-07-16 Alan Modra <amodra@bigpond.net.au>
545
546 * Makefile.am: Run "make dep-am".
547 (stamp-m32c): Fix cpu dependencies.
548 * Makefile.in: Regenerate.
549 * ip2k-dis.c: Regenerate.
550
90700ea2
L		 5512007-07-15 H.J. Lu <hongjiu.lu@intel.com>
552
553 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
554 (VMX_Fixup): New. Fix up Intel VMX Instructions.
555 (Em): New.
556 (Gm): New.
557 (VM): New.
558 (dis386_twobyte): Updated entries 0x78 and 0x79.
559 (twobyte_has_modrm): Likewise.
560 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
561 (OP_G): Handle m_mode.
562
49f58d10
JB		 5632005-07-14 Jim Blandy <jimb@redhat.com>
564
565 Add support for the Renesas M32C and M16C.
566 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
567 * m32c-desc.h, m32c-opc.h: New.
568 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
569 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
570 m32c-opc.c.
571 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
572 m32c-ibld.lo, m32c-opc.lo.
573 (CLEANFILES): List stamp-m32c.
574 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
575 (CGEN_CPUS): Add m32c.
576 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
577 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
578 (m32c_opc_h): New variable.
579 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
580 (m32c-opc.lo): New rules.
581 * Makefile.in: Regenerated.
582 * configure.in: Add case for bfd_m32c_arch.
583 * configure: Regenerated.
584 * disassemble.c (ARCH_m32c): New.
585 [ARCH_m32c]: #include "m32c-desc.h".
586 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
587 (disassemble_init_for_target) [ARCH_m32c]: Same.
588
589 * cgen-ops.h, cgen-types.h: New files.
590 * Makefile.am (HFILES): List them.
591 * Makefile.in: Regenerated.
3e7d61b2 592
0fd3a477
JW		 5932005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
594
595 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
596 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
597 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
598 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
599 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
600 v850-dis.c: Fix format bugs.
601 * ia64-gen.c (fail, warn): Add format attribute.
602 * or32-opc.c (debug): Likewise.
603
22f8fcbd
NC		 6042005-07-07 Khem Raj <kraj@mvista.com>
605
606 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
607 disassembly pattern.
608
d125c27b
AM		 6092005-07-06 Alan Modra <amodra@bigpond.net.au>
610
611 * Makefile.am (stamp-m32r): Fix path to cpu files.
612 (stamp-m32r, stamp-iq2000): Likewise.
613 * Makefile.in: Regenerate.
614 * m32r-asm.c: Regenerate.
615 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
616 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
617
3ec2b351
NC		 6182005-07-05 Nick Clifton <nickc@redhat.com>
619
620 * iq2000-asm.c: Regenerate.
621 * ms1-asm.c: Regenerate.
622
30123838
JB		 6232005-07-05 Jan Beulich <jbeulich@novell.com>
624
625 * i386-dis.c (SVME_Fixup): New.
626 (grps): Use it for the lidt entry.
627 (PNI_Fixup): Call OP_M rather than OP_E.
628 (INVLPG_Fixup): Likewise.
629
b0eec63e
L		 6302005-07-04 H.J. Lu <hongjiu.lu@intel.com>
631
632 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
633
47b0e7ad
NC		 6342005-07-01 Nick Clifton <nickc@redhat.com>
635
636 * a29k-dis.c: Update to ISO C90 style function declarations and
637 fix formatting.
638 * alpha-opc.c: Likewise.
639 * arc-dis.c: Likewise.
640 * arc-opc.c: Likewise.
641 * avr-dis.c: Likewise.
642 * cgen-asm.in: Likewise.
643 * cgen-dis.in: Likewise.
644 * cgen-ibld.in: Likewise.
645 * cgen-opc.c: Likewise.
646 * cris-dis.c: Likewise.
647 * d10v-dis.c: Likewise.
648 * d30v-dis.c: Likewise.
649 * d30v-opc.c: Likewise.
650 * dis-buf.c: Likewise.
651 * dlx-dis.c: Likewise.
652 * h8300-dis.c: Likewise.
653 * h8500-dis.c: Likewise.
654 * hppa-dis.c: Likewise.
655 * i370-dis.c: Likewise.
656 * i370-opc.c: Likewise.
657 * m10200-dis.c: Likewise.
658 * m10300-dis.c: Likewise.
659 * m68k-dis.c: Likewise.
660 * m88k-dis.c: Likewise.
661 * mips-dis.c: Likewise.
662 * mmix-dis.c: Likewise.
663 * msp430-dis.c: Likewise.
664 * ns32k-dis.c: Likewise.
665 * or32-dis.c: Likewise.
666 * or32-opc.c: Likewise.
667 * pdp11-dis.c: Likewise.
668 * pj-dis.c: Likewise.
669 * s390-dis.c: Likewise.
670 * sh-dis.c: Likewise.
671 * sh64-dis.c: Likewise.
672 * sparc-dis.c: Likewise.
673 * sparc-opc.c: Likewise.
674 * sysdep.h: Likewise.
675 * tic30-dis.c: Likewise.
676 * tic4x-dis.c: Likewise.
677 * tic80-dis.c: Likewise.
678 * v850-dis.c: Likewise.
679 * v850-opc.c: Likewise.
680 * vax-dis.c: Likewise.
681 * w65-dis.c: Likewise.
682 * z8kgen.c: Likewise.
3e7d61b2 683
47b0e7ad
NC		 684 * fr30-*: Regenerate.
685 * frv-*: Regenerate.
686 * ip2k-*: Regenerate.
687 * iq2000-*: Regenerate.
688 * m32r-*: Regenerate.
689 * ms1-*: Regenerate.
690 * openrisc-*: Regenerate.
691 * xstormy16-*: Regenerate.
692
cc16ba8c
BE		 6932005-06-23 Ben Elliston <bje@gnu.org>
694
695 * m68k-dis.c: Use ISC C90.
696 * m68k-opc.c: Formatting fixes.
697
4b185e97
DU		 6982005-06-16 David Ung <davidu@mips.com>
699
3e7d61b2
AM		 700 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
701 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 702
ac188222
DB		 7032005-06-15 Dave Brolley <brolley@redhat.com>
704
705 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 706 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 707 ms1-opc.h: New files, Morpho ms1 target.
708
709 2004-05-14 Stan Cox <scox@redhat.com>
710
711 * disassemble.c (ARCH_ms1): Define.
712 (disassembler): Handle bfd_arch_ms1
713
714 2004-05-13 Michael Snyder <msnyder@redhat.com>
715
716 * Makefile.am, Makefile.in: Add ms1 target.
717 * configure.in: Ditto.
718
6b5d3a4d
ZW		 7192005-06-08 Zack Weinberg <zack@codesourcery.com>
720
721 * arm-opc.h: Delete; fold contents into ...
722 * arm-dis.c: ... here. Move includes of internal COFF headers
723 next to includes of internal ELF headers.
724 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
725 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
726 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
727 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
728 (iwmmxt_wwnames, iwmmxt_wwssnames):
729 Make const.
730 (regnames): Remove iWMMXt coprocessor register sets.
731 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
732 (get_arm_regnames): Adjust fourth argument to match above changes.
733 (set_iwmmxt_regnames): Delete.
734 (print_insn_arm): Constify 'c'. Use ISO syntax for function
735 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
736 and iwmmxt_cregnames, not set_iwmmxt_regnames.
737 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
738 ISO syntax for function pointer calls.
739
4a5329c6
ZW		 7402005-06-07 Zack Weinberg <zack@codesourcery.com>
741
742 * arm-dis.c: Split up the comments describing the format codes, so
743 that the ARM and 16-bit Thumb opcode tables each have comments
744 preceding them that describe all the codes, and only the codes,
745 valid in those tables. (32-bit Thumb table is already like this.)
746 Reorder the lists in all three comments to match the order in
747 which the codes are implemented.
748 Remove all forward declarations of static functions. Convert all
749 function definitions to ISO C format.
750 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
751 Return nothing.
752 (print_insn_thumb16): Remove unused case 'I'.
753 (print_insn): Update for changed calling convention of subroutines.
754
3d456fa1
JB		 7552005-05-25 Jan Beulich <jbeulich@novell.com>
756
757 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
758 hex (but retain it being displayed as signed). Remove redundant
759 checks. Add handling of displacements for 16-bit addressing in Intel
760 mode.
761
2888cb7a
JB		 7622005-05-25 Jan Beulich <jbeulich@novell.com>
763
764 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
765 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
766 masking of 'rm' in 16-bit memory address handling.
767
1ed8e1e4
AM		 7682005-05-19 Anton Blanchard <anton@samba.org>
769
770 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
771 (print_ppc_disassembler_options): Document it.
772 * ppc-opc.c (SVC_LEV): Define.
773 (LEV): Allow optional operand.
774 (POWER5): Define.
775 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
776 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
777
49cc2e69
KC		 7782005-05-19 Kelley Cook <kcook@gcc.gnu.org>
779
780 * Makefile.in: Regenerate.
781
c19d1205
ZW		 7822005-05-17 Zack Weinberg <zack@codesourcery.com>
783
784 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
785 instructions. Adjust disassembly of some opcodes to match
786 unified syntax.
787 (thumb32_opcodes): New table.
788 (print_insn_thumb): Rename print_insn_thumb16; don't handle
789 two-halfword branches here.
790 (print_insn_thumb32): New function.
791 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
792 and print_insn_thumb32. Be consistent about order of
793 halfwords when printing 32-bit instructions.
794
003519a7
L		 7952005-05-07 H.J. Lu <hongjiu.lu@intel.com>
796
797 PR 843
798 * i386-dis.c (branch_v_mode): New.
799 (indirEv): Use branch_v_mode instead of v_mode.
800 (OP_E): Handle branch_v_mode.
801
920a34a7
L		 8022005-05-07 H.J. Lu <hongjiu.lu@intel.com>
803
804 * d10v-dis.c (dis_2_short): Support 64bit host.
805
5de773c1
NC		 8062005-05-07 Nick Clifton <nickc@redhat.com>
807
808 * po/nl.po: Updated translation.
809
f4321104
NC		 8102005-05-07 Nick Clifton <nickc@redhat.com>
811
812 * Update the address and phone number of the FSF organization in
813 the GPL notices in the following files:
814 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
815 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
816 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
817 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
818 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
819 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
820 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
821 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
822 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
823 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
824 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
825 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
826 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
827 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
828 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
829 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
830 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
831 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
832 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
833 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
834 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
835 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
836 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
837 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
838 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
839 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
840 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
841 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
842 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
843 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
844 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
845 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
846 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
847
10b076a2
JW		 8482005-05-05 James E Wilson <wilson@specifixinc.com>
849
850 * ia64-opc.c: Include sysdep.h before libiberty.h.
851
022716b6
NC		 8522005-05-05 Nick Clifton <nickc@redhat.com>
853
854 * configure.in (ALL_LINGUAS): Add vi.
855 * configure: Regenerate.
856 * po/vi.po: New.
857
db5152b4
JG		 8582005-04-26 Jerome Guitton <guitton@gnat.com>
859
860 * configure.in: Fix the check for basename declaration.
861 * configure: Regenerate.
862
eed0d89a
AM		 8632005-04-19 Alan Modra <amodra@bigpond.net.au>
864
865 * ppc-opc.c (RTO): Define.
866 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
867 entries to suit PPC440.
868
791fe849
MK		 8692005-04-18 Mark Kettenis <kettenis@gnu.org>
870
871 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
872 Add xcrypt-ctr.
873
ffe58f7c
NC		 8742005-04-14 Nick Clifton <nickc@redhat.com>
875
876 * po/fi.po: New translation: Finnish.
877 * configure.in (ALL_LINGUAS): Add fi.
878 * configure: Regenerate.
879
9e9b66a9
AM		 8802005-04-14 Alan Modra <amodra@bigpond.net.au>
881
882 * Makefile.am (NO_WERROR): Define.
883 * configure.in: Invoke AM_BINUTILS_WARNINGS.
884 * Makefile.in: Regenerate.
885 * aclocal.m4: Regenerate.
886 * configure: Regenerate.
887
9494d739
NC		 8882005-04-04 Nick Clifton <nickc@redhat.com>
889
890 * fr30-asm.c: Regenerate.
891 * frv-asm.c: Regenerate.
892 * iq2000-asm.c: Regenerate.
893 * m32r-asm.c: Regenerate.
894 * openrisc-asm.c: Regenerate.
895
6128c599
JB		 8962005-04-01 Jan Beulich <jbeulich@novell.com>
897
898 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
899 visible operands in Intel mode. The first operand of monitor is
900 %rax in 64-bit mode.
901
373ff435
JB		 9022005-04-01 Jan Beulich <jbeulich@novell.com>
903
904 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
905 easier future additions.
906
4bd60896
JG		 9072005-03-31 Jerome Guitton <guitton@gnat.com>
908
909 * configure.in: Check for basename.
910 * configure: Regenerate.
911 * config.in: Ditto.
912
4cc91dba
L		 9132005-03-29 H.J. Lu <hongjiu.lu@intel.com>
914
915 * i386-dis.c (SEG_Fixup): New.
916 (Sv): New.
917 (dis386): Use "Sv" for 0x8c and 0x8e.
918
ec72cfe5
NC		 9192005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
920 Nick Clifton <nickc@redhat.com>
c19d1205 921
ec72cfe5
NC		 922 * vax-dis.c: (entry_addr): New varible: An array of user supplied
923 function entry mask addresses.
924 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 925 elements in entry_addr.
ec72cfe5
NC		 926 (entry_addr_total_slots): New variable: The total number of
927 elements in entry_addr.
928 (parse_disassembler_options): New function. Fills in the entry_addr
929 array.
930 (free_entry_array): New function. Release the memory used by the
931 entry addr array. Suppressed because there is no way to call it.
932 (is_function_entry): Check if a given address is a function's
933 start address by looking at supplied entry mask addresses and
934 symbol information, if available.
935 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
936
85064c79
L		 9372005-03-23 H.J. Lu <hongjiu.lu@intel.com>
938
939 * cris-dis.c (print_with_operands): Use ~31L for long instead
940 of ~31.
941
de7141c7
L		 9422005-03-20 H.J. Lu <hongjiu.lu@intel.com>
943
944 * mmix-opc.c (O): Revert the last change.
945 (Z): Likewise.
946
e493ab45
L		 9472005-03-19 H.J. Lu <hongjiu.lu@intel.com>
948
949 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
950 (Z): Likewise.
951
d8d7c459
HPN		 9522005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
953
954 * mmix-opc.c (O, Z): Force expression as unsigned long.
955
ebdb0383
NC		 9562005-03-18 Nick Clifton <nickc@redhat.com>
957
958 * ip2k-asm.c: Regenerate.
959 * op/opcodes.pot: Regenerate.
960
1ad12f97
NC		 9612005-03-16 Nick Clifton <nickc@redhat.com>
962 Ben Elliston <bje@au.ibm.com>
963
569acd2c 964 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 965 compiler command line. Enabled by default. Disable via
569acd2c 966 --disable-werror.
1ad12f97
NC		 967 * configure: Regenerate.
968
4eb30afc
AM		 9692005-03-16 Alan Modra <amodra@bigpond.net.au>
970
971 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
972 BOOKE.
973
ea8409f7
AM		 9742005-03-15 Alan Modra <amodra@bigpond.net.au>
975
729ae8d2
AM		 976 * po/es.po: Commit new Spanish translation.
977
ea8409f7
AM		 978 * po/fr.po: Commit new French translation.
979
4f495e61
NC		 9802005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
981
982 * vax-dis.c: Fix spelling error
983 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
984 of just "Entry mask: < r1 ... >"
985
0a003adc
ZW		 9862005-03-12 Zack Weinberg <zack@codesourcery.com>
987
988 * arm-dis.c (arm_opcodes): Document %E and %V.
989 Add entries for v6T2 ARM instructions:
990 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
991 (print_insn_arm): Add support for %E and %V.
885fc257 992 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 993
da99ee72
AM		 9942005-03-10 Jeff Baker <jbaker@qnx.com>
995 Alan Modra <amodra@bigpond.net.au>
996
997 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
998 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
999 (SPRG_MASK): Delete.
1000 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 1001 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 1002 mfsprg4..7 after msprg and consolidate.
1003
220abb21
AM		 10042005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1005
1006 * vax-dis.c (entry_mask_bit): New array.
1007 (print_insn_vax): Decode function entry mask.
1008
0e06657a
AH		 10092005-03-07 Aldy Hernandez <aldyh@redhat.com>
1010
1011 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
1012
06647dfd
AM		 10132005-03-05 Alan Modra <amodra@bigpond.net.au>
1014
1015 * po/opcodes.pot: Regenerate.
1016
82b829a7
RR		 10172005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
1018
220abb21 1019 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 1020 (dsmOneArcInst): Use the enum values for the decoding class.
1021 Remove redundant case in the switch for decodingClass value 11.
82b829a7 1022
c4a530c5
JB		 10232005-03-02 Jan Beulich <jbeulich@novell.com>
1024
1025 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1026 accesses.
1027 (OP_C): Consider lock prefix in non-64-bit modes.
1028
47d8304e
AM		 10292005-02-24 Alan Modra <amodra@bigpond.net.au>
1030
1031 * cris-dis.c (format_hex): Remove ineffective warning fix.
1032 * crx-dis.c (make_instruction): Warning fix.
1033 * frv-asm.c: Regenerate.
1034
ec36c4a4
NC		 10352005-02-23 Nick Clifton <nickc@redhat.com>
1036
33b71eeb
NC		 1037 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1038 read_memory.
06647dfd 1039
33b71eeb 1040 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 1041
ec36c4a4
NC		 1042 * crx-dis.c (make_instruction): Move argument structure into inner
1043 scope and ensure that all of its fields are initialised before
1044 they are used.
1045
33b71eeb
NC		 1046 * fr30-asm.c: Regenerate.
1047 * fr30-dis.c: Regenerate.
1048 * frv-asm.c: Regenerate.
1049 * frv-dis.c: Regenerate.
1050 * ip2k-asm.c: Regenerate.
1051 * ip2k-dis.c: Regenerate.
1052 * iq2000-asm.c: Regenerate.
1053 * iq2000-dis.c: Regenerate.
1054 * m32r-asm.c: Regenerate.
1055 * m32r-dis.c: Regenerate.
1056 * openrisc-asm.c: Regenerate.
1057 * openrisc-dis.c: Regenerate.
1058 * xstormy16-asm.c: Regenerate.
1059 * xstormy16-dis.c: Regenerate.
1060
53c9ebc5
AM		 10612005-02-22 Alan Modra <amodra@bigpond.net.au>
1062
1063 * arc-ext.c: Warning fixes.
1064 * arc-ext.h: Likewise.
1065 * cgen-opc.c: Likewise.
1066 * ia64-gen.c: Likewise.
1067 * maxq-dis.c: Likewise.
1068 * ns32k-dis.c: Likewise.
1069 * w65-dis.c: Likewise.
1070 * ia64-asmtab.c: Regenerate.
1071
610ad19b
AM		 10722005-02-22 Alan Modra <amodra@bigpond.net.au>
1073
1074 * fr30-desc.c: Regenerate.
1075 * fr30-desc.h: Regenerate.
1076 * fr30-opc.c: Regenerate.
1077 * fr30-opc.h: Regenerate.
1078 * frv-desc.c: Regenerate.
1079 * frv-desc.h: Regenerate.
1080 * frv-opc.c: Regenerate.
1081 * frv-opc.h: Regenerate.
1082 * ip2k-desc.c: Regenerate.
1083 * ip2k-desc.h: Regenerate.
1084 * ip2k-opc.c: Regenerate.
1085 * ip2k-opc.h: Regenerate.
1086 * iq2000-desc.c: Regenerate.
1087 * iq2000-desc.h: Regenerate.
1088 * iq2000-opc.c: Regenerate.
1089 * iq2000-opc.h: Regenerate.
1090 * m32r-desc.c: Regenerate.
1091 * m32r-desc.h: Regenerate.
1092 * m32r-opc.c: Regenerate.
1093 * m32r-opc.h: Regenerate.
1094 * m32r-opinst.c: Regenerate.
1095 * openrisc-desc.c: Regenerate.
1096 * openrisc-desc.h: Regenerate.
1097 * openrisc-opc.c: Regenerate.
1098 * openrisc-opc.h: Regenerate.
1099 * xstormy16-desc.c: Regenerate.
1100 * xstormy16-desc.h: Regenerate.
1101 * xstormy16-opc.c: Regenerate.
1102 * xstormy16-opc.h: Regenerate.
1103
db9db6f2
AM		 11042005-02-21 Alan Modra <amodra@bigpond.net.au>
1105
1106 * Makefile.am: Run "make dep-am"
1107 * Makefile.in: Regenerate.
1108
bf143b25
NC		 11092005-02-15 Nick Clifton <nickc@redhat.com>
1110
1111 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1112 compile time warnings.
1113 (print_keyword): Likewise.
1114 (default_print_insn): Likewise.
1115
1116 * fr30-desc.c: Regenerated.
1117 * fr30-desc.h: Regenerated.
1118 * fr30-dis.c: Regenerated.
1119 * fr30-opc.c: Regenerated.
1120 * fr30-opc.h: Regenerated.
1121 * frv-desc.c: Regenerated.
1122 * frv-dis.c: Regenerated.
1123 * frv-opc.c: Regenerated.
1124 * ip2k-asm.c: Regenerated.
1125 * ip2k-desc.c: Regenerated.
1126 * ip2k-desc.h: Regenerated.
1127 * ip2k-dis.c: Regenerated.
1128 * ip2k-opc.c: Regenerated.
1129 * ip2k-opc.h: Regenerated.
1130 * iq2000-desc.c: Regenerated.
1131 * iq2000-dis.c: Regenerated.
1132 * iq2000-opc.c: Regenerated.
1133 * m32r-asm.c: Regenerated.
1134 * m32r-desc.c: Regenerated.
1135 * m32r-desc.h: Regenerated.
1136 * m32r-dis.c: Regenerated.
1137 * m32r-opc.c: Regenerated.
1138 * m32r-opc.h: Regenerated.
1139 * m32r-opinst.c: Regenerated.
1140 * openrisc-desc.c: Regenerated.
1141 * openrisc-desc.h: Regenerated.
1142 * openrisc-dis.c: Regenerated.
1143 * openrisc-opc.c: Regenerated.
1144 * openrisc-opc.h: Regenerated.
1145 * xstormy16-desc.c: Regenerated.
1146 * xstormy16-desc.h: Regenerated.
1147 * xstormy16-dis.c: Regenerated.
1148 * xstormy16-opc.c: Regenerated.
1149 * xstormy16-opc.h: Regenerated.
1150
d6098898
L		 11512005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1152
1153 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1154 address.
1155
5a84f3e0
NC		 11562005-02-11 Nick Clifton <nickc@redhat.com>
1157
bc18c937
NC		 1158 * iq2000-asm.c: Regenerate.
1159
5a84f3e0
NC		 1160 * frv-dis.c: Regenerate.
1161
0a40490e
JB		 11622005-02-07 Jim Blandy <jimb@redhat.com>
1163
1164 * Makefile.am (CGEN): Load guile.scm before calling the main
1165 application script.
1166 * Makefile.in: Regenerated.
1167 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1168 Simply pass the cgen-opc.scm path to ${cgen} as its first
1169 argument; ${cgen} itself now contains the '-s', or whatever is
1170 appropriate for the Scheme being used.
1171
c46f8c51
AC		 11722005-01-31 Andrew Cagney <cagney@gnu.org>
1173
1174 * configure: Regenerate to track ../gettext.m4.
1175
60b9a617
JB		 11762005-01-31 Jan Beulich <jbeulich@novell.com>
1177
1178 * ia64-gen.c (NELEMS): Define.
1179 (shrink): Generate alias with missing second predicate register when
1180 opcode has two outputs and these are both predicates.
1181 * ia64-opc-i.c (FULL17): Define.
1182 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1183 here to generate output template.
1184 (TBITCM, TNATCM): Undefine after use.
1185 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1186 first input. Add ld16 aliases without ar.csd as second output. Add
1187 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1188 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1189 ar.ccv as third/fourth inputs. Consolidate through...
1190 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1191 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1192 * ia64-asmtab.c: Regenerate.
1193
a53bf506
AC		 11942005-01-27 Andrew Cagney <cagney@gnu.org>
1195
1196 * configure: Regenerate to track ../gettext.m4 change.
1197
90219bd0
AO		 11982005-01-25 Alexandre Oliva <aoliva@redhat.com>
1199
1200 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1201 * frv-asm.c: Rebuilt.
1202 * frv-desc.c: Rebuilt.
1203 * frv-desc.h: Rebuilt.
1204 * frv-dis.c: Rebuilt.
1205 * frv-ibld.c: Rebuilt.
1206 * frv-opc.c: Rebuilt.
1207 * frv-opc.h: Rebuilt.
1208
45181ed1
AC		 12092005-01-24 Andrew Cagney <cagney@gnu.org>
1210
1211 * configure: Regenerate, ../gettext.m4 was updated.
1212
9e836e3d
FF		 12132005-01-21 Fred Fish <fnf@specifixinc.com>
1214
1215 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1216 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1217 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1218 * mips-dis.c: Ditto.
1219
5e8cb021
AM		 12202005-01-20 Alan Modra <amodra@bigpond.net.au>
1221
1222 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1223
986e18a5
FF		 12242005-01-19 Fred Fish <fnf@specifixinc.com>
1225
1226 * mips-dis.c (no_aliases): New disassembly option flag.
1227 (set_default_mips_dis_options): Init no_aliases to zero.
1228 (parse_mips_dis_option): Handle no-aliases option.
1229 (print_insn_mips): Ignore table entries that are aliases
1230 if no_aliases is set.
1231 (print_insn_mips16): Ditto.
1232 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1233 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1234 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1235 * mips16-opc.c (mips16_opcodes): Ditto.
1236
e38bc3b5
NC		 12372005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1238
1239 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1240 (inheritance diagram): Add missing edge.
1241 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1242 easier for the testsuite.
1243 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1244 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1245 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1246 arch_sh2a_or_sh4_up child.
1247 (sh_table): Do renaming as above.
1248 Correct comment for ldc.l for gas testsuite to read.
1249 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1250 Correct comments for movy.w and movy.l for gas testsuite to read.
1251 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1252
9df48ba9
L		 12532005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1254
1255 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1256
2033b4b9
L		 12572005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1258
1259 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1260
0bcb06d2
AS		 12612005-01-10 Andreas Schwab <schwab@suse.de>
1262
1263 * disassemble.c (disassemble_init_for_target) <case
1264 bfd_arch_ia64>: Set skip_zeroes to 16.
1265 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1266
47add74d
TL		 12672004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1268
1269 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1270
246f4c05
SS		 12712004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1272
1273 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1274 memory references. Convert avr_operand() to C90 formatting.
1275
0e1200e5
TL		 12762004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1277
1278 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1279
89a649f7
TL		 12802004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1281
1282 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1283 (no_op_insn): Initialize array with instructions that have no
1284 operands.
1285 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1286
6255809c
RE		 12872004-11-29 Richard Earnshaw <rearnsha@arm.com>
1288
1289 * arm-dis.c: Correct top-level comment.
1290
2fbad815
RE		 12912004-11-27 Richard Earnshaw <rearnsha@arm.com>
1292
1293 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1294 architecuture defining the insn.
1295 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1296 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1297 field.
2fbad815
RE		 1298 Also include opcode/arm.h.
1299 * Makefile.am (arm-dis.lo): Update dependency list.
1300 * Makefile.in: Regenerate.
1301
d81acc42
NC		 13022004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1303
1304 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1305 reflect the change to the short immediate syntax.
1306
ca4f2377
AM		 13072004-11-19 Alan Modra <amodra@bigpond.net.au>
1308
5da8bf1b
AM		 1309 * or32-opc.c (debug): Warning fix.
1310 * po/POTFILES.in: Regenerate.
1311
ca4f2377
AM		 1312 * maxq-dis.c: Formatting.
1313 (print_insn): Warning fix.
1314
b7693d02
DJ		 13152004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1316
1317 * arm-dis.c (WORD_ADDRESS): Define.
1318 (print_insn): Use it. Correct big-endian end-of-section handling.
1319
300dac7e
NC		 13202004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1321 Vineet Sharma <vineets@noida.hcltech.com>
1322
1323 * maxq-dis.c: New file.
1324 * disassemble.c (ARCH_maxq): Define.
610ad19b 1325 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1326 instructions..
1327 * configure.in: Add case for bfd_maxq_arch.
1328 * configure: Regenerate.
1329 * Makefile.am: Add support for maxq-dis.c
1330 * Makefile.in: Regenerate.
1331 * aclocal.m4: Regenerate.
1332
42048ee7
TL		 13332004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1334
1335 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1336 mode.
1337 * crx-dis.c: Likewise.
1338
bd21e58e
HPN		 13392004-11-04 Hans-Peter Nilsson <hp@axis.com>
1340
1341 Generally, handle CRISv32.
1342 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1343 (struct cris_disasm_data): New type.
1344 (format_reg, format_hex, cris_constraint, print_flags)
1345 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1346 callers changed.
1347 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1348 (print_insn_crisv32_without_register_prefix)
1349 (print_insn_crisv10_v32_with_register_prefix)
1350 (print_insn_crisv10_v32_without_register_prefix)
1351 (cris_parse_disassembler_options): New functions.
1352 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1353 parameter. All callers changed.
1354 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1355 failure.
1356 (cris_constraint) <case 'Y', 'U'>: New cases.
1357 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1358 for constraint 'n'.
1359 (print_with_operands) <case 'Y'>: New case.
1360 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1361 <case 'N', 'Y', 'Q'>: New cases.
1362 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1363 (print_insn_cris_with_register_prefix)
1364 (print_insn_cris_without_register_prefix): Call
1365 cris_parse_disassembler_options.
1366 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1367 for CRISv32 and the size of immediate operands. New v32-only
1368 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1369 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1370 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1371 Change brp to be v3..v10.
1372 (cris_support_regs): New vector.
1373 (cris_opcodes): Update head comment. New format characters '[',
1374 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1375 Add new opcodes for v32 and adjust existing opcodes to accommodate
1376 differences to earlier variants.
1377 (cris_cond15s): New vector.
1378
9306ca4a
JB		 13792004-11-04 Jan Beulich <jbeulich@novell.com>
1380
1381 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1382 (indirEb): Remove.
1383 (Mp): Use f_mode rather than none at all.
1384 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1385 replaces what previously was x_mode; x_mode now means 128-bit SSE
1386 operands.
1387 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1388 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1389 pinsrw's second operand is Edqw.
1390 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1391 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1392 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1393 mode when an operand size override is present or always suffixing.
1394 More instructions will need to be added to this group.
1395 (putop): Handle new macro chars 'C' (short/long suffix selector),
1396 'I' (Intel mode override for following macro char), and 'J' (for
1397 adding the 'l' prefix to far branches in AT&T mode). When an
1398 alternative was specified in the template, honor macro character when
1399 specified for Intel mode.
1400 (OP_E): Handle new *_mode values. Correct pointer specifications for
1401 memory operands. Consolidate output of index register.
1402 (OP_G): Handle new *_mode values.
1403 (OP_I): Handle const_1_mode.
1404 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1405 respective opcode prefix bits have been consumed.
1406 (OP_EM, OP_EX): Provide some default handling for generating pointer
1407 specifications.
1408
f39c96a9
TL		 14092004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1410
1411 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1412 COP_INST macro.
1413
812337be
TL		 14142004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1415
1416 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1417 (getregliststring): Support HI/LO and user registers.
610ad19b 1418 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1419 rearrangement done in CRX opcode header file.
1420 (crx_regtab): Likewise.
1421 (crx_optab): Likewise.
610ad19b 1422 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1423 formats.
1424 support new Co-Processor instruction 'cpi'.
1425
4030fa5a
NC		 14262004-10-27 Nick Clifton <nickc@redhat.com>
1427
1428 * opcodes/iq2000-asm.c: Regenerate.
1429 * opcodes/iq2000-desc.c: Regenerate.
1430 * opcodes/iq2000-desc.h: Regenerate.
1431 * opcodes/iq2000-dis.c: Regenerate.
1432 * opcodes/iq2000-ibld.c: Regenerate.
1433 * opcodes/iq2000-opc.c: Regenerate.
1434 * opcodes/iq2000-opc.h: Regenerate.
1435
fc3d45e8
TL		 14362004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1437
1438 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1439 us4, us5 (respectively).
1440 Remove unsupported 'popa' instruction.
1441 Reverse operands order in store co-processor instructions.
1442
3c55da70
AM		 14432004-10-15 Alan Modra <amodra@bigpond.net.au>
1444
1445 * Makefile.am: Run "make dep-am"
1446 * Makefile.in: Regenerate.
1447
7fa3d080
BW		 14482004-10-12 Bob Wilson <bob.wilson@acm.org>
1449
1450 * xtensa-dis.c: Use ISO C90 formatting.
1451
e612bb4d
AM		 14522004-10-09 Alan Modra <amodra@bigpond.net.au>
1453
1454 * ppc-opc.c: Revert 2004-09-09 change.
1455
43cd72b9
BW		 14562004-10-07 Bob Wilson <bob.wilson@acm.org>
1457
1458 * xtensa-dis.c (state_names): Delete.
1459 (fetch_data): Use xtensa_isa_maxlength.
1460 (print_xtensa_operand): Replace operand parameter with opcode/operand
1461 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1462 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1463 instruction bundles. Use xmalloc instead of malloc.
1464
bbac1f2a
NC		 14652004-10-07 David Gibson <david@gibson.dropbear.id.au>
1466
1467 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1468 initializers.
1469
48c9f030
NC		 14702004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1471
1472 * crx-opc.c (crx_instruction): Support Co-processor insns.
1473 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1474 (getregliststring): Change function to use the above enum.
1475 (print_arg): Handle CO-Processor insns.
1476 (crx_cinvs): Add 'b' option to invalidate the branch-target
1477 cache.
1478
12c64a4e
AH		 14792004-10-06 Aldy Hernandez <aldyh@redhat.com>
1480
1481 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1482 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1483 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1484 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1485 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1486
14127cc4
NC		 14872004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1488
1489 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1490 rather than add it.
1491
0dd132b6
NC		 14922004-09-30 Paul Brook <paul@codesourcery.com>
1493
1494 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1495 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1496
3f85e526
L		 14972004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1498
1499 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1500 (CONFIG_STATUS_DEPENDENCIES): New.
1501 (Makefile): Removed.
1502 (config.status): Likewise.
1503 * Makefile.in: Regenerated.
1504
8ae85421
AM		 15052004-09-17 Alan Modra <amodra@bigpond.net.au>
1506
1507 * Makefile.am: Run "make dep-am".
1508 * Makefile.in: Regenerate.
1509 * aclocal.m4: Regenerate.
1510 * configure: Regenerate.
1511 * po/POTFILES.in: Regenerate.
1512 * po/opcodes.pot: Regenerate.
1513
24443139
AS		 15142004-09-11 Andreas Schwab <schwab@suse.de>
1515
1516 * configure: Rebuild.
1517
2a309db0
AM		 15182004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1519
1520 * ppc-opc.c (L): Make this field not optional.
1521
42851540
NC		 15222004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1523
1524 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1525 Fix parameter to 'm[t|f]csr' insns.
1526
979273e3
NN		 15272004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1528
1529 * configure.in: Autoupdate to autoconf 2.59.
1530 * aclocal.m4: Rebuild with aclocal 1.4p6.
1531 * configure: Rebuild with autoconf 2.59.
1532 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1533 bfd changes for autoconf 2.59 on the way).
1534 * config.in: Rebuild with autoheader 2.59.
1535
ac28a1cb
RS		 15362004-08-27 Richard Sandiford <rsandifo@redhat.com>
1537
1538 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1539
30d1c836
ML		 15402004-07-30 Michal Ludvig <mludvig@suse.cz>
1541
1542 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1543 (GRPPADLCK2): New define.
1544 (twobyte_has_modrm): True for 0xA6.
1545 (grps): GRPPADLCK2 for opcode 0xA6.
1546
0b0ac059
AO		 15472004-07-29 Alexandre Oliva <aoliva@redhat.com>
1548
1549 Introduce SH2a support.
1550 * sh-opc.h (arch_sh2a_base): Renumber.
1551 (arch_sh2a_nofpu_base): Remove.
1552 (arch_sh_base_mask): Adjust.
1553 (arch_opann_mask): New.
1554 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1555 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1556 (sh_table): Adjust whitespace.
1557 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1558 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1559 instruction list throughout.
1560 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1561 of arch_sh2a in instruction list throughout.
1562 (arch_sh2e_up): Accomodate above changes.
1563 (arch_sh2_up): Ditto.
1564 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1565 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1566 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1567 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1568 * sh-opc.h (arch_sh2a_nofpu): New.
1569 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1570 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1571 instruction.
1572 2004-01-20 DJ Delorie <dj@redhat.com>
1573 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1574 2003-12-29 DJ Delorie <dj@redhat.com>
1575 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1576 sh_opcode_info, sh_table): Add sh2a support.
1577 (arch_op32): New, to tag 32-bit opcodes.
1578 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1579 2003-12-02 Michael Snyder <msnyder@redhat.com>
1580 * sh-opc.h (arch_sh2a): Add.
1581 * sh-dis.c (arch_sh2a): Handle.
1582 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1583
670ec21d
NC		 15842004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1585
1586 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1587
ed049af3
NC		 15882004-07-22 Nick Clifton <nickc@redhat.com>
1589
1590 PR/280
1591 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1592 insns - this is done by objdump itself.
1593 * h8500-dis.c (print_insn_h8500): Likewise.
1594
20f0a1fc
NC		 15952004-07-21 Jan Beulich <jbeulich@novell.com>
1596
1597 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1598 regardless of address size prefix in effect.
1599 (ptr_reg): Size or address registers does not depend on rex64, but
1600 on the presence of an address size override.
1601 (OP_MMX): Use rex.x only for xmm registers.
1602 (OP_EM): Use rex.z only for xmm registers.
1603
6f14957b
MR		 16042004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1605
1606 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1607 move/branch operations to the bottom so that VR5400 multimedia
1608 instructions take precedence in disassembly.
1609
1586d91e
MR		 16102004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1611
1612 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1613 ISA-specific "break" encoding.
1614
982de27a
NC		 16152004-07-13 Elvis Chiang <elvisfb@gmail.com>
1616
1617 * arm-opc.h: Fix typo in comment.
1618
4300ab10
AS		 16192004-07-11 Andreas Schwab <schwab@suse.de>
1620
1621 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1622
8577e690
AS		 16232004-07-09 Andreas Schwab <schwab@suse.de>
1624
1625 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1626
1fe1f39c
NC		 16272004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1628
1629 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1630 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1631 (crx-dis.lo): New target.
1632 (crx-opc.lo): Likewise.
1633 * Makefile.in: Regenerate.
1634 * configure.in: Handle bfd_crx_arch.
1635 * configure: Regenerate.
1636 * crx-dis.c: New file.
1637 * crx-opc.c: New file.
1638 * disassemble.c (ARCH_crx): Define.
1639 (disassembler): Handle ARCH_crx.
1640
7a33b495
JW		 16412004-06-29 James E Wilson <wilson@specifixinc.com>
1642
1643 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1644 * ia64-asmtab.c: Regnerate.
1645
98e69875
AM		 16462004-06-28 Alan Modra <amodra@bigpond.net.au>
1647
1648 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1649 (extract_fxm): Don't test dialect.
1650 (XFXFXM_MASK): Include the power4 bit.
1651 (XFXM): Add p4 param.
1652 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1653
a53b85e2
AO		 16542004-06-27 Alexandre Oliva <aoliva@redhat.com>
1655
1656 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1657 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1658
d0618d1c
AM		 16592004-06-26 Alan Modra <amodra@bigpond.net.au>
1660
1661 * ppc-opc.c (BH, XLBH_MASK): Define.
1662 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1663
1d9f512f
AM		 16642004-06-24 Alan Modra <amodra@bigpond.net.au>
1665
1666 * i386-dis.c (x_mode): Comment.
1667 (two_source_ops): File scope.
1668 (float_mem): Correct fisttpll and fistpll.
1669 (float_mem_mode): New table.
1670 (dofloat): Use it.
1671 (OP_E): Correct intel mode PTR output.
1672 (ptr_reg): Use open_char and close_char.
1673 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1674 operands. Set two_source_ops.
1675
52886d70
AM		 16762004-06-15 Alan Modra <amodra@bigpond.net.au>
1677
1678 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1679 instead of _raw_size.
1680
bad9ceea
JJ		 16812004-06-08 Jakub Jelinek <jakub@redhat.com>
1682
1683 * ia64-gen.c (in_iclass): Handle more postinc st
1684 and ld variants.
1685 * ia64-asmtab.c: Rebuilt.
1686
0451f5df
MS		 16872004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1688
1689 * s390-opc.txt: Correct architecture mask for some opcodes.
1690 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1691 in the esa mode as well.
1692
f6f9408f
JR		 16932004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1694
1695 * sh-dis.c (target_arch): Make unsigned.
1696 (print_insn_sh): Replace (most of) switch with a call to
1697 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1698 * sh-opc.h: Redefine architecture flags values.
1699 Add sh3-nommu architecture.
1700 Reorganise <arch>_up macros so they make more visual sense.
1701 (SH_MERGE_ARCH_SET): Define new macro.
1702 (SH_VALID_BASE_ARCH_SET): Likewise.
1703 (SH_VALID_MMU_ARCH_SET): Likewise.
1704 (SH_VALID_CO_ARCH_SET): Likewise.
1705 (SH_VALID_ARCH_SET): Likewise.
1706 (SH_MERGE_ARCH_SET_VALID): Likewise.
1707 (SH_ARCH_SET_HAS_FPU): Likewise.
1708 (SH_ARCH_SET_HAS_DSP): Likewise.
1709 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1710 (sh_get_arch_from_bfd_mach): Add prototype.
1711 (sh_get_arch_up_from_bfd_mach): Likewise.
1712 (sh_get_bfd_mach_from_arch_set): Likewise.
1713 (sh_merge_bfd_arc): Likewise.
1714
be8c092b
NC		 17152004-05-24 Peter Barada <peter@the-baradas.com>
1716
1717 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1718 into new match_insn_m68k function. Loop over canidate
1719 matches and select first that completely matches.
be8c092b
NC		 1720 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1721 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1722 to verify addressing for MAC/EMAC.
be8c092b
NC		 1723 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1724 reigster halves since 'fpu' and 'spl' look misleading.
1725 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1726 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1727 first, tighten up match masks.
1728 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1729 'size' from special case code in print_insn_m68k to
1730 determine decode size of insns.
1731
a30e9cc4
AM		 17322004-05-19 Alan Modra <amodra@bigpond.net.au>
1733
1734 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1735 well as when -mpower4.
1736
9598fbe5
NC		 17372004-05-13 Nick Clifton <nickc@redhat.com>
1738
1739 * po/fr.po: Updated French translation.
1740
6b6e92f4
NC		 17412004-05-05 Peter Barada <peter@the-baradas.com>
1742
1743 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1744 variants in arch_mask. Only set m68881/68851 for 68k chips.
1745 * m68k-op.c: Switch from ColdFire chips to core variants.
1746
a404d431
AM		 17472004-05-05 Alan Modra <amodra@bigpond.net.au>
1748
a30e9cc4 1749 PR 147.
a404d431
AM		 1750 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1751
f3806e43
BE		 17522004-04-29 Ben Elliston <bje@au.ibm.com>
1753
520ceea4
BE		 1754 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1755 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1756
1f1799d5
KK		 17572004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1758
1759 * sh-dis.c (print_insn_sh): Print the value in constant pool
1760 as a symbol if it looks like a symbol.
1761
fd99574b
NC		 17622004-04-22 Peter Barada <peter@the-baradas.com>
1763
1764 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1765 appropriate ColdFire architectures.
1766 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1767 mask addressing.
1768 Add EMAC instructions, fix MAC instructions. Remove
1769 macmw/macml/msacmw/msacml instructions since mask addressing now
1770 supported.
1771
b4781d44
JJ		 17722004-04-20 Jakub Jelinek <jakub@redhat.com>
1773
1774 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1775 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1776 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1777 macro. Adjust all users.
1778
91809fda 17792004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1780
91809fda
NC		 1781 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1782 separately.
1783
f4453dfa
NC		 17842004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1785
1786 * m32r-asm.c: Regenerate.
1787
9b0de91a
SS		 17882004-03-29 Stan Shebs <shebs@apple.com>
1789
1790 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1791 used.
1792
e20c0b3d
AM		 17932004-03-19 Alan Modra <amodra@bigpond.net.au>
1794
1795 * aclocal.m4: Regenerate.
1796 * config.in: Regenerate.
1797 * configure: Regenerate.
1798 * po/POTFILES.in: Regenerate.
1799 * po/opcodes.pot: Regenerate.
1800
fdd12ef3
AM		 18012004-03-16 Alan Modra <amodra@bigpond.net.au>
1802
1803 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1804 PPC_OPERANDS_GPR_0.
1805 * ppc-opc.c (RA0): Define.
1806 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1807 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1808 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1809
2dc111b3 18102004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1811
1812 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1813
7bfeee7b
AM		 18142004-03-15 Alan Modra <amodra@bigpond.net.au>
1815
1816 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1817
7ffdda93
ML		 18182004-03-12 Michal Ludvig <mludvig@suse.cz>
1819
1820 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1821 (grps): Delete GRPPLOCK entry.
7ffdda93 1822
cc0ec051
AM		 18232004-03-12 Alan Modra <amodra@bigpond.net.au>
1824
1825 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1826 (M, Mp): Use OP_M.
1827 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1828 (GRPPADLCK): Define.
1829 (dis386): Use NOP_Fixup on "nop".
1830 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1831 (twobyte_has_modrm): Set for 0xa7.
1832 (padlock_table): Delete. Move to..
1833 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1834 and clflush.
1835 (print_insn): Revert PADLOCK_SPECIAL code.
1836 (OP_E): Delete sfence, lfence, mfence checks.
1837
4fd61dcb
JJ		 18382004-03-12 Jakub Jelinek <jakub@redhat.com>
1839
1840 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1841 (INVLPG_Fixup): New function.
1842 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1843
0f10071e
ML		 18442004-03-12 Michal Ludvig <mludvig@suse.cz>
1845
1846 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1847 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1848 (padlock_table): New struct with PadLock instructions.
1849 (print_insn): Handle PADLOCK_SPECIAL.
1850
c02908d2
AM		 18512004-03-12 Alan Modra <amodra@bigpond.net.au>
1852
1853 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1854 (OP_E): Twiddle clflush to sfence here.
1855
d5bb7600
NC		 18562004-03-08 Nick Clifton <nickc@redhat.com>
1857
1858 * po/de.po: Updated German translation.
1859
ae51a426
JR		 18602003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1861
1862 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1863 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1864 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1865 accordingly.
1866
676a64f4
RS		 18672004-03-01 Richard Sandiford <rsandifo@redhat.com>
1868
1869 * frv-asm.c: Regenerate.
1870 * frv-desc.c: Regenerate.
1871 * frv-desc.h: Regenerate.
1872 * frv-dis.c: Regenerate.
1873 * frv-ibld.c: Regenerate.
1874 * frv-opc.c: Regenerate.
1875 * frv-opc.h: Regenerate.
1876
c7a48b9a
RS		 18772004-03-01 Richard Sandiford <rsandifo@redhat.com>
1878
1879 * frv-desc.c, frv-opc.c: Regenerate.
1880
8ae0baa2
RS		 18812004-03-01 Richard Sandiford <rsandifo@redhat.com>
1882
1883 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1884
ce11586c
JR		 18852004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1886
1887 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1888 Also correct mistake in the comment.
1889
6a5709a5
JR		 18902004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1891
1892 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1893 ensure that double registers have even numbers.
1894 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1895 that reserved instruction 0xfffd does not decode the same
1896 as 0xfdfd (ftrv).
1897 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1898 REG_N refers to a double register.
1899 Add REG_N_B01 nibble type and use it instead of REG_NM
1900 in ftrv.
1901 Adjust the bit patterns in a few comments.
1902
e5d2b64f 19032004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1904
1905 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1906
1f04b05f
AH		 19072004-02-20 Aldy Hernandez <aldyh@redhat.com>
1908
1909 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1910
2f3b8700
AH		 19112004-02-20 Aldy Hernandez <aldyh@redhat.com>
1912
1913 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1914
f0b26da6 19152004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1916
1917 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1918 mtivor32, mtivor33, mtivor34.
f0b26da6 1919
23d59c56 19202004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1921
1922 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1923
34920d91
NC		 19242004-02-10 Petko Manolov <petkan@nucleusys.com>
1925
1926 * arm-opc.h Maverick accumulator register opcode fixes.
1927
44d86481
BE		 19282004-02-13 Ben Elliston <bje@wasabisystems.com>
1929
1930 * m32r-dis.c: Regenerate.
1931
17707c23
MS		 19322004-01-27 Michael Snyder <msnyder@redhat.com>
1933
1934 * sh-opc.h (sh_table): "fsrra", not "fssra".
1935
fe3a9bc4
NC		 19362004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1937
1938 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1939 contraints.
1940
ff24f124
JJ		 19412004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1942
1943 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1944
a02a862a
AM		 19452004-01-19 Alan Modra <amodra@bigpond.net.au>
1946
1947 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1948 1. Don't print scale factor on AT&T mode when index missing.
1949
d164ea7f
AO		 19502004-01-16 Alexandre Oliva <aoliva@redhat.com>
1951
1952 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1953 when loaded into XR registers.
1954
cb10e79a
RS		 19552004-01-14 Richard Sandiford <rsandifo@redhat.com>
1956
1957 * frv-desc.h: Regenerate.
1958 * frv-desc.c: Regenerate.
1959 * frv-opc.c: Regenerate.
1960
f532f3fa
MS		 19612004-01-13 Michael Snyder <msnyder@redhat.com>
1962
1963 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1964
e45d0630
PB		 19652004-01-09 Paul Brook <paul@codesourcery.com>
1966
1967 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1968 specific opcodes.
1969
3ba7a1aa
DJ		 19702004-01-07 Daniel Jacobowitz <drow@mvista.com>
1971
1972 * Makefile.am (libopcodes_la_DEPENDENCIES)
1973 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1974 comment about the problem.
1975 * Makefile.in: Regenerate.
1976
ba2d3f07
AO		 19772004-01-06 Alexandre Oliva <aoliva@redhat.com>
1978
1979 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1980 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1981 cut&paste errors in shifting/truncating numerical operands.
1982 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1983 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1984 (parse_uslo16): Likewise.
1985 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1986 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1987 (parse_s12): Likewise.
1988 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1989 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1990 (parse_uslo16): Likewise.
1991 (parse_uhi16): Parse gothi and gotfuncdeschi.
1992 (parse_d12): Parse got12 and gotfuncdesc12.
1993 (parse_s12): Likewise.
1994
3ab48931
NC		 19952004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1996
1997 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1998 instruction which looks similar to an 'rla' instruction.
a0bd404e 1999
c9e214e5 2000For older changes see ChangeLog-0203
252b5132
RH		 2001\f
2002Local Variables:
2f6d2f85
NC		 2003mode: change-log
2004left-margin: 8
2005fill-column: 74
252b5132
RH		 2006version-control: never
2007End:
GDB Binutils - Deliverables
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