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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ff4a8d2b
NC		 12009-12-17 Nick Clifton <nickc@redhat.com>
2
3 PR binutils/10924
4 * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
5 unique register numbers. Extend support for %<>R format to
6 thumb32 and coprocessor instructions.
7
2eb952a4
L		 82009-12-16 H.J. Lu <hongjiu.lu@intel.com>
9
10 * i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
11
12 * i386-opc.h (ByteOkIntel): Removed.
13 (i386_opcode_modifier): Remove byteokintel.
14
15 * i386-opc.tbl: Remove ByteOkIntel.
16 * i386-tbl.h: Regenerated.
17
7f399153
L		 182009-12-16 H.J. Lu <hongjiu.lu@intel.com>
19
20 * i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
21 Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
22
23 * i386-opc.h (Vex0F): Removed.
24 (Vex0F38): Likewise.
25 (Vex0F3A): Likewise.
26 (VexOpcode): New.
27 (VEX0F): Likewise.
28 (VEX0F38): Likewise.
29 (VEX0F3A): Likewise.
30 (XOP08): Defined as a macro.
31 (XOP09): Likewise.
32 (XOP0A): Likewise.
33 (i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
34 xop09 and xop0a. Add vexopcode.
35
36 * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
37 VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
38 XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
39 * i386-tbl.h: Regenerated.
40
8c43a48b
L		 412009-12-15 H.J. Lu <hongjiu.lu@intel.com>
42
43 * i386-opc.h (VEX2SOURCES): Renamed to ...
44 (XOP2SOURCES): This.
45
8cd7925b
L		 462009-12-15 H.J. Lu <hongjiu.lu@intel.com>
47
48 * i386-gen.c (opcode_modifiers): Remove Vex3Sources and
49 Vex2Sources. Add VexSources.
50
25ac7f26 51 * i386-opc.h (Vex2Sources): Removed.
8cd7925b
L		 52 (Vex3Sources): Likewise.
53 (VEX2SOURCES): New.
54 (VEX3SOURCES): Likewise.
55 (VexSources): Likewise.
56 (i386_opcode_modifier): Remove vex2sources and vex3sources.
57 Add vexsources.
58
59 * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
60 Vex3Sourceswith VexSources=2.
61 * i386-tbl.h: Regenerated.
62
1ef99a7b
L		 632009-12-15 H.J. Lu <hongjiu.lu@intel.com>
64
65 * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
66 VexW.
67
68 * i386-opc.h (VexW0): Removed.
69 (VexW1): Likewise.
70 (VEXW0): New.
71 (VEXW1): Likewise.
72 (VexW): Likewise.
73 (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
74
75 * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
76 Vex=2.
8cd7925b 77 * i386-tbl.h: Regenerated.
1ef99a7b 78
bcf2684f
L		 792009-12-15 H.J. Lu <hongjiu.lu@intel.com>
80
81 * i386-dis.c (VEX_W_3818_P_2_M_0): New.
82 (vex_w_table): Add VEX_W_3818_P_2_M_0.
83 (mod_table): Use VEX_W_3818_P_2_M_0.
84
a179a9fd
L		 852009-12-15 H.J. Lu <hongjiu.lu@intel.com>
86
87 * i386-dis.c (vex_w_table): Reformat.
88
53aa04a0
L		 892009-12-15 H.J. Lu <hongjiu.lu@intel.com>
90
91 * i386-dis.c (VEX_W_382X_P_2_M_0): New.
92 (vex_w_table): Add VEX_W_382X_P_2_M_0.
93 (mod_table): Use VEX_W_382X_P_2_M_0.
94
efdb52b7
L		 952009-12-15 H.J. Lu <hongjiu.lu@intel.com>
96
97 * i386-dis.c (vex_w_table): Reformat.
98
9e30b8e0
L		 992009-12-15 H.J. Lu <hongjiu.lu@intel.com>
100
101 * i386-dis.c (USE_VEX_W_TABLE): New.
102 (VEX_W_TABLE): Likewise.
103 (VEX_W_XXX): Likewise.
104 (vex_w_table): Likewise.
105 (prefix_table): Use VEX_W_XXX.
106 (vex_table): Likewise.
107 (vex_len_table): Likewise.
108 (mod_table): Likewise.
109 (get_valid_dis386): Handle USE_VEX_W_TABLE.
110
111 * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
112 isn't used.
113 * i386-tbl.h: Regenerated.
114
e3c58833
L		 1152009-12-15 H.J. Lu <hongjiu.lu@intel.com>
116
117 * i386-opc.h (VEX128): New.
118 (VEX256): Likewise.
119
4c807e72
L		 1202009-12-14 H.J. Lu <hongjiu.lu@intel.com>
121
122 * i386-dis.c (vex_len_table): Reformat.
123
976f1fde
L		 1242009-12-14 H.J. Lu <hongjiu.lu@intel.com>
125
126 * i386-dis.c (MOD_VEX_51): Renamed to ...
127 (MOD_VEX_50): This.
128 (vex_table): Updated.
129 (mod_table): Likewise.
130
ab8e2090
NC		 1312009-12-14 Nick Clifton <nickc@redhat.com>
132
133 PR binutils/10924
134 * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
135 results in unpredictable behaviour.
136 (print_insn_arm): Handle %R.
137
759a05ce
L		 1382009-12-11 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
141 prefix.
142 (print_insn): Don't set vex.w here.
143
5639ff87
L		 1442009-12-11 H.J. Lu <hongjiu.lu@intel.com>
145
146 * i386-dis.c (print_insn): Set vex.w to 0.
147
02e647f9
SP		 1482009-12-11 Quentin Neill <quentin.neill@amd.com>
149
150 * i386-dis.c (get_vex_imm8): Extend logic to apply in all cases,
151 to avoid fetching ahead for the immediate bytes when OP_E_memory
152 has already been called. Fix indentation.
153
91d6fa6a
NC		 1542009-12-11 Nick Clifton <nickc@redhat.com>
155
156 * Makefile.in: Regenerate.
157 * configure: Regenerate.
158 * arm-dis.c: Fix shadowed variable warnings.
159 * cgen-opc.c: Likewise.
160 * cr16-dis.c: Likewise.
161 * crx-dis.c: Likewise.
162 * d30v-dis.c: Likewise.
163 * fr30-dis.c: Likewise.
164 * frv-opc.c: Likewise.
165 * h8500-dis.c: Likewise.
166 * i386-dis.c: Likewise.
167 * i960-dis.c: Likewise.
168 * ia64-gen.c: Likewise.
169 * ia64-opc.c: Likewise.
170 * m32c-asm.c: Likewise.
171 * m32c-dis.c: Likewise.
172 * m68k-dis.c: Likewise.
173 * maxq-dis.c: Likewise.
174 * mcore-dis.c: Likewise.
175 * mep-asm.c: Likewise.
176 * microblaze-dis.c: Likewise.
177 * mmix-dis.c: Likewise.
178 * ns32k-dis.c: Likewise.
179 * or32-opc.c: Likewise.
180 * s390-dis.c: Likewise.
181 * sh64-dis.c: Likewise.
182 * spu-dis.c: Likewise.
183 * tic30-dis.c: Likewise.
184
07a28fab
NC		 1852009-12-09 Nick Clifton <nickc@redhat.com>
186
187 PR 10924
188 * arm-dis.c (print_insn_arm): Mark insns that use the PC in
189 post-indexed addressing as unpredictable.
190
eacc9c89
L		 1912009-12-03 H.J. Lu <hongjiu.lu@intel.com>
192
193 * i386-dis.c (FXSAVE_Fixup): New.
194 (FXSAVE): Likewise.
195 (mod_table): Use FXSAVE on fxsave and fxrstor.
196
197 * i386-opc.tbl: Add fxsave64 and fxrstor64.
198 * i386-tbl.h: Regenerated.
199
03ee1b7f
NC		 2002009-12-02 Nick Clifton <nickc@redhat.com>
201 Richard Earnshaw <rearnsha@arm.com>
202
203 PR gas/11013
204 * arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
205 and QDSUB.
206
ee9fd255
NC		 2072009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it>
208
209 PR gas/11030
210 * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
211 Coldfire ISA A+.
212
ccc5981b
SP		 2132009-11-17 Quentin Neill <quentin.neill@amd.com>
214 Sebastian Pop <sebastian.pop@amd.com>
215
216 * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
217 decoding the second source operand from the immediate byte.
218 (OP_EX_VexW): Pass an extra integer to identify the second
219 and third source arguments.
220
18d0c96e
L		 2212009-11-19 H.J. Lu <hongjiu.lu@intel.com>
222
223 * i386-opc.tbl: Add IsLockable to cmpxch16b.
224 * i386-tbl.h: Regenerated.
225
945ee430
NC		 2262009-11-19 Nick Clifton <nickc@redhat.com>
227
228 PR binutils/10924
229 * arm-dis.c (print_insn_arm): Do not print an offset of zero when
230 decoding Immediaate Offset addressing.
231
41effecb
SP		 2322009-11-18 Sebastian Pop <sebastian.pop@amd.com>
233
234 PR binutils/10973
235 * i386-dis.c (get_vex_imm8): Do not increment codep.
236 Avoid incrementing bytes_before_imm when OP_E_memory
237 has already forwarded the codep pointer.
238 (OP_EX_VexW): Increment codep to skip mod/rm byte.
239
f0ae4a24
SP		 2402009-11-18 Sebastian Pop <sebastian.pop@amd.com>
241
242 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
243 (VEX_LEN_XOP_08_A1): Removed.
244 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
245 VEX_LEN_XOP_08_A1.
246 (vex_len_table): Same.
247 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
248 (cpu_flags): Remove field for CpuCVT16.
249 * i386-opc.h (CpuCVT16): Removed.
250 (i386_cpu_flags): Remove bitfield cpucvt16.
251 (i386-opc.tbl): Remove CVT16 instructions.
252 * i386-init.h: Regenerated.
253 * i386-tbl.h: Regenerated.
254
5dd85c99
SP		 2552009-11-17 Sebastian Pop <sebastian.pop@amd.com>
256 Quentin Neill <quentin.neill@amd.com>
257
258 * i386-dis.c (OP_Vex_2src_1): New.
259 (OP_Vex_2src_2): New.
260 (Vex_2src_1): New.
261 (Vex_2src_2): New.
262 (XOP_08): Added.
263 (VEX_LEN_XOP_08_A0): Added.
264 (VEX_LEN_XOP_08_A1): Added.
265 (VEX_LEN_XOP_09_80): Added.
266 (VEX_LEN_XOP_09_81): Added.
267 (xop_table): Added an entry for XOP_08. Handle xop instructions.
268 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
269 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
270 (get_valid_dis386): Handle XOP_08.
271 (OP_Vex_2src): New.
272 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
273 (cpu_flags): Add CpuXOP and CpuCVT16.
274 (opcode_modifiers): Add XOP08, Vex2Sources.
275 * i386-opc.h (CpuXOP): Added.
276 (CpuCVT16): Added.
277 (i386_cpu_flags): Add cpuxop and cpucvt16.
278 (XOP08): Added.
279 (Vex2Sources): Added.
280 (i386_opcode_modifier): Add xop08, vex2sources.
281 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
282 * i386-init.h: Regenerated.
283 * i386-tbl.h: Regenerated.
284
aefd8a40
NC		 2852009-11-17 Nick Clifton <nickc@redhat.com>
286
287 PR binutils/10924
288 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
289 instruction variants. Add pattern for MRS variant that was being
290 confused with CMP.
291 (arm_decode_shift): Place error message in a comment.
292 (print_insn_arm): Note that writing back to the PC is
293 unpredictable.
294 Only print 'p' variants of cmp/cmn/teq/tst instructions if
295 decoding for pre-V6 architectures.
296
0bb027fd
RR		 2972009-11-17 Edward Nevill <edward.nevill@arm.com>
298
299 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
300
c7e770a0
DE		 3012009-11-14 Doug Evans <dje@sebabeach.org>
302
303 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
304 ../cgen/cpu.
305 * Makefile.in: Regenerate.
306
8b3f93e7
L		 3072009-11-13 H.J. Lu <hongjiu.lu@intel.com>
308
309 * i386-dis.c (OP_E_extended): Removed.
310
2a70cca4
L		 3112009-11-13 H.J. Lu <hongjiu.lu@intel.com>
312
313 * i386-dis.c (print_insn): Check rex_ignored.
314
f16cd0d5
L		 3152009-11-13 H.J. Lu <hongjiu.lu@intel.com>
316
317 * i386-dis.c (ckprefix): Updated to return 0 if number of
318 prefixes > 14 and record the last position for each prefix.
319 (lock_prefix): Removed.
320 (data_prefix): Likewise.
321 (addr_prefix): Likewise.
322 (repz_prefix): Likewise.
323 (repnz_prefix): Likewise.
324 (last_lock_prefix): New.
325 (last_repz_prefix): Likewise.
326 (last_repnz_prefix): Likewise.
327 (last_data_prefix): Likewise.
328 (last_addr_prefix): Likewise.
329 (last_rex_prefix): Likewise.
330 (last_seg_prefix): Likewise.
331 (MAX_CODE_LENGTH): Likewise.
332 (ADDR16_PREFIX): Likewise.
333 (ADDR32_PREFIX): Likewise.
334 (DATA16_PREFIX): Likewise.
335 (DATA32_PREFIX): Likewise.
336 (REP_PREFIX): Likewise.
337 (seg_prefix): Likewise.
338 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
339 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
340 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
341 (get_valid_dis386): Updated.
342 (OP_C): Likewise.
343 (OP_Monitor): Likewise.
344 (REP_Fixup): Likewise.
345 (print_insn): Display all prefixes.
346 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
347 (intel_operand_size): Likewise.
348 (OP_E_register): Likewise.
349 (OP_G): Likewise.
350 (OP_REG): Likewise.
351 (OP_IMREG): Likewise.
352 (OP_I): Likewise.
353 (OP_I64): Likewise.
354 (OP_sI): Likewise.
355 (CRC32_Fixup): Likewise.
356 (MOVBE_Fixup): Likewise.
357 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
358 in 16bit mode.
359 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
360 used_prefixes only if it is used.
361
20efc689
L		 3622009-11-12 H.J. Lu <hongjiu.lu@intel.com>
363
364 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
365 or, sbb, sub, xor and xchg with register only operands.
366 * i386-tbl.h: Regenerated.
367
c32fa91d
L		 3682009-11-12 H.J. Lu <hongjiu.lu@intel.com>
369
370 * i386-gen.c (opcode_modifiers): Add IsLockable.
371
372 * i386-opc.h (IsLockable): New.
373 (i386_opcode_modifier): Add islockable.
374
375 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
376 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
377 xor, xadd and xchg.
378 * i386-tbl.h: Regenerated.
379
79862e45
DJ		 3802009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
381
382 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
383 generic coprocessor instructions for FPA loads and stores.
384 (print_insn_coprocessor): Remove %C support. Display address for
385 PC-relative offsets in %A.
386
f310f33d
L		 3872009-11-11 H.J. Lu <hongjiu.lu@intel.com>
388
389 * i386-dis.c (all_prefixes): New.
390 (ckprefix): Set all_prefixes.
391 (print_insn): Print all_prefixes instead of lock_prefix,
392 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
393
c1e26897
NC		 3942009-11-11 Nick Clifton <nickc@redhat.com>
395
396 PR binutils/10924
397 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
398 (print_insn_arm): Extend %s format control code to check for
399 unpredictable addressing modes. Add support for %S format control
400 code which suppresses this check.
401 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
402 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
403 PRE_BIT_SET): New macros.
404 (print_insn_coprocessor): Use the new macros instead of magic
405 constants.
406 (print_arm_address): Likewise.
407 (pirnt_insn_arm): Likewise.
408 (print_insn_thumb32): Likewise.
409
41327c9d
NC		 4102009-11-11 Nick Clifton <nickc@redhat.com>
411
412 * po/id.po: Updated Indonesian translation.
413
0d999f33
MK		 4142009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
415
416 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
417
c48244a5
SP		 4182009-11-06 Sebastian Pop <sebastian.pop@amd.com>
419
420 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
421 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
422 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
423 the xop_table.
424 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
425 XOP instructions.
426
f88c9eb0
SP		 4272009-11-05 Sebastian Pop <sebastian.pop@amd.com>
428 Quentin Neill <quentin.neill@amd.com>
429
430 * opcodes/i386-dis.c (OP_LWPCB_E): New.
431 (OP_LWP_E): New.
432 (OP_LWP_I): New.
433 (USE_XOP_8F_TABLE): New.
434 (XOP_8F_TABLE): New.
435 (REG_XOP_LWPCB): New.
436 (REG_XOP_LWP): New.
437 (XOP_09): New.
438 (XOP_0A): New.
439 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
440 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
441 (xop_table): New.
442 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
443 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
444 to access to the vex_table.
445 (OP_LWPCB_E): New.
446 (OP_LWP_E): New.
447 (OP_LWP_I): New.
448 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
449 (cpu_flags): Add CpuLWP.
450 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
451 * opcodes/i386-opc.h (CpuLWP): New.
452 (i386_cpu_flags): Add bit cpulwp.
453 (VexLWP): New.
454 (XOP09): New.
455 (XOP0A): New.
456 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
457 * opcodes/i386-opc.tbl (llwpcb): Added.
458 (lwpval): Added.
459 (lwpins): Added.
460
0d734b5d
DD		 4612009-11-04 DJ Delorie <dj@redhat.com>
462
463 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
464 (mvtcp, mvfcp, opecp): Remove.
465 * rx-decode.c: Regenerate.
466 * rx-dis.c (cpen): Remove.
467
d51b88d3
DE		 4682009-11-03 Doug Evans <dje@sebabeach.org>
469
470 * m32c-desc.c: Regenerate.
471 * mep-desc.c: Regenerate.
472
62f3b8c8
PB		 4732009-11-02 Paul Brook <paul@codesourcery.com>
474
475 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
476 Add VFPv4 instructions.
477
206c2556
L		 4782009-10-29 Sebastian Pop <sebastian.pop@amd.com>
479
480 * i386-dis.c (OP_VEX_FMA): Removed.
481 (VexFMA): Removed.
482 (Vex128FMA): Removed.
483 (prefix_table): First source operand of FMA4 insns is decoded
484 with Vex not with VexFMA.
485 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
486 when vex.w is set. Third source operand is decoded with
487
a2b2318d
AM		 4882009-10-27 Alan Modra <amodra@bigpond.net.au>
489
490 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
491 * Makefile.in: Regenerate.
492 * po/POTFILES.in: Regenerate.
493
ac1e9eca
DE		 4942009-10-23 Doug Evans <dje@sebabeach.org>
495
496 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
497 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
498 * cgen-bitset.c: Update.
499 * fr30-desc.h: Regenerate.
500 * frv-desc.h: Regenerate.
501 * ip2k-desc.h: Regenerate.
502 * iq2000-desc.h: Regenerate.
503 * lm32-desc.h: Regenerate.
504 * m32c-desc.h: Regenerate.
505 * m32c-opc.h: Regenerate.
506 * m32r-desc.h: Regenerate.
507 * mep-desc.h: Regenerate.
508 * mt-desc.h: Regenerate.
509 * openrisc-desc.h: Regenerate.
510 * xc16x-desc.h: Regenerate.
511 * xstormy16-desc.h: Regenerate.
512
f282425e
DD		 5132009-10-22 DJ Delorie <dj@redhat.com>
514
515 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
516 * rx-decode.c: Regenerated.
517
4b06377f
L		 5182009-10-20 H.J. Lu <hongjiu.lu@intel.com>
519
520 PR gas/10775
521 * i386-dis.c: Document LB, LS and LV macros.
522 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
523 with the 64-bit displacement or immediate operand.
524 (putop): Handle LB, LS and LV macros.
525
cedb97b6
DE		 5262009-10-18 Doug Evans <dje@sebabeach.org>
527
528 * lm32-opinst.c: Regenerate.
529 * m32c-desc.c: Regenerate.
530 * m32r-opinst.c: Regenerate.
531 * openrisc-ibld.c: Regenerate.
532 * xc16x-desc.c: Regenerate.
533 * xc16x-desc.h: Regenerate.
534
d1119f7a
DE		 5352009-10-17 Doug Evans <dje@sebabeach.org>
536
537 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
538 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
539 sorted alphabetically.
540 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
541 stamp-* rules are sorted alphabetically.
542 * Makefile.in: Regenerate.
543
52a6c1fe
L		 5442009-10-16 H.J. Lu <hongjiu.lu@intel.com>
545
546 * i386-opc.h: Use enum instead of nested macros.
547
3873ba12
L		 5482009-10-16 H.J. Lu <hongjiu.lu@intel.com>
549
550 * i386-dis.c: Simplify enums.
551
51e7da1b
L		 5522009-10-15 H.J. Lu <hongjiu.lu@intel.com>
553 Ineiev <ineiev@gmail.com>
554
555 PR binutils/10767
556 * i386-dis.c: Use enum instead of nested macros.
557
c39846ed
L		 5582009-10-15 H.J. Lu <hongjiu.lu@intel.com>
559
560 * i386-dis.c (MAX_BYTEMODE): Removed.
561
6a327e17
AM		 5622009-10-14 Tomas Hurka <tom@hukatronic.cz>
563
564 PR 969
565 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
566
55b126d4
L		 5672009-10-13 H.J. Lu <hongjiu.lu@intel.com>
568
569 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
570 and vex_w_done.
571
ef299415
ME		 5722009-10-07 Michael Eager <eager@eagercon.com>
573
55b126d4 574 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 575 eliminate local extern decls.
55b126d4 576 * microblaze-dis.h: New.
ef299415 577
245caaea
NC		 5782009-10-06 Nick Clifton <nickc@redhat.com>
579
580 * po/fi.po: Updated Finnish translation.
581
49293ef7
NC		 5822009-10-03 Andreas Schwab <schwab@linux-m68k.org>
583
584 * opc2c.c: Include "libiberty.h" and <errno.h>.
585 (orig_filename): Constify.
586 (dump_lines): Fix line number directive.
587 (main): Set orig_filename to basename of input file. Use
588 xstrerror.
589
590 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
591 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
592 instead of $(EXEEXT).
593 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
594 $(LINK_FOR_BUILD). Link with libiberty.
595 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
596 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
597 * Makefile.in: Regenerated.
598 * rx-decode.c: Regenerated.
599
8977d4b2
AM		 6002009-10-03 Paul Reed <paulreed@paddedcell.com>
601
602 * arm-dis.c (print_insn): Check symtab_size not *symtab.
603
f98fa534
L		 6042009-10-02 H.J. Lu <hongjiu.lu@intel.com>
605
606 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
607 * i386-tbl.h: Regenerated.
608
9fe54b1c
PB		 6092009-10-02 Peter Bergner <bergner@vnet.ibm.com>
610
611 * ppc-dis.c (ppc_opts): Add "476" entry.
612 * ppc-opc.c (PPC476): Define.
613 (powerpc_opcodes): Update mnemonics where required for 476.
614
634b50f2
PB		 6152009-10-01 Peter Bergner <bergner@vnet.ibm.com>
616
617 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
618 * ppc-dis.c (ppc_opts): Likewise.
619 Rename "ppca2" to "a2".
620
4ded9dda
SR		 6212009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
622
623 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
624
c7927a3c
NC		 6252009-09-29 DJ Delorie <dj@redhat.com>
626
627 * Makefile.am: Add RX files.
628 * configure.in: Add support for RX target.
629 * disassemble.c: Likewise.
630 * Makefile.in: Regenerate.
631 * configure: Regenerate.
632 * opc2c.c: New file.
633 * rx-decode.c: New file.
634 * rx-decode.opc: New file.
635 * rx-dis.c: New file.
636
8765b556
PB		 6372009-09-29 Peter Bergner <bergner@vnet.ibm.com>
638
639 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
640 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
641
fe2d172c
ME		 6422009-09-25 Michael Eager <eager@eagercon.com>
643
e0c483d6
AM		 644 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
645 microblaze_decode_insn): Add declarations.
646 (get_delay_slots_microblaze): Remove.
fe2d172c 647
21d799b5
NC		 6482009-09-25 Martin Thuresson <martint@google.com>
649
e0c483d6 650 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC		 651 -Wc++-compat:
652 * arc-dis.c Fix casts.
653 * arc-ext.c: Add casts.
654 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
655 enum.
656
2bf05e57
L		 6572009-09-24 H.J. Lu <hongjiu.lu@intel.com>
658
659 * i386-gen.c (opcode_modifiers): Remove Vex256.
660 (set_bitfield): Handle XXX=V.
661
662 * i386-opc.h (Vex): Update comments.
663 (Vex256): Removed.
664 (VexNDS): Updated.
e0c483d6 665 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L		 666
667 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
668 * i386-tbl.h: Regenerated.
669
8a00d392
NC		 6702009-09-23 Nick Clifton <nickc@redhat.com>
671
672 * po/fr.po: Updated French translation.
673
e0d602ec
BE		 6742009-09-21 Ben Elliston <bje@au.ibm.com>
675 Peter Bergner <bergner@vnet.ibm.com>
676
677 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
678 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
679 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
680 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
681 ici mnemonics.
682 (ERAT_T): New operand.
683 (XWC_MASK): New mask.
684 (XOPL2): New macro.
685 (PPCA2): Define.
686
ca58b19f
NC		 6872009-09-18 Nick Clifton <nickc@redhat.com>
688
689 * po/es.po: Updated Spanish translation.
690 * po/vi.po: Updated Vietnamese translation.
691
05203043
L		 6922009-09-15 H.J. Lu <hongjiu.lu@intel.com>
693
694 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
695 disp == -disp.
696
df58f7b0
NC		 6972009-09-14 Nick Clifton <nickc@redhat.com>
698
699 * po/nl.po: Updated Dutch translation.
700
1e9cc1c2
NC		 7012009-09-11 Nick Clifton <nickc@redhat.com>
702
703 * po/opcodes.pot: Updated by the Translation project.
704
7052009-09-11 Martin Thuresson <martint@google.com>
706
707 Updated sources to compile cleanly with -Wc++-compat:
708 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
709 * ldcref.c: Add casts.
710 * ldctor.c: Add casts.
711 * ldexp.c
712 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
713 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
714 * ldlang.h (enum statement_enum): Move to top level.
715 * ldmain.c: Add casts.
716 * ldwrite.c: Add casts.
717 * lexsup.c: Add casts. (enum control_enum): Move to top level.
718 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
719
c8676ae4 7202009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 721
c8676ae4
AK		 722 * s390-dis.c (print_insn_s390): Avoid 'long long'.
723
7330f9c3 7242009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 725
7330f9c3
AK		 726 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
727 (print_insn_s390): Signextend and shift pcrel operands before printing.
728
9daa0d29
L		 7292009-09-09 H.J. Lu <hongjiu.lu@intel.com>
730
731 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
732 VEX_LEN_AE_R_X_M_0 in comments.
733
495c5f87
DD		 7342009-09-08 DJ Delorie <dj@redhat.com>
735
736 * mep-opc.c: Regenerate.
737
84c71969
AS		 7382009-09-08 Andreas Schwab <schwab@linux-m68k.org>
739
740 * z8kgen.c (struct op): Replace unused flavor with id.
741 (opt): Remove extra xorb entry.
742 (func): Use id field as fallback.
743 (sub): Return new string, caller changed.
744 (internal): Allocate end marker. Assign unique id before sorting.
745 (gas): Likewise. Fix loop end condition.
746 * z8k-opc.h: Regenerate.
747
bdc7fcfe
AM		 7482009-09-08 Alan Modra <amodra@bigpond.net.au>
749
750 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
751
815c0482
AM		 7522009-09-07 Alan Modra <amodra@bigpond.net.au>
753
754 * z8kgen.c (func): Fix thinko last patch.
755
eae14d64
AM		 7562009-09-07 Alan Modra <amodra@bigpond.net.au>
757
758 * z8kgen.c (func): Stabilize qsort of identically named entries.
759 * z8k-opc.h: Regenerate.
760
23f938f1
TG		 7612009-09-07 Tristan Gingold <gingold@adacore.com>
762
763 * po/opcodes.pot: Regenerate.
764
2eee5593
AM		 7652009-09-07 Alan Modra <amodra@bigpond.net.au>
766
767 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
768 * configure: Regenerate.
769 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
770 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
771 (i386-gen, ia64-gen, z8kgen): ..here.
772 * Makefile.in: Regenerate.
773
ae794f60
TG		 7742009-09-07 Tristan Gingold <gingold@adacore.com>
775
776 * z8k-opc.h: Regenerate.
777
96d56e9f
NC		 7782009-09-05 Martin Thuresson <martin@mtme.org>
779
780 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
781 * m88k-dis.c (m88kdis): Rename variable class to in_class.
782 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
783 Rename argument class to symbol_class.
784
66a6900a
JZ		 7852009-09-04 Jie Zhang <jie.zhang@analog.com>
786
787 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
788 to the new encoding of DBGA, DBGAH, and DBGAL.
789 (_print_insn_bfin): Likewise.
790
ad15c38e
JZ		 7912009-09-03 Jie Zhang <jie.zhang@analog.com>
792
793 * bfin-dis.c (_print_insn_bfin): Don't declare.
794 (print_insn_bfin): Don't declare.
795 (dregs_pair): Remove.
796 (ignore_bits): Remove.
797 (ccstat): Remove.
798
c958a8a8
JZ		 7992009-09-03 Jie Zhang <jie.zhang@analog.com>
800
801 * bfin-dis.c (IS_DREG): Define.
802 (IS_PREG): Define.
803 (IS_AREG): Define.
804 (IS_GENREG): Define.
805 (IS_DAGREG): Define.
806 (IS_SYSREG): Define.
807 (decode_REGMV_0): Check illegal register move instructions.
808
3df5879c
DK		 8092009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
810
811 * Makefile.am (BUILD_LIBINTL): New variable.
812 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
813 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
814 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
815 * Makefile.in: Regenerate.
816
05316052
DD		 8172009-09-01 DJ Delorie <dj@redhat.com>
818
819 * mep-asm.c: Regenerate.
820 * mep-desc.c: Regenerate.
821 * mep-opc.c: Regenerate.
822
e06ae0d4
TG		 8232009-09-01 Tristan Gingold <gingold@adacore.com>
824
825 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
826 dependencies. Remove unused FORMAT variable.
827 * configure.com: New file to create build.com DCL script for
828 Itanium VMS or Alpha VMS.
829
d3ce72d0
NC		 8302009-08-29 Martin Thuresson <martin@mtme.org>
831
832 * cris-dis.c (bytes_to_skip): Update code to use new name.
833 * i386-dis.c (putop): Update code to use new name.
834 * i386-gen.c (process_i386_opcodes): Update code to use
835 new name.
836 * i386-opc.h (struct template): Rename struct template to
837 insn_template. Update code accordingly.
838 * i386-tbl.h (i386_optab): Update type to use new name.
839 * ia64-dis.c (print_insn_ia64): Rename variable template
840 to template_val.
841 * tic30-dis.c (struct instruction, get_tic30_instruction):
842 Update code to use new name.
843 * tic54x-dis.c (has_lkaddr, get_insn_size)
844 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
845 Update code to use new name.
846 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
847 Update type to new name.
848 * z8kgen.c (internal, gas): Rename variable new to new_op.
849
791f3971
L		 8502009-08-28 H.J. Lu <hongjiu.lu@intel.com>
851
852 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
853 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
854 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
855 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
856 * Makefile.in: Regenerated.
857
573e8a1c
RW		 8582009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
859
860 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
861 [INSTALL_LIBBFD]: ... here, ...
862 [INSTALL_LIBBFD]: ... and empty overrides here.
863 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
864 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
865 * Makefile.in: Regenerate.
866 * configure: Regenerate.
867
f7922329
NC		 8682009-08-26 Philippe De Muyter <phdm@macqel.be>
869
870 * m68k-dis.c (print_insn_arg): Add movecr register names for
871 coldfire v4e families.
872
ff13a42d
RW		 8732009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
874
875 * Makefile.am (SUBDIRS): Build '.' before 'po'.
876 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
877 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
878 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
879 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
880 (i386-gen.o): New rule.
881 ($(srcdir)/i386-init.h): Adjust.
882 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
883 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
884 (ia64-gen.o): New rule.
885 (ia64_asmtab_deps): New variable.
886 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
887 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
888 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
889 likewise.
890 (s390-opc.tab): Adjust.
891 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
892 rules.
893 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
894 * Makefile.in: Regenerate.
895 * z8kgen.c (gas): Avoid '/*' in comment.
896 * z8k-opc.h (func): Regenerate.
897
6f01793d
RW		 8982009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
899
900 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
901 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
902 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
903 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
904 msp430-dis.c added.
905 (LIBOPCODES_CFILES): New variable, adding to
906 TARGET_LIBOPCODES_CFILES also non-target library sources.
907 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
908 files.
909 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
910 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
911 * Makefile.in: Regenerate.
912 * po/POTFILES.in: Regenerate.
913
81ecdfbb
RW		 9142009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
915
14ec8efd
RW		 916 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
917 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
918 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
919 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
920 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
921 is built shared even if it is not to be installed.
922 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
923 (install_libopcodes, uninstall_libopcodes): Remove.
924 (AM_CPPFLAGS): Renamed from ...
925 (INCLUDES): ... this.
926 * Makefile.in: Regenerate.
927
758227f0
RW		 928 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
929 1.11, foreign, no-dist.
930 (MKDEP, m32c_opc_h): Remove variables.
931 (disassemble.lo): Rewrite using automake-style dependency
932 tracking rules; only list the dependency upon the primary source
933 file, but no included headers.
934 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
935 (i386-gen.o, ia64-gen.o): Remove dependency statements.
936 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
937 ensure all dependency fragments are included in the Makefile.
938 (s390-opc.lo): Depend on s390-opc.tab.
939 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
940 (mkdep section): Remove.
941 * Makefile.in: Regenerate.
942 * po/POTFILES.in: Regenerate.
943
af542c2e
RW		 944 * Makefile.am (install-pdf, install-html): Remove.
945 * Makefile.in: Regenerate.
946
81ecdfbb
RW		 947 * Makefile.in: Regenerate.
948 * aclocal.m4: Likewise.
949 * config.in: Likewise.
950 * configure: Likewise.
951
7ba29e2a
NC		 9522009-08-06 Michael Eager <eager@eagercon.com>
953
954 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
955 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
956 * Makefile.in: Regenerate.
957 * configure.in: Add bfd_microblaze_arch target.
958 * configure: Regenerate.
e0c483d6 959 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC		 960 print_insn_microblaze().
961 * microblaze-dis.c: New MicroBlaze disassembler.
962 * microblaze-opc.h: New MicroBlaze opcode definitions.
963 * microblaze-opcm.h: New MicroBlaze opcode types.
964
8a9036a4
L		 9652009-07-25 H.J. Lu <hongjiu.lu@intel.com>
966
967 * configure.in: Handle bfd_l1om_arch.
968 * disassemble.c (disassembler): Likewise.
969
970 * configure: Regenerated.
971
972 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
973 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
974
975 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
976 Add CPU_L1OM_FLAGS.
977 (cpu_flags): Add CpuL1OM.
978 (set_bitfield): Take an argument to set the value field.
979 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
980 (process_i386_opcode_modifier): Updated.
981 (process_i386_operand_type): Likewise.
982 * i386-init.h: Regenerated.
983 * i386-tbl.h: Likewise.
984
985 * i386-opc.h (CpuL1OM): New.
986 (CpuXsave): Updated.
987 (i386_cpu_flags): Add cpul1om.
988
309d3373
JB		 9892009-07-24 Jan Beulich <jbeulich@novell.com>
990
991 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
992 frstpm.
993 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
994 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
995 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
996 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
997 Define.
998 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
999 and cpufisttp.
1000 * i386-opc.tbl: Qualify floating point instructions by their
1001 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
1002 and fsincos to be avilable only on 387. Fix fstsw ax to be
1003 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
1004 and frstpm.
1005 * i386-init.h, i386-tbl.h: Regenerate.
1006
7769efb2
NC		 10072009-07-20 Nick Clifton <nickc@redhat.com>
1008
1009 PR 10288
1010 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
1011 offset or indexed based addressing mode 3.
1012
74bdfecf
NC		 10132009-07-14 Nick Clifton <nickc@redhat.com>
1014
1015 PR 10288
1016 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
1017 patterns.
1018 (arm_decode_shift): Catch illegal register based shifts.
1019 (print_insn_arm): Properly handle negative register r0
1020 post-indexed addressing.
1021
d1aaab3c
DK		 10222009-07-10 Doug Kwan <dougkwan@google.com>
1023
1024 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
1025 lower 32 bits of long types to make hexadecimal output consistent
1026 on both 32-bit and 64-bit hosts.
1027
87337981
AM		 10282009-07-10 Alan Modra <amodra@bigpond.net.au>
1029
1030 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
1031 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
1032 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
1033 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
1034 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
1035 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
1036 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
1037 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
1038 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
1039 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 1040 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM		 1041 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
1042
1103f72c
NC		 10432009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
1044
1045 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
1046
78c66db8
NC		 10472009-07-07 Nick Clifton <nickc@redhat.com>
1048
1049 PR 10288
1050 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
1051 addressing modes.
1052
22102fb0
DD		 10532009-07-06 DJ Delorie <dj@redhat.com>
1054
1055 * mep-desc.c: Regenerate.
1056 * mep-desc.h: Regenerate.
1057 * mep-opc.c: Regenerate.
1058 * mep-opc.h: Regenerate.
1059
922d8de8
DR		 10602009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1061
1062 * i386-opc.h (CpuFMA4): Add CpuFMA4.
1063 (i386_cpu_flags): New.
1064 * i386-gen.c: Add CPU_FMA4_FLAGS.
1065 * i386-opc.tbl: Add FMA4 instructions.
1066 * i386-tbl.h: Regenerate.
1067 * i386-init.h: Regenerate.
1068 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
1069 (OP_XMM_VexW): Ditto.
1070 (OP_EX_VexW): Ditto.
1071 (VEXI4_Fixup): Ditto.
1072 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
1073 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
1074 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
1075 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
1076 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
1077 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
1078 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
1079 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
1080 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
1081 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
1082 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
1083 (get_vex_imm8): New. handle FMA4.
1084 (OP_EX_VexReg): Ditto.
e0c483d6 1085
fe56b6ce
NC		 10862009-06-30 Nick Clifton <nickc@redhat.com>
1087
1088 PR 10288
1089 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
1090 LFM and SFM instructions as comments,.
1091 Improve consistency of formatting for instructions displayed as
1092 comments and decimal values displayed with their hexadecimal
1093 equivalents.
1094 Formatting tidy ups.
1095
05413229
NC		 10962009-06-29 Nick Clifton <nickc@redhat.com>
1097
1098 PR 10288
1099 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
1100 boundary between variaant and generic coprocessor instuctions.
1101 (coprocessor): Use it.
1102 Fix architecture version of MCRR and MRRC instructions.
1103 (arm_opcdes): Fix patterns for STRB and STRH instructions.
1104 (print_insn_coprocessor): Check architecture and extension masks.
1105 Print a hexadecimal version of any decimal constant that is
1106 outside of the range of -16 to +32.
1107 (print_arm_address): Add a return value of the offset used in the
1108 adress, if it is worth printing a hexadecimal version of it.
1109 (print_insn_neon): Print a hexadecimal version of any decimal
1110 constant that is outside of the range of -16 to +32.
1111 (print_insn_arm): Likewise.
1112 (print_insn_thumb16): Likewise.
1113 (print_insn_thumb32): Likewise.
e0c483d6 1114
05413229
NC		 1115 PR 10297
1116 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
1117 of an undefined instruction.
1118 (arm_opcodes): Use it.
1119 (thumb_opcod): Use it.
1120 (thumb32_opc): Use it.
1121
378a0c07
DD		 11222009-06-23 DJ Delorie <dj@redhat.com>
1123
dab97f24
DD		 1124 * mep-desc.c: Regenerate.
1125 * mep-desc.h: Regenerate.
1126 * mep-dis.c: Regenerate.
1127 * mep-ibld.c: Regenerate.
1128 * mep-opc.c: Regenerate.
1129
378a0c07
DD		 1130 * mep-asm.c: Regenerate.
1131 * mep-opc.c: Regenerate.
1132 * mep-opc.h: Regenerate.
1133
aece7d2e
NC		 11342009-06-22 Nick Clifton <nickc@redhat.com>
1135
1136 * po/fi.po: Updated Finish translation.
1137
1998a8e0
AM		 11382009-06-22 Alan Modra <amodra@bigpond.net.au>
1139
1140 * m32c-asm.c: Regenerate.
1141
b33bafa0
AM		 11422009-06-22 Alan Modra <amodra@bigpond.net.au>
1143
1144 * score-dis.c (print_insn_score48, print_insn_score32): Move default
1145 case label to proper lexical block.
1146 * score7-dis.c (print_insn_score32): Likewise.
1147
ce21feb4
MS		 11482009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
1149
1150 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
1151 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
1152 * s390-opc.txt (nopr, nop): Use new instruction format.
1153
0313a2b8
NC		 11542009-06-18 Nick Clifton <nickc@redhat.com>
1155
1156 PR 10288
1157 * arm-dis.c (print_insn_coprocessor): Check that a user specified
1158 ARM architecture supports the matched instruction.
1159 (print_insn_arm): Likewise.
1160 (select_arm_features): New function. Fills in the fields of an
1161 arm_feature_set structure based on a given arm machine number.
1162 (print_insn): Initialise an arm_feature_set structure.
1163
6db7e006
MR		 11642009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
1165
1166 * vax-dis.c (is_function_entry): Return success for synthetic
1167 symbols too.
1168 (is_plt_tail): New function.
1169 (print_insn_vax): Decode PLT entry offset longword.
1170
522fe561
NC		 11712009-06-15 Nick Clifton <nickc@redhat.com>
1172
fe2ceba1
NC		 1173 PR 10186
1174 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
1175 instruction.
1176
522fe561
NC		 1177 PR 10173
1178 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
1179
1316c8b3
NC		 11802009-06-15 Nick Clifton <nickc@redhat.com>
1181
1182 PR 10263
1183 * arm-dis.c (print_insn): Ignore is_data if the user has requested
1184 the disassembly of data as well as instructions.
1185
f6475b48
DE		 11862009-06-11 Doug Evans <dje@sebabeach.org>
1187
1188 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
1189
f865a31d
AG		 11902009-06-11 Anthony Green <green@moxielogic.com>
1191
1192 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
1193 (moxie_form3_opc_info): Add branch instructions.
1194 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
1195 encoded instructions.
1196
0e7c7f11
AG		 11972009-06-06 Anthony Green <green@moxielogic.com>
1198
1199 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
1200 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
1201
67a648f1
AM		 12022009-06-04 Alan Modra <amodra@bigpond.net.au>
1203
1204 * dep-in.sed: Don't use \n in replacement part of s command.
1205 * Makefile.am (DEP1): LC_ALL for uniq.
1206 * Makefile.in: Regenerate.
1207
06c582ac
NC		 12082009-06-02 Nick Clifton <nickc@redhat.com>
1209
1210 * po/nl.po: Updated Dutch translation.
1211
3164099e
TG		 12122009-06-02 Tristan Gingold <gingold@adacore.com>
1213
1214 * ia64-gen.c (parse_resource_users, print_dependency_table,
1215 add_dis_table_ent, finish_distable, insert_bit_table_ent,
1216 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
1217 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
1218 insert_completer_entry, print_completer_entry, print_completer_table,
1219 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
1220
d285268e
DD		 12212009-05-28 DJ Delorie <dj@redhat.com>
1222
1223 * mep-asm.c: Regenerate.
1224 * mep-desc.c: Regenerate.
1225
2f3565a3
DD		 12262009-05-26 DJ Delorie <dj@redhat.com>
1227
1228 * mep-asm.c: Regenerate.
1229 * mep-desc.c: Regenerate.
1230 * mep-desc.h: Regenerate.
1231 * mep-dis.c: Regenerate.
1232 * mep-ibld.c: Regenerate.
1233 * mep-opc.c: Regenerate.
1234 * mep-opc.h: Regenerate.
1235
f12e7348
NC		 12362009-05-26 Nick Clifton <nickc@redhat.com>
1237
1238 * po/id.po: Updated Indonesian translation.
1239 * po/opcodes.pot: Updated template file.
1240
9e097a72
AM		 12412009-05-26 Alan Modra <amodra@bigpond.net.au>
1242
1243 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1244 per line with all lines having continuation backslash. Prefix
1245 first line with "A", following lines with "B".
1246 * Makefile.am (DEP): Don't use dep.sed here.
1247 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1248 dep.sed here on dependencies, sort and uniq.
1249 * Makefile.in: Regenerate.
1250
4f8318f8
TG		 12512009-05-25 Tristan Gingold <gingold@adacore.com>
1252
1253 * makefile.vms (OPT): New variable.
1254 (CFLAGS): Update compilation flags.
1255
1d74713b
DD		 12562009-05-22 DJ Delorie <dj@redhat.com>
1257
1258 * mep-asm.c: Regenerate.
1259 * mep-desc.c: Regenerate.
1260 * mep-desc.h: Regenerate.
1261 * mep-dis.c: Regenerate.
1262 * mep-ibld.c: Regenerate.
1263 * mep-opc.c: Regenerate.
1264 * mep-opc.h: Regenerate.
1265
c1e679ec
DR		 12662009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1267
1268 * i386-opc.h (Cpusse5): Delete.
1269 (i386_cpu_flags): Delete.
1270 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1271 * i386-opc.tbl: Remove SSE5 instructions.
1272 * i386-tbl.h: Regenerate.
1273 * i386-init.h: Regenerate.
1274 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1275 (print_drex_arg): Delete.
1276 (OP_DREX4): Delete.
1277 (OP_DREX3): Delete.
1278 (OP_DREX_ICMP): Delete.
1279 (OP_DREX_FCMP): Delete.
1280 (DREX_*): Delete.
1281 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1282
2b3decb5
AM		 12832009-05-22 Alan Modra <amodra@bigpond.net.au>
1284
1285 * Makefile.am: Run "make dep-am".
1286 * Makefile.in: Regenerate.
1287 * po/POTFILES.in: Regenerate.
1288
eb956800
DD		 12892009-05-19 DJ Delorie <dj@redhat.com>
1290
1291 * mep-asm.c: Regenerate.
1292 * mep-opc.c: Regenerate.
1293
3526b680
DD		 12942009-04-30 DJ Delorie <dj@redhat.com>
1295
1296 * mep-asm.c: Regenerate.
1297 * mep-desc.c: Regenerate.
1298 * mep-desc.h: Regenerate.
1299 * mep-dis.c: Regenerate.
1300 * mep-ibld.c: Regenerate.
1301 * mep-opc.c: Regenerate.
1302 * mep-opc.h: Regenerate.
1303
45be3704
DD		 13042009-04-17 DJ Delorie <dj@redhat.com
1305
1306 * mep-desc.c: Regenerate.
1307 * mep-ibld.c: Regenerate.
1308 * mep-opc.c: Regenerate.
1309 * mep-opc.h: Regenerate.
1310
20135e4c
NC		 13112009-04-15 Anthony Green <green@moxielogic.com>
1312
1313 * moxie-opc.c, moxie-dis.c: Created.
1314 * Makefile.am: Build the moxie source files.
1315 * configure.in: Add moxie support.
1316 * Makefile.in, configure: Rebuilt.
1317 * disassemble.c (disassembler): Add moxie support.
1318 (ARCH_moxie): Define.
1319
ac5c19e6
JB		 13202009-04-15 Jan Beulich <jbeulich@novell.com>
1321
1322 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1323 extension to None.
1324 (pshab, pshaw, pshad, pshaq): Likewise.
1325 * i386-tbl.h: Re-generate.
1326
52de720d
DD		 13272009-04-08 DJ Delorie <dj@redhat.com
1328
1329 * mep-asm.c: Regenerate.
1330 * mep-desc.c: Regenerate.
1331 * mep-desc.h: Regenerate.
1332 * mep-dis.c: Regenerate.
1333 * mep-ibld.c: Regenerate.
1334 * mep-opc.c: Regenerate.
1335 * mep-opc.h: Regenerate.
1336
858d7a6d
PB		 13372009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1338
1339 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1340 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1341 Reorder entries so the extended mnemonics are listed before tlbilx.
1342
70dc4e32
PB		 13432009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1344
1345 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1346 due to -many/-Many.
1347 (print_insn_powerpc): Make sure we only deprecate instructions using
1348 the original dialect and not a modified dialect due to -Many handling.
1349 Move the handling of the condition register and default operands to
1350 the end of the if/else if/else chain.
1351 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1352 instructions from newer processors are listed before older ones.
1353 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1354 that have instructions with conflicting opcodes.
1355
e401b04c
PB		 13562009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1357
1358 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1359 E500MC entries.
1360
b8f9ee44
CL		 13612009-04-01 Christophe Lyon <christophe.lyon@st.com>
1362
1363 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1364
d460e92e
JM		 13652009-03-30 Joseph Myers <joseph@codesourcery.com>
1366
1367 * arm-dis.c (print_insn): Also check section matches in backwards
1368 search for mapping symbol.
1369
d34b5006
L		 13702009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1371
1372 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1373
8d25cc3d
AM		 13742009-03-18 Alan Modra <amodra@bigpond.net.au>
1375
3889c459 1376 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 1377 * Makefile.am: Run "make dep-am".
1378 * Makefile.in: Regenerate.
1379 * openrisc-opc.c: Regenerate.
1380
34dd024a
NC		 13812009-03-10 Nick Clifton <nickc@redhat.com>
1382
1383 * po/id.po: Updated Indonesian translation.
1384
69fe9ce5
AM		 13852009-03-10 Alan Modra <amodra@bigpond.net.au>
1386
1387 * ppc-dis.c: Include "opintl.h".
1388 (struct ppc_mopt, ppc_opts): New.
1389 (ppc_parse_cpu): New function.
1390 (powerpc_init_dialect): Use it.
1391 (print_ppc_disassembler_options): Dump options from ppc_opts.
1392 Internationalize message.
1393
d11fd249
NC		 13942009-03-06 Nick Clifton <nickc@redhat.com>
1395
1396 * po/es.po: Updated Spanish translation.
1397
51dec227
AM		 13982009-03-04 Alan Modra <amodra@bigpond.net.au>
1399
1400 PR 6768
1401 * configure.in: Test for ld --as-needed support. Link shared
1402 libopcodes against libm.
1403 * configure: Regenerate.
1404
c72ab5f2
PB		 14052009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1406
1407 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1408 instructions from newer processors are listed before older ones.
1409
a1f7ca36
AM		 14102009-03-03 Alan Modra <amodra@bigpond.net.au>
1411
1412 * Makefile.am: Run "make dep-am".
1413 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1414 (CFILES): ..here.
1415 * Makefile.in: Regenerate.
1416
c3b7224a
NC		 14172009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1418
1419 * score7-dis.c: New file.
1420 * Makefile.am: Add dependencies for score7-dis.c.
1421 * Makefile.in: Regenerate.
1422 * configure.in: Add score7-dis to score files.
1423 * configure: Regenerate.
1424 * score-dis.c: Add support for score7 architecture.
1425 * score-opc.h: Likewise.
1426
58e24671
RW		 14272009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1428
1429 * configure: Regenerate.
1430
d6f574e0
L		 14312009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1432
1433 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1434
066be9f7
PB		 14352009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1436
1437 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1438 the power7 and the isel instructions.
1439 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1440 (insert_dm, extract_dm): Likewise.
1441 (XB6): Update comment to include XX2 form.
1442 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1443 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1444 (RemoveXX3DM): Delete.
1445 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1446 "mftgpr">: Deprecate for POWER7.
1447 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1448 "frsqrte.">: Deprecate the three operand form and enable the two
1449 operand form for POWER7 and later.
1450 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1451 <"waitsrv", "waitimpl">: Add extended opcodes.
1452 <"ldbrx", "stdbrx">: Enable for POWER7.
1453 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1454 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1455 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1456 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1457 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1458 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1459 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1460 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1461 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1462 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1463 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1464 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1465 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1466 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1467 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1468 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1469 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1470 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1471 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1472 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1473 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1474 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1475 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1476 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1477 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1478 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1479 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1480 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1481 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1482 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1483 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1484 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1485 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1486 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1487 "xxspltw", "xxswapd">: Add VSX opcodes.
1488
4c664d7b
L		 14892009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1490
1491 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1492 (operand_types): Remove Vex_Imm4.
1493
1494 * i386-opc.h (Vex_Imm4): Removed.
1495 (OTMax): Updated.
1496 (i386_operand_type): Remove vex_imm4.
1497
1498 * i386-opc.tbl: Remove Vex_Imm4 comments.
1499 * i386-init.h: Regenerated.
1500 * i386-tbl.h: Likewise.
1501
4ce8808b
RE		 15022009-02-23 Richard Earnshaw <rearnsha@arm.com>
1503
1504 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1505 vq{r}shr{u}n.s64 insnstructions.
1506
0e55be16
PB		 15072009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1508
1509 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1510 operand to be a float point register (FRT/FRS).
1511
b1c9882d
AN		 15122009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1513
1514 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1515 dmfc2 and dmtc2 before the architecture-level variants.
1516
137f2437
NC		 15172009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1518
1519 * fr30-opc.c: Regenerate.
1520 * frv-opc.c: Regenerate.
1521 * ip2k-opc.c: Regenerate.
1522 * iq2000-opc.c: Regenerate.
1523 * lm32-opc.c: Regenerate.
1524 * m32c-opc.c: Regenerate.
1525 * m32r-opc.c: Regenerate.
1526 * mep-opc.c: Regenerate.
1527 * mt-opc.c: Regenerate.
1528 * xc16x-opc.c: Regenerate.
1529 * xstormy16-opc.c: Regenerate.
1530 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1531 sprintf call.
1532
87298967
NS		 15332009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1534
1535 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1536
80890a61
PB		 15372009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1538
1539 * ppc-opc.c: Update copyright year.
1540 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1541 ordering for POWER4 and later and use the correct Server ordering.
1542
ce2f5b3c
L		 15432009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1544
1545 AVX Programming Reference (January, 2009)
1546 * i386-dis.c (PREFIX_VEX_3A44): New.
1547 (VEX_LEN_3A44_P_2): Likewise.
1548 (PREFIX_VEX_3A48): Updated.
1549 (VEX_LEN_3A4C_P_2): Likewise.
1550 (prefix_table): Add PREFIX_VEX_3A44.
1551 (vex_table): Likewise.
1552 (vex_len_table): Add VEX_LEN_3A44_P_2.
1553
1554 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1555 * i386-tbl.h: Regenerated.
1556
52b6b6b9
JM		 15572009-02-03 Sandip Matte <sandip@rmicorp.com>
1558
1559 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1560 (mips_arch_choices): Add XLR entry.
1561 * mips-opc.c (XLR): Define.
1562 (mips_builtin_opcodes): Add XLR instructions.
1563
31dd3154
JM		 15642009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1565
1566 * Makefile.am: Add install-pdf target.
1567 * po/Make-in: Add install-pdf target.
1568 * Makefile.in: Regenerate.
1569
c1a0a41f
DD		 15702009-02-02 DJ Delorie <dj@redhat.com>
1571
1572 * mep-asm.c: Regenerate.
1573 * mep-desc.c: Regenerate.
1574 * mep-desc.h: Regenerate.
1575 * mep-dis.c: Regenerate.
1576 * mep-ibld.c: Regenerate.
1577 * mep-opc.c: Regenerate.
1578 * mep-opc.h: Regenerate.
1579
087b80de
JM		 15802009-01-29 Mark Mitchell <mark@codesourcery.com>
1581
1582 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1583 qsub, and qdsub.
1584
159073e6
NC		 15852009-01-28 Chao-ying Fu <fu@mips.com>
1586
e0c483d6 1587 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1588
6f3b91a6
AM		 15892009-01-20 Alan Modra <amodra@bigpond.net.au>
1590
1591 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1592 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1593 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1594 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1595 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1596 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1597 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1598 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1599
29670fb9
AM		 16002009-01-16 Alan Modra <amodra@bigpond.net.au>
1601
1602 * configure.in (commonbfdlib): Delete.
1603 (SHARED_LIBADD): Add pic libiberty if such is available.
1604 * configure: Regenerate.
1605 * po/POTFILES.in: Regenerate.
1606
21169fcf
PB		 16072009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1608
1609 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1610 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1611 operand form and enable the four operand form for POWER6 and later.
1612 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1613 three operand form for POWER6 and later.
1614
4ca47a51
MF		 16152009-01-14 Mike Frysinger <vapier@gentoo.org>
1616
1617 * bfin-dis.c (OUTS): Use "%s" as format string.
1618
8acd5377
L		 16192009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1620
1621 * i386-gen.c (cpu_flag_init): Remove a white space.
1622 (operand_type_init): Likewise.
1623
c1ec1875
L		 16242009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1625
1626 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1627 * i386-tbl.h: Regenerated.
1628
c7532693
L		 16292009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1630
1631 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1632 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1633 subS, xorS and cmpS.
1634
bd5295b2
L		 16352009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1636
1637 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1638 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1639 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1640 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1641 and CpuSYSCALL.
1642 (lineno): Removed.
1643 (set_bitfield): Take an argument, lineno. Don't report lineno
1644 on error if it is -1.
1645 (process_i386_cpu_flag): Take an argument, lineno.
1646 (process_i386_opcode_modifier): Likewise.
1647 (process_i386_operand_type): Likewise.
1648 (output_i386_opcode): Likewise.
1649 (opcode_hash_entry): Add lineno.
1650 (process_i386_opcodes): Updated.
1651 (process_i386_registers): Likewise.
1652 (process_i386_initializers): Likewise.
1653
1654 * i386-opc.h (CpuP4): Removed.
1655 (CpuK6): Likewise.
1656 (CpuK8): Likewise.
1657 (CpuClflush): New.
1658 (CpuSYSCALL): Likewise.
1659 (CpuMMX): Updated.
1660 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1661 cpuclflush and cpusyscall.
1662
1663 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1664 syscall and sysret.
1665 * i386-init.h: Regenerated.
1666 * i386-tbl.h: Likewise.
1667
1b7f3fb0
L		 16682009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1669
1670 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1671 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1672 (cpu_flags): Add CpuRdtscp.
1673 (set_bitfield): Remove CpuSledgehammer check.
1674
1675 * i386-opc.h (CpuRdtscp): New.
1676 (CpuLM): Updated.
1677 (i386_cpu_flags): Add cpurdtscp.
1678
1679 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1680 * i386-init.h: Regenerated.
1681 * i386-tbl.h: Likewise.
1682
1cb0a767
PB		 16832009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1684
1685 * ppc-opc.c (PPCNONE): Define.
1686 (NOPOWER4): Delete.
1687 (powerpc_opcodes): Initialize the new "deprecated" field.
1688
168e3097
L		 16892009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1690
1691 AVX Programming Reference (December, 2008)
1692 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1693 (VEX_LEN_E7_P_2_M_0): Likewise.
1694 (VEX_LEN_2C_P_1): Updated.
1695 (VEX_LEN_E8_P_2): Likewise.
1696 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1697 (mod_table): Likewise.
1698
1699 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1700 * i386-tbl.h: Regenerated.
1701
22da050b
L		 17022009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1703
1704 * i386-gen.c (process_copyright): Update for 2009.
1705
1706 * i386-init.h: Regenerated.
1707 * i386-tbl.h: Likewise.
1708
0bfee649 17092009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1710
0bfee649
L		 1711 AVX Programming Reference (December, 2008)
1712 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1713 (OP_EX_VexW): Likewise.
0bfee649 1714 (OP_EX_VexImmW): Likewise.
c0f3af97 1715 (OP_XMM_VexW): Likewise.
c0f3af97 1716 (VEXI4_Fixup): Likewise.
c0f3af97 1717 (VPERMIL2_Fixup): Likewise.
c0f3af97 1718 (VexI4): Likewise.
0bfee649
L		 1719 (VexFMA): Likewise.
1720 (Vex128FMA): Likewise.
c0f3af97
L		 1721 (EXVexW): Likewise.
1722 (EXdVexW): Likewise.
1723 (EXqVexW): Likewise.
0bfee649 1724 (EXVexImmW): Likewise.
c0f3af97 1725 (XMVexW): Likewise.
c0f3af97 1726 (VPERMIL2): Likewise.
0bfee649
L		 1727 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1728 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1729 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1730 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1731 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1732 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1733 (get_vex_imm8): Likewise.
1734 (OP_EX_VexReg): Likewise.
1735 vpermil2_op): Likewise.
1736 (EXVexWdq): New.
1737 (vex_w_dq_mode): Likewise.
1738 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1739 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1740 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1741 (es_reg): Updated.
1742 (PREFIX_VEX_38DB): Likewise.
1743 (PREFIX_VEX_3A4A): Likewise.
1744 (PREFIX_VEX_3A60): Likewise.
1745 (PREFIX_VEX_3ADF): Likewise.
1746 (VEX_LEN_3ADF_P_2): Likewise.
1747 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1748 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
0bfee649
L		 1749 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1750 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1751 PREFIX_VEX_3896...PREFIX_VEX_389F,
1752 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1753 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1754 (vex_table): Likewise.
0bfee649
L		 1755 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1756 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1757 (putop): Support "%XW".
1758 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1759
0bfee649 1760 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1761
0bfee649
L		 1762 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1763 instructions. Add new FMA instructions.
28dbc079
L		 1764 * i386-tbl.h: Regenerated.
1765
e0c483d6 17662009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1767
e0c483d6
AM		 1768 * or32-opc.c (or32_print_register, or32_print_immediate,
1769 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1770
0bfee649 1771For older changes see ChangeLog-2008
252b5132
RH		 1772\f
1773Local Variables:
2f6d2f85
NC		 1774mode: change-log
1775left-margin: 8
1776fill-column: 74
252b5132
RH		 1777version-control: never
1778End:
GDB Binutils - Deliverables
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