watchpoint-reuse-slot.exp: Correctly skip unsupported commands.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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6ddf779d
PDM
12014-06-26 Philippe De Muyter <phdm@macqel.be>
2
3 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
4 constants.
5
c151b1c6
AM
62014-06-12 Alan Modra <amodra@gmail.com>
7
8 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
9 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
10
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112014-06-10 H.J. Lu <hongjiu.lu@intel.com>
12
13 * i386-dis.c (fwait_prefix): New.
14 (ckprefix): Set fwait_prefix.
15 (print_insn): Properly print prefixes before fwait.
16
a47622ac
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172014-06-07 Alan Modra <amodra@gmail.com>
18
19 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
20
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212014-06-05 Joel Brobecker <brobecker@adacore.com>
22
23 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
24 bfd's development.sh.
25 * Makefile.in, configure: Regenerate.
26
9f445129
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272014-06-03 Nick Clifton <nickc@redhat.com>
28
29 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
30 decide when extended addressing is being used.
31
ec9a8169
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322014-06-02 Eric Botcazou <ebotcazou@adacore.com>
33
34 * sparc-opc.c (cas): Disable for LEON.
35 (casl): Likewise.
36
cdf2a8b7
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372014-05-20 Alan Modra <amodra@gmail.com>
38
39 * m68k-dis.c: Don't include setjmp.h.
40
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412014-05-09 H.J. Lu <hongjiu.lu@intel.com>
42
43 * i386-dis.c (ADDR16_PREFIX): Removed.
44 (ADDR32_PREFIX): Likewise.
45 (DATA16_PREFIX): Likewise.
46 (DATA32_PREFIX): Likewise.
47 (prefix_name): Updated.
48 (print_insn): Simplify data and address size prefixes processing.
49
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SK
502014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
51
52 * or1k-desc.c: Regenerated.
53 * or1k-desc.h: Likewise.
54 * or1k-opc.c: Likewise.
55 * or1k-opc.h: Likewise.
56 * or1k-opinst.c: Likewise.
57
ae52f483
AB
582014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
59
60 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
61 (I34): New define.
62 (I36): New define.
63 (I66): New define.
64 (I68): New define.
65 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
66 mips64r5.
67 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 68 allow mips64r3 and mips64r5.
ae52f483 69
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702014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
71
72 * mips-opc.c (G3): Remove I4.
73
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742014-05-05 H.J. Lu <hongjiu.lu@intel.com>
75
76 PR binutils/16893
77 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
78 (end_codep): Likewise.
79 (mandatory_prefix): Likewise.
80 (active_seg_prefix): Likewise.
81 (ckprefix): Set active_seg_prefix to the active segment register
82 prefix.
83 (seg_prefix): Removed.
84 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
85 for prefix index. Ignore the index if it is invalid and the
86 mandatory prefix isn't required.
87 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
88 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
89 in used_prefixes here. Don't print unused prefixes. Check
90 active_seg_prefix for the active segment register prefix.
91 Restore the DFLAG bit in sizeflag if the data size prefix is
92 unused. Check the unused mandatory PREFIX_XXX prefixes
93 (append_seg): Only print the segment register which gets used.
94 (OP_E_memory): Check active_seg_prefix for the segment register
95 prefix.
96 (OP_OFF): Likewise.
97 (OP_OFF64): Likewise.
98 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
99
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1002014-05-02 H.J. Lu <hongjiu.lu@intel.com>
101
102 PR binutils/16886
103 * config.in: Regenerated.
104 * configure: Likewise.
105 * configure.in: Check if sigsetjmp is available.
106 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
107 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
108 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
109 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
110 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
111 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
112 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
113 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
114 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
115 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
116 (OPCODES_SIGSETJMP): Likewise.
117 (OPCODES_SIGLONGJMP): Likewise.
118 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
119 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
120 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
121 * xtensa-dis.c (dis_private): Replace jmp_buf with
122 OPCODES_SIGJMP_BUF.
123 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
124 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
125 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
126 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
127 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
128
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1292014-05-01 H.J. Lu <hongjiu.lu@intel.com>
130
131 PR binutils/16891
132 * i386-dis.c (print_insn): Handle prefixes before fwait.
133
a9e18c6a
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1342014-04-26 Alan Modra <amodra@gmail.com>
135
136 * po/POTFILES.in: Regenerate.
137
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1382014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
139
140 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
141 to allow the MIPS XPA ASE.
142 (parse_mips_dis_option): Process the -Mxpa option.
143 * mips-opc.c (XPA): New define.
144 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
145 locations of the ctc0 and cfc0 instructions.
146
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1472014-04-22 Christian Svensson <blue@cmd.nu>
148
149 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
150 * configure.in: Likewise.
151 * disassemble.c: Likewise.
152 * or1k-asm.c: New file.
153 * or1k-desc.c: New file.
154 * or1k-desc.h: New file.
155 * or1k-dis.c: New file.
156 * or1k-ibld.c: New file.
157 * or1k-opc.c: New file.
158 * or1k-opc.h: New file.
159 * or1k-opinst.c: New file.
160 * Makefile.in: Regenerate.
161 * configure: Regenerate.
162 * openrisc-asm.c: Delete.
163 * openrisc-desc.c: Delete.
164 * openrisc-desc.h: Delete.
165 * openrisc-dis.c: Delete.
166 * openrisc-ibld.c: Delete.
167 * openrisc-opc.c: Delete.
168 * openrisc-opc.h: Delete.
169 * or32-dis.c: Delete.
170 * or32-opc.c: Delete.
171
2cf200a4
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1722014-04-04 Ilya Tocar <ilya.tocar@intel.com>
173
174 * i386-dis.c (rm_table): Add encls, enclu.
175 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
176 (cpu_flags): Add CpuSE1.
177 * i386-opc.h (enum): Add CpuSE1.
178 (i386_cpu_flags): Add cpuse1.
179 * i386-opc.tbl: Add encls, enclu.
180 * i386-init.h: Regenerated.
181 * i386-tbl.h: Likewise.
182
31c981bc
AG
1832014-04-02 Anthony Green <green@moxielogic.com>
184
185 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
186 instructions, sex.b and sex.s.
187
76dfed02
YZ
1882014-03-26 Jiong Wang <jiong.wang@arm.com>
189
190 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
191 instructions.
192
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IT
1932014-03-20 Ilya Tocar <ilya.tocar@intel.com>
194
195 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
196 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
197 vscatterqps.
198 * i386-tbl.h: Regenerate.
199
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JM
2002014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
201
202 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
203 %hstick_enable added.
204
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2052014-03-19 Nick Clifton <nickc@redhat.com>
206
207 * rx-decode.opc (bwl): Allow for bogus instructions with a size
208 field of 3.
b41c812c 209 (sbwl, ubwl, SCALE): Likewise.
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210 * rx-decode.c: Regenerate.
211
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2122014-03-12 Alan Modra <amodra@gmail.com>
213
214 * Makefile.in: Regenerate.
215
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AM
2162014-03-05 Alan Modra <amodra@gmail.com>
217
218 Update copyright years.
219
cd0c81e9 2202014-03-04 Heiher <r@hev.cc>
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RS
221
222 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
223
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RS
2242014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
225
226 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
227 so that they come after the Loongson extensions.
228
2c80b753
AM
2292014-03-03 Alan Modra <amodra@gmail.com>
230
231 * i386-gen.c (process_copyright): Emit copyright notice on one line.
232
b721f1fa
AM
2332014-02-28 Alan Modra <amodra@gmail.com>
234
235 * msp430-decode.c: Regenerate.
236
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YZ
2372014-02-27 Jiong Wang <jiong.wang@arm.com>
238
239 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
240 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
241
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YZ
2422014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
243
244 * aarch64-opc.c (print_register_offset_address): Call
245 get_int_reg_name to prepare the register name.
246
d6e9dd78
IT
2472014-02-25 Ilya Tocar <ilya.tocar@intel.com>
248
249 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
250 * i386-tbl.h: Regenerate.
251
2522014-02-20 Ilya Tocar <ilya.tocar@intel.com>
dcf893b5
IT
253
254 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
255 (cpu_flags): Add CpuPREFETCHWT1.
256 * i386-init.h: Regenerate.
257 * i386-opc.h (CpuPREFETCHWT1): New.
258 (i386_cpu_flags): Add cpuprefetchwt1.
259 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
260 * i386-tbl.h: Regenerate.
261
957d0955
IT
2622014-02-20 Ilya Tocar <ilya.tocar@intel.com>
263
264 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
265 to CpuAVX512F.
266 * i386-tbl.h: Regenerate.
267
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2682014-02-19 H.J. Lu <hongjiu.lu@intel.com>
269
270 * i386-gen.c (output_cpu_flags): Don't output trailing space.
271 (output_opcode_modifier): Likewise.
272 (output_operand_type): Likewise.
273 * i386-init.h: Regenerated.
274 * i386-tbl.h: Likewise.
275
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2762014-02-12 Ilya Tocar <ilya.tocar@intel.com>
277
278 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
279 MOD_0FC7_REG_5.
280 (PREFIX enum): Add PREFIX_0FAE_REG_7.
281 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
282 (prefix_table): Add clflusopt.
283 (mod_table): Add xrstors, xsavec, xsaves.
284 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
285 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
286 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
287 * i386-init.h: Regenerate.
288 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
289 xsaves64, xsavec, xsavec64.
290 * i386-tbl.h: Regenerate.
291
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2922014-02-10 Alan Modra <amodra@gmail.com>
293
294 * po/POTFILES.in: Regenerate.
295 * po/opcodes.pot: Regenerate.
296
eaa9d1ad
MZ
2972014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
298 Jan Beulich <jbeulich@suse.com>
299
300 PR binutils/16490
301 * i386-dis.c (OP_E_memory): Fix shift computation for
302 vex_vsib_q_w_dq_mode.
303
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RM
3042014-01-09 Bradley Nelson <bradnelson@google.com>
305 Roland McGrath <mcgrathr@google.com>
306
307 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
308 last_rex_prefix is -1.
309
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3102014-01-08 H.J. Lu <hongjiu.lu@intel.com>
311
312 * i386-gen.c (process_copyright): Update copyright year to 2014.
313
b0b0c9fc
MR
3142014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
315
316 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
317
5fb776a6 318For older changes see ChangeLog-2013
252b5132 319\f
5fb776a6 320Copyright (C) 2014 Free Software Foundation, Inc.
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321
322Copying and distribution of this file, with or without modification,
323are permitted in any medium without royalty provided the copyright
324notice and this notice are preserved.
325
252b5132 326Local Variables:
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327mode: change-log
328left-margin: 8
329fill-column: 74
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330version-control: never
331End:
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