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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12007-03-24 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
4 (print_insn_coprocessor): Handle %<bitfield>x.
5
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62007-03-24 Paul Brook <paul@codesourcery.com>
7 Mark Shinwell <shinwell@codesourcery.com>
8
9 * arm-dis.c (arm_opcodes): Print SRS base register.
10
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112003-03-23 H.J. Lu <hongjiu.lu@intel.com>
12
13 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
14
15 * i386-opc.c (i386_optab): Add rex.wrxb.
16
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172003-03-21 H.J. Lu <hongjiu.lu@intel.com>
18
19 * i386-dis.c (REX_MODE64): Remove definition.
20 (REX_EXTX): Likewise.
21 (REX_EXTY): Likewise.
22 (REX_EXTZ): Likewise.
23 (USED_REX): Use REX_OPCODE instead of 0x40.
24 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
25 REX_R, REX_X and REX_B respectively.
26
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272003-03-21 H.J. Lu <hongjiu.lu@intel.com>
28
29 PR binutils/4218
30 * i386-dis.c (PREGRP38): New.
31 (dis386): Use PREGRP38 for 0x90.
32 (prefix_user_table): Add PREGRP38.
33 (print_insn): Set uses_REPZ_prefix to 1 for pause.
34 (NOP_Fixup1): Properly handle REX bits.
35 (NOP_Fixup2): Likewise.
36
37 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
38 Allow register with nop.
39
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402007-03-20 DJ Delorie <dj@redhat.com>
41
42 * m32c-asm.c: Regenerate.
43 * m32c-desc.c: Regenerate.
44 * m32c-desc.h: Regenerate.
45 * m32c-dis.h: Regenerate.
46 * m32c-ibld.c: Regenerate.
47 * m32c-opc.c: Regenerate.
48 * m32c-opc.h: Regenerate.
49
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502007-03-15 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-opc.c: Include "libiberty.h".
53 (i386_regtab): Remove the last entry.
54 (i386_regtab_size): New.
55 (i386_float_regtab_size): Likewise.
56
57 * i386-opc.h (i386_regtab_size): New.
58 (i386_float_regtab_size): Likewise.
59
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602007-03-15 H.J. Lu <hongjiu.lu@intel.com>
61
62 * Makefile.am (CFILES): Add i386-opc.c.
63 (ALL_MACHINES): Add i386-opc.lo.
64 Run "make dep-am".
65 * Makefile.in: Regenerated.
66
67 * configure.in: Add i386-opc.lo for bfd_i386_arch.
68 * configure: Regenerated.
69
70 * i386-dis.c: Include "opcode/i386.h".
71 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
72 (FWAIT_OPCODE): Remove definition.
73 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
74 (MAX_OPERANDS): Remove definition.
75
76 * i386-opc.c: New file.
77 * i386-opc.h: Likewise.
78
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792007-03-15 H.J. Lu <hongjiu.lu@intel.com>
80
81 * Makefile.in: Regenerated.
82
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832007-03-09 H.J. Lu <hongjiu.lu@intel.com>
84
85 * i386-dis.c (OP_Rd): Renamed to ...
86 (OP_R): This.
87 (Rd): Updated.
88 (Rm): Likewise.
89
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902007-03-08 Alan Modra <amodra@bigpond.net.au>
91
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92 * fr30-asm.c: Regenerate.
93 * frv-asm.c: Regenerate.
94 * ip2k-asm.c: Regenerate.
95 * iq2000-asm.c: Regenerate.
96 * m32c-asm.c: Regenerate.
97 * m32r-asm.c: Regenerate.
98 * m32r-dis.c: Regenerate.
99 * mt-asm.c: Regenerate.
100 * mt-ibld.c: Regenerate.
101 * mt-opc.c: Regenerate.
102 * openrisc-asm.c: Regenerate.
103 * xc16x-asm.c: Regenerate.
104 * xstormy16-asm.c: Regenerate.
105
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106 * Makefile.am: Run "make dep-am".
107 * Makefile.in: Regenerate.
108 * po/POTFILES.in: Regenerate.
109
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1102007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
111
112 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
113 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
114 instruction formats added.
115 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
116 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
117 masks added.
118 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
119 instructions added.
120 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
121 (main): z9-ec cpu type option added.
122 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
123
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1242007-02-22 DJ Delorie <dj@redhat.com>
125
126 * s390-opc.c (INSTR_SS_L2RDRD): New.
127 (MASK_SS_L2RDRD): New.
128 * s390-opc.txt (pka): Use it.
129
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1302007-02-20 Thiemo Seufer <ths@mips.com>
131 Chao-Ying Fu <fu@mips.com>
132
133 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
134 (print_insn_args): Add support for balign instruction.
135 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
136 (mips_builtin_opcodes): Add DSP R2 instructions.
137
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1382007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
139
140 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
141 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
142 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
143 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
144
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1452007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
146
147 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
148 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
149 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
150 and sfpc.
151
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1522007-02-16 Nick Clifton <nickc@redhat.com>
153
154 PR binutils/4045
155 * avr-dis.c (comment_start): New variable, contains the prefix to
156 use when printing addresses in comments.
157 (print_insn_avr): Set comment_start to an empty space if there is
158 no symbol table available as the generic address printing code
159 will prefix the numeric value of the address with 0x.
160
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1612007-02-13 H.J. Lu <hongjiu.lu@intel.com>
162
163 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
164 in struct dis386.
165
bd2f2e55 1662007-02-05 Dave Brolley <brolley@redhat.com>
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167 Richard Sandiford <rsandifo@redhat.com>
168 DJ Delorie <dj@redhat.com>
169 Graydon Hoare <graydon@redhat.com>
170 Frank Ch. Eigler <fche@redhat.com>
171 Ben Elliston <bje@redhat.com>
172
173 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
174 (CFILES): Add mep-*.c
175 (ALL_MACHINES): Add mep-*.lo.
176 (CLEANFILES): Add stamp-mep.
177 (CGEN_CPUS): Add mep.
178 (MEP_DEPS): New variable.
179 (mep-*): New targets.
180 * configure.in: Handle bfd_mep_arch.
181 * disassemble.c (ARCH_mep): New macro.
182 (disassembler): Handle bfd_arch_mep.
183 (disassemble_init_for_target): Likewise.
184 * mep-*: New files for Toshiba Media Processor (MeP).
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185 * Makefile.in: Regenerated.
186 * configure: Regenerated.
187
eb7834a6 1882007-02-05 H.J. Lu <hongjiu.lu@intel.com>
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189
190 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
191 wrap around within the same segment in 16bit mode.
192
eb7834a6 1932007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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194
195 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
196 prefix.
197
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1982007-02-02 H.J. Lu <hongjiu.lu@intel.com>
199
200 * avr-dis.c (avr_operand): Correct PR number in comment.
201
fc523535 2022007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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203
204 * disassemble.c (disassembler_usage): Call
205 print_i386_disassembler_options for i386 disassembler.
206
207 * i386-dis.c (print_i386_disassembler_options): New.
208 (print_insn): Support the new addr64 option.
209
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2102007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
211
212 * ppc-dis.c (powerpc_dialect): Handle ppc440.
213 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
214 be used.
215
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2162007-02-02 Alan Modra <amodra@bigpond.net.au>
217
218 * ppc-opc.c (insert_bdm): -Many comment.
219 (valid_bo): Add "extract" param. Accept both powerpc and power4
220 BO fields when disassembling with -Many.
221 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
222
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2232007-01-08 Kazu Hirata <kazu@codesourcery.com>
224
225 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
226 cpu32 | fido_a except on tbl instructions.
227
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2282007-01-04 Paul Brook <paul@codesourcery.com>
229
230 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
231
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2322007-01-04 Andreas Schwab <schwab@suse.de>
233
234 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
235
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2362007-01-04 Julian Brown <julian@codesourcery.com>
237
238 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
239 vqrshl instructions.
240
10a2343e 241For older changes see ChangeLog-2006
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242\f
243Local Variables:
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244mode: change-log
245left-margin: 8
246fill-column: 74
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