Regenerate some files for recent ARM patches
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
a914a7c9
IT
12018-04-26 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
2
3 * i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
4 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
5 (prefix_table): New instructions (see prefix above).
6 (mod_table): New instructions (see prefix above).
7 Add Gva macro and handle in OP_G.
8 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
9 CPU_MOVDIR64B_FLAGS.
10 (cpu_flags): Likewise.
11 (opcode_modifiers): Add AddrPrefixOpReg.
12 (i386_opcode_modifier): Likewise.
13 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
14 (i386_cpu_flags): Likewise.
15 * i386-opc.tbl: Add movidir{i,64b}.
16 * i386-init.h: Regenerate.
17 * i386-tbl.h: Likewise.
18
e2195274
JB
192018-04-26 Jan Beulich <jbeulich@suse.com>
20
21 * i386-opc.tbl: Fold various non-memory operand AVX512VL
22 templates into their base ones.
23 * i386-tlb.h: Re-generate.
24
59ef5df4
JB
252018-04-26 Jan Beulich <jbeulich@suse.com>
26
27 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
28 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
29 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
30 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
31 * i386-init.h: Re-generate.
32
6e041cf4
JB
332018-04-26 Jan Beulich <jbeulich@suse.com>
34
35 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
36 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
37 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
38 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
39 comment.
40 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
41 and CpuRegMask.
42 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
43 CpuRegMask: Delete.
44 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
45 cpuregzmm, and cpuregmask.
46 * i386-init.h: Re-generate.
47 * i386-tbl.h: Re-generate.
48
0e0eea78
JB
492018-04-26 Jan Beulich <jbeulich@suse.com>
50
51 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
52 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
53 * i386-init.h: Re-generate.
54
2f1bada2
JB
552018-04-26 Jan Beulich <jbeulich@suse.com>
56
57 * i386-gen.c (VexImmExt): Delete.
58 * i386-opc.h (VexImmExt, veximmext): Delete.
59 * i386-opc.tbl: Drop all VexImmExt uses.
60 * i386-tlb.h: Re-generate.
61
bacd1457
JB
622018-04-25 Jan Beulich <jbeulich@suse.com>
63
64 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
65 register-only forms.
66 * i386-tlb.h: Re-generate.
67
10bba94b
TC
682018-04-25 Tamar Christina <tamar.christina@arm.com>
69
70 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
71
c48935d7
IT
722018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
73
74 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
75 PREFIX_0F1C.
76 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
77 (cpu_flags): Add CpuCLDEMOTE.
78 * i386-init.h: Regenerate.
79 * i386-opc.h (enum): Add CpuCLDEMOTE,
80 (i386_cpu_flags): Add cpucldemote.
81 * i386-opc.tbl: Add cldemote.
82 * i386-tbl.h: Regenerate.
83
211dc24b
AM
842018-04-16 Alan Modra <amodra@gmail.com>
85
86 * Makefile.am: Remove sh5 and sh64 support.
87 * configure.ac: Likewise.
88 * disassemble.c: Likewise.
89 * disassemble.h: Likewise.
90 * sh-dis.c: Likewise.
91 * sh64-dis.c: Delete.
92 * sh64-opc.c: Delete.
93 * sh64-opc.h: Delete.
94 * Makefile.in: Regenerate.
95 * configure: Regenerate.
96 * po/POTFILES.in: Regenerate.
97
a9a4b302
AM
982018-04-16 Alan Modra <amodra@gmail.com>
99
100 * Makefile.am: Remove w65 support.
101 * configure.ac: Likewise.
102 * disassemble.c: Likewise.
103 * disassemble.h: Likewise.
104 * w65-dis.c: Delete.
105 * w65-opc.h: Delete.
106 * Makefile.in: Regenerate.
107 * configure: Regenerate.
108 * po/POTFILES.in: Regenerate.
109
04cb01fd
AM
1102018-04-16 Alan Modra <amodra@gmail.com>
111
112 * configure.ac: Remove we32k support.
113 * configure: Regenerate.
114
c2bf1eec
AM
1152018-04-16 Alan Modra <amodra@gmail.com>
116
117 * Makefile.am: Remove m88k support.
118 * configure.ac: Likewise.
119 * disassemble.c: Likewise.
120 * disassemble.h: Likewise.
121 * m88k-dis.c: Delete.
122 * Makefile.in: Regenerate.
123 * configure: Regenerate.
124 * po/POTFILES.in: Regenerate.
125
6793974d
AM
1262018-04-16 Alan Modra <amodra@gmail.com>
127
128 * Makefile.am: Remove i370 support.
129 * configure.ac: Likewise.
130 * disassemble.c: Likewise.
131 * disassemble.h: Likewise.
132 * i370-dis.c: Delete.
133 * i370-opc.c: Delete.
134 * Makefile.in: Regenerate.
135 * configure: Regenerate.
136 * po/POTFILES.in: Regenerate.
137
e82aa794
AM
1382018-04-16 Alan Modra <amodra@gmail.com>
139
140 * Makefile.am: Remove h8500 support.
141 * configure.ac: Likewise.
142 * disassemble.c: Likewise.
143 * disassemble.h: Likewise.
144 * h8500-dis.c: Delete.
145 * h8500-opc.h: Delete.
146 * Makefile.in: Regenerate.
147 * configure: Regenerate.
148 * po/POTFILES.in: Regenerate.
149
fceadf09
AM
1502018-04-16 Alan Modra <amodra@gmail.com>
151
152 * configure.ac: Remove tahoe support.
153 * configure: Regenerate.
154
ae1d3843
L
1552018-04-15 H.J. Lu <hongjiu.lu@intel.com>
156
157 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
158 umwait.
159 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
160 64-bit mode.
161 * i386-tbl.h: Regenerated.
162
de89d0a3
IT
1632018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
164
165 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
166 PREFIX_MOD_1_0FAE_REG_6.
167 (va_mode): New.
168 (OP_E_register): Use va_mode.
169 * i386-dis-evex.h (prefix_table):
170 New instructions (see prefixes above).
171 * i386-gen.c (cpu_flag_init): Add WAITPKG.
172 (cpu_flags): Likewise.
173 * i386-opc.h (enum): Likewise.
174 (i386_cpu_flags): Likewise.
175 * i386-opc.tbl: Add umonitor, umwait, tpause.
176 * i386-init.h: Regenerate.
177 * i386-tbl.h: Likewise.
178
a8eb42a8
AM
1792018-04-11 Alan Modra <amodra@gmail.com>
180
181 * opcodes/i860-dis.c: Delete.
182 * opcodes/i960-dis.c: Delete.
183 * Makefile.am: Remove i860 and i960 support.
184 * configure.ac: Likewise.
185 * disassemble.c: Likewise.
186 * disassemble.h: Likewise.
187 * Makefile.in: Regenerate.
188 * configure: Regenerate.
189 * po/POTFILES.in: Regenerate.
190
caf0678c
L
1912018-04-04 H.J. Lu <hongjiu.lu@intel.com>
192
193 PR binutils/23025
194 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
195 to 0.
196 (print_insn): Clear vex instead of vex.evex.
197
4fb0d2b9
NC
1982018-04-04 Nick Clifton <nickc@redhat.com>
199
200 * po/es.po: Updated Spanish translation.
201
c39e5b26
JB
2022018-03-28 Jan Beulich <jbeulich@suse.com>
203
204 * i386-gen.c (opcode_modifiers): Delete VecESize.
205 * i386-opc.h (VecESize): Delete.
206 (struct i386_opcode_modifier): Delete vecesize.
207 * i386-opc.tbl: Drop VecESize.
208 * i386-tlb.h: Re-generate.
209
8e6e0792
JB
2102018-03-28 Jan Beulich <jbeulich@suse.com>
211
212 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
213 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
214 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
215 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
216 * i386-tlb.h: Re-generate.
217
9f123b91
JB
2182018-03-28 Jan Beulich <jbeulich@suse.com>
219
220 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
221 Fold AVX512 forms
222 * i386-tlb.h: Re-generate.
223
9646c87b
JB
2242018-03-28 Jan Beulich <jbeulich@suse.com>
225
226 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
227 (vex_len_table): Drop Y for vcvt*2si.
228 (putop): Replace plain 'Y' handling by abort().
229
c8d59609
NC
2302018-03-28 Nick Clifton <nickc@redhat.com>
231
232 PR 22988
233 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
234 instructions with only a base address register.
235 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
236 handle AARHC64_OPND_SVE_ADDR_R.
237 (aarch64_print_operand): Likewise.
238 * aarch64-asm-2.c: Regenerate.
239 * aarch64_dis-2.c: Regenerate.
240 * aarch64-opc-2.c: Regenerate.
241
b8c169f3
JB
2422018-03-22 Jan Beulich <jbeulich@suse.com>
243
244 * i386-opc.tbl: Drop VecESize from register only insn forms and
245 memory forms not allowing broadcast.
246 * i386-tlb.h: Re-generate.
247
96bc132a
JB
2482018-03-22 Jan Beulich <jbeulich@suse.com>
249
250 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
251 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
252 sha256*): Drop Disp<N>.
253
9f79e886
JB
2542018-03-22 Jan Beulich <jbeulich@suse.com>
255
256 * i386-dis.c (EbndS, bnd_swap_mode): New.
257 (prefix_table): Use EbndS.
258 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
259 * i386-opc.tbl (bndmov): Move misplaced Load.
260 * i386-tlb.h: Re-generate.
261
d6793fa1
JB
2622018-03-22 Jan Beulich <jbeulich@suse.com>
263
264 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
265 templates allowing memory operands and folded ones for register
266 only flavors.
267 * i386-tlb.h: Re-generate.
268
f7768225
JB
2692018-03-22 Jan Beulich <jbeulich@suse.com>
270
271 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
272 256-bit templates. Drop redundant leftover Disp<N>.
273 * i386-tlb.h: Re-generate.
274
0e35537d
JW
2752018-03-14 Kito Cheng <kito.cheng@gmail.com>
276
277 * riscv-opc.c (riscv_insn_types): New.
278
b4a3689a
NC
2792018-03-13 Nick Clifton <nickc@redhat.com>
280
281 * po/pt_BR.po: Updated Brazilian Portuguese translation.
282
d3d50934
L
2832018-03-08 H.J. Lu <hongjiu.lu@intel.com>
284
285 * i386-opc.tbl: Add Optimize to clr.
286 * i386-tbl.h: Regenerated.
287
bd5dea88
L
2882018-03-08 H.J. Lu <hongjiu.lu@intel.com>
289
290 * i386-gen.c (opcode_modifiers): Remove OldGcc.
291 * i386-opc.h (OldGcc): Removed.
292 (i386_opcode_modifier): Remove oldgcc.
293 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
294 instructions for old (<= 2.8.1) versions of gcc.
295 * i386-tbl.h: Regenerated.
296
e771e7c9
JB
2972018-03-08 Jan Beulich <jbeulich@suse.com>
298
299 * i386-opc.h (EVEXDYN): New.
300 * i386-opc.tbl: Fold various AVX512VL templates.
301 * i386-tlb.h: Re-generate.
302
ed438a93
JB
3032018-03-08 Jan Beulich <jbeulich@suse.com>
304
305 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
306 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
307 vpexpandd, vpexpandq): Fold AFX512VF templates.
308 * i386-tlb.h: Re-generate.
309
454172a9
JB
3102018-03-08 Jan Beulich <jbeulich@suse.com>
311
312 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
313 Fold 128- and 256-bit VEX-encoded templates.
314 * i386-tlb.h: Re-generate.
315
36824150
JB
3162018-03-08 Jan Beulich <jbeulich@suse.com>
317
318 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
319 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
320 vpexpandd, vpexpandq): Fold AVX512F templates.
321 * i386-tlb.h: Re-generate.
322
e7f5c0a9
JB
3232018-03-08 Jan Beulich <jbeulich@suse.com>
324
325 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
326 64-bit templates. Drop Disp<N>.
327 * i386-tlb.h: Re-generate.
328
25a4277f
JB
3292018-03-08 Jan Beulich <jbeulich@suse.com>
330
331 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
332 and 256-bit templates.
333 * i386-tlb.h: Re-generate.
334
d2224064
JB
3352018-03-08 Jan Beulich <jbeulich@suse.com>
336
337 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
338 * i386-tlb.h: Re-generate.
339
1b193f0b
JB
3402018-03-08 Jan Beulich <jbeulich@suse.com>
341
342 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
343 Drop NoAVX.
344 * i386-tlb.h: Re-generate.
345
f2f6a710
JB
3462018-03-08 Jan Beulich <jbeulich@suse.com>
347
348 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
349 * i386-tlb.h: Re-generate.
350
38e314eb
JB
3512018-03-08 Jan Beulich <jbeulich@suse.com>
352
353 * i386-gen.c (opcode_modifiers): Delete FloatD.
354 * i386-opc.h (FloatD): Delete.
355 (struct i386_opcode_modifier): Delete floatd.
356 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
357 FloatD by D.
358 * i386-tlb.h: Re-generate.
359
d53e6b98
JB
3602018-03-08 Jan Beulich <jbeulich@suse.com>
361
362 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
363
2907c2f5
JB
3642018-03-08 Jan Beulich <jbeulich@suse.com>
365
366 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
367 * i386-tlb.h: Re-generate.
368
73053c1f
JB
3692018-03-08 Jan Beulich <jbeulich@suse.com>
370
371 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
372 forms.
373 * i386-tlb.h: Re-generate.
374
52fe4420
AM
3752018-03-07 Alan Modra <amodra@gmail.com>
376
377 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
378 bfd_arch_rs6000.
379 * disassemble.h (print_insn_rs6000): Delete.
380 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
381 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
382 (print_insn_rs6000): Delete.
383
a6743a54
AM
3842018-03-03 Alan Modra <amodra@gmail.com>
385
386 * sysdep.h (opcodes_error_handler): Define.
387 (_bfd_error_handler): Declare.
388 * Makefile.am: Remove stray #.
389 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
390 EDIT" comment.
391 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
392 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
393 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
394 opcodes_error_handler to print errors. Standardize error messages.
395 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
396 and include opintl.h.
397 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
398 * i386-gen.c: Standardize error messages.
399 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
400 * Makefile.in: Regenerate.
401 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
402 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
403 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
404 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
405 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
406 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
407 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
408 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
409 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
410 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
411 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
412 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
413 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
414
8305403a
L
4152018-03-01 H.J. Lu <hongjiu.lu@intel.com>
416
417 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
418 vpsub[bwdq] instructions.
419 * i386-tbl.h: Regenerated.
420
e184813f
AM
4212018-03-01 Alan Modra <amodra@gmail.com>
422
423 * configure.ac (ALL_LINGUAS): Sort.
424 * configure: Regenerate.
425
5b616bef
TP
4262018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
427
428 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
429 macro by assignements.
430
b6f8c7c4
L
4312018-02-27 H.J. Lu <hongjiu.lu@intel.com>
432
433 PR gas/22871
434 * i386-gen.c (opcode_modifiers): Add Optimize.
435 * i386-opc.h (Optimize): New enum.
436 (i386_opcode_modifier): Add optimize.
437 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
438 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
439 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
440 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
441 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
442 vpxord and vpxorq.
443 * i386-tbl.h: Regenerated.
444
e95b887f
AM
4452018-02-26 Alan Modra <amodra@gmail.com>
446
447 * crx-dis.c (getregliststring): Allocate a large enough buffer
448 to silence false positive gcc8 warning.
449
0bccfb29
JW
4502018-02-22 Shea Levy <shea@shealevy.com>
451
452 * disassemble.c (ARCH_riscv): Define if ARCH_all.
453
6b6b6807
L
4542018-02-22 H.J. Lu <hongjiu.lu@intel.com>
455
456 * i386-opc.tbl: Add {rex},
457 * i386-tbl.h: Regenerated.
458
75f31665
MR
4592018-02-20 Maciej W. Rozycki <macro@mips.com>
460
461 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
462 (mips16_opcodes): Replace `M' with `m' for "restore".
463
e207bc53
TP
4642018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
465
466 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
467
87993319
MR
4682018-02-13 Maciej W. Rozycki <macro@mips.com>
469
470 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
471 variable to `function_index'.
472
68d20676
NC
4732018-02-13 Nick Clifton <nickc@redhat.com>
474
475 PR 22823
476 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
477 about truncation of printing.
478
d2159fdc
HW
4792018-02-12 Henry Wong <henry@stuffedcow.net>
480
481 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
482
f174ef9f
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4832018-02-05 Nick Clifton <nickc@redhat.com>
484
485 * po/pt_BR.po: Updated Brazilian Portuguese translation.
486
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IT
4872018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
488
489 * i386-dis.c (enum): Add pconfig.
490 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
491 (cpu_flags): Add CpuPCONFIG.
492 * i386-opc.h (enum): Add CpuPCONFIG.
493 (i386_cpu_flags): Add cpupconfig.
494 * i386-opc.tbl: Add PCONFIG instruction.
495 * i386-init.h: Regenerate.
496 * i386-tbl.h: Likewise.
497
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4982018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
499
500 * i386-dis.c (enum): Add PREFIX_0F09.
501 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
502 (cpu_flags): Add CpuWBNOINVD.
503 * i386-opc.h (enum): Add CpuWBNOINVD.
504 (i386_cpu_flags): Add cpuwbnoinvd.
505 * i386-opc.tbl: Add WBNOINVD instruction.
506 * i386-init.h: Regenerate.
507 * i386-tbl.h: Likewise.
508
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5092018-01-17 Jim Wilson <jimw@sifive.com>
510
511 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
512
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IT
5132018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
514
515 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
516 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
517 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
518 (cpu_flags): Add CpuIBT, CpuSHSTK.
519 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
520 (i386_cpu_flags): Add cpuibt, cpushstk.
521 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
522 * i386-init.h: Regenerate.
523 * i386-tbl.h: Likewise.
524
f6efed01
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5252018-01-16 Nick Clifton <nickc@redhat.com>
526
527 * po/pt_BR.po: Updated Brazilian Portugese translation.
528 * po/de.po: Updated German translation.
529
2721d702
JW
5302018-01-15 Jim Wilson <jimw@sifive.com>
531
532 * riscv-opc.c (match_c_nop): New.
533 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
534
616dcb87
NC
5352018-01-15 Nick Clifton <nickc@redhat.com>
536
537 * po/uk.po: Updated Ukranian translation.
538
3957a496
NC
5392018-01-13 Nick Clifton <nickc@redhat.com>
540
541 * po/opcodes.pot: Regenerated.
542
769c7ea5
NC
5432018-01-13 Nick Clifton <nickc@redhat.com>
544
545 * configure: Regenerate.
546
faf766e3
NC
5472018-01-13 Nick Clifton <nickc@redhat.com>
548
549 2.30 branch created.
550
888a89da
IT
5512018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
552
553 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
554 * i386-tbl.h: Regenerate.
555
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5562018-01-10 Jan Beulich <jbeulich@suse.com>
557
558 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
559 * i386-tbl.h: Re-generate.
560
c9e92278
JB
5612018-01-10 Jan Beulich <jbeulich@suse.com>
562
563 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
564 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
565 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
566 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
567 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
568 Disp8MemShift of AVX512VL forms.
569 * i386-tbl.h: Re-generate.
570
35fd2b2b
JW
5712018-01-09 Jim Wilson <jimw@sifive.com>
572
573 * riscv-dis.c (maybe_print_address): If base_reg is zero,
574 then the hi_addr value is zero.
575
91d8b670
JG
5762018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
577
578 * arm-dis.c (arm_opcodes): Add csdb.
579 (thumb32_opcodes): Add csdb.
580
be2e7d95
JG
5812018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
582
583 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
584 * aarch64-asm-2.c: Regenerate.
585 * aarch64-dis-2.c: Regenerate.
586 * aarch64-opc-2.c: Regenerate.
587
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L
5882018-01-08 H.J. Lu <hongjiu.lu@intel.com>
589
590 PR gas/22681
591 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
592 Remove AVX512 vmovd with 64-bit operands.
593 * i386-tbl.h: Regenerated.
594
35eeb78f
JW
5952018-01-05 Jim Wilson <jimw@sifive.com>
596
597 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
598 jalr.
599
219d1afa
AM
6002018-01-03 Alan Modra <amodra@gmail.com>
601
602 Update year range in copyright notice of all files.
603
1508bbf5
JB
6042018-01-02 Jan Beulich <jbeulich@suse.com>
605
606 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
607 and OPERAND_TYPE_REGZMM entries.
608
1e563868 609For older changes see ChangeLog-2017
3499769a 610\f
1e563868 611Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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612
613Copying and distribution of this file, with or without modification,
614are permitted in any medium without royalty provided the copyright
615notice and this notice are preserved.
616
617Local Variables:
618mode: change-log
619left-margin: 8
620fill-column: 74
621version-control: never
622End:
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