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Always pass signals to the right thread
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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90a915bf
IT		 12014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
2 Alexander Ivchenko <alexander.ivchenko@intel.com>
3 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
4 Sergey Lega <sergey.s.lega@intel.com>
5 Anna Tikhonova <anna.tikhonova@intel.com>
6 Ilya Tocar <ilya.tocar@intel.com>
7 Andrey Turetskiy <andrey.turetskiy@intel.com>
8 Ilya Verbin <ilya.verbin@intel.com>
9 Kirill Yukhin <kirill.yukhin@intel.com>
10 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
11
12 * i386-dis-evex.h: Updated.
13 * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
14 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
15 PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
16 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
17 PREFIX_EVEX_0F3A67.
18 (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
19 VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
20 (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
21 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
22 EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
23 EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
24 EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
25 EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
26 EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
27 (prefix_table): Add entries for new instructions.
28 (vex_len_table): Ditto.
29 (vex_w_table): Ditto.
30 (OP_E_memory): Update xmmq_mode handling.
31 * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
32 (cpu_flags): Add CpuAVX512DQ.
33 * i386-init.h: Regenerared.
34 * i386-opc.h (CpuAVX512DQ): New.
35 (i386_cpu_flags): Add cpuavx512dq.
36 * i386-opc.tbl: Add AVX512DQ instructions.
37 * i386-tbl.h: Regenerate.
38
1ba585e8
IT		 392014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
40 Alexander Ivchenko <alexander.ivchenko@intel.com>
41 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
42 Sergey Lega <sergey.s.lega@intel.com>
43 Anna Tikhonova <anna.tikhonova@intel.com>
44 Ilya Tocar <ilya.tocar@intel.com>
45 Andrey Turetskiy <andrey.turetskiy@intel.com>
46 Ilya Verbin <ilya.verbin@intel.com>
47 Kirill Yukhin <kirill.yukhin@intel.com>
48 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
49
50 * i386-dis-evex.h: Add new instructions (prefixes bellow).
51 * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
52 (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
53 (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
54 PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
55 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
56 PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
57 PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
58 PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
59 PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
60 PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
61 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
62 PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
63 PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
64 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
65 PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
66 PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
67 PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
68 PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
69 PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
70 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
71 PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
72 PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
73 (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
74 VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
75 VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
76 VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
77 VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
78 VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
79 VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
80 VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
81 VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
82 VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
83 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
84 (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
85 EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
86 EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
87 EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
88 EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
89 EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
90 EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
91 (prefix_table): Add entries for new instructions.
92 (vex_table) : Ditto.
93 (vex_len_table): Ditto.
94 (vex_w_table): Ditto.
95 (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
96 mask_bd_mode handling.
97 (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
98 handling.
99 (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
100 handling.
101 (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
102 (OP_EX): Add dqw_swap_mode handling.
103 (OP_VEX): Add mask_bd_mode handling.
104 (OP_Mask): Add mask_bd_mode handling.
105 * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
106 (cpu_flags): Add CpuAVX512BW.
107 * i386-init.h: Regenerated.
108 * i386-opc.h (CpuAVX512BW): New.
109 (i386_cpu_flags): Add cpuavx512bw.
110 * i386-opc.tbl: Add AVX512BW instructions.
111 * i386-tbl.h: Regenerate.
112
99282af6
IT		 1132014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
114 Alexander Ivchenko <alexander.ivchenko@intel.com>
115 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
116 Sergey Lega <sergey.s.lega@intel.com>
117 Anna Tikhonova <anna.tikhonova@intel.com>
118 Ilya Tocar <ilya.tocar@intel.com>
119 Andrey Turetskiy <andrey.turetskiy@intel.com>
120 Ilya Verbin <ilya.verbin@intel.com>
121 Kirill Yukhin <kirill.yukhin@intel.com>
122 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
123
124 * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
125 * i386-tbl.h: Regenerate.
126
b28d1bda
IT		 1272014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
128 Alexander Ivchenko <alexander.ivchenko@intel.com>
129 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
130 Sergey Lega <sergey.s.lega@intel.com>
131 Anna Tikhonova <anna.tikhonova@intel.com>
132 Ilya Tocar <ilya.tocar@intel.com>
133 Andrey Turetskiy <andrey.turetskiy@intel.com>
134 Ilya Verbin <ilya.verbin@intel.com>
135 Kirill Yukhin <kirill.yukhin@intel.com>
136 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
137
138 * i386-dis.c (intel_operand_size): Support 128/256 length in
139 vex_vsib_q_w_dq_mode.
140 (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
141 * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
142 (cpu_flags): Add CpuAVX512VL.
143 * i386-init.h: Regenerated.
144 * i386-opc.h (CpuAVX512VL): New.
145 (i386_cpu_flags): Add cpuavx512vl.
146 (BROADCAST_1TO4, BROADCAST_1TO2): Define.
147 * i386-opc.tbl: Add AVX512VL instructions.
148 * i386-tbl.h: Regenerate.
149
018dc9be
SK		 1502014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
151
152 * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
153 * or1k-opinst.c: Regenerate.
154
792f7758
IT		 1552014-07-08 Ilya Tocar <ilya.tocar@intel.com>
156
157 * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
158 (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
159
35eafcc7
AM		 1602014-07-04 Alan Modra <amodra@gmail.com>
161
162 * configure.ac: Rename from configure.in.
163 * Makefile.in: Regenerate.
164 * config.in: Regenerate.
165
2e98a7bd
AM		 1662014-07-04 Alan Modra <amodra@gmail.com>
167
168 * configure.in: Include bfd/version.m4.
169 (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
170 (BFD_VERSION): Delete.
171 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
172 * configure: Regenerate.
173 * Makefile.in: Regenerate.
174
f36e8886
BS		 1752014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
176 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
177 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
178 Soundararajan <Sounderarajan.D@atmel.com>
179
180 * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
2e98a7bd
AM		 181 (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
182 machine is not avrtiny.
f36e8886 183
6ddf779d
PDM		 1842014-06-26 Philippe De Muyter <phdm@macqel.be>
185
186 * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
187 constants.
188
c151b1c6
AM		 1892014-06-12 Alan Modra <amodra@gmail.com>
190
191 * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
192 * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
193
d9949a36
L		 1942014-06-10 H.J. Lu <hongjiu.lu@intel.com>
195
196 * i386-dis.c (fwait_prefix): New.
197 (ckprefix): Set fwait_prefix.
198 (print_insn): Properly print prefixes before fwait.
199
a47622ac
AM		 2002014-06-07 Alan Modra <amodra@gmail.com>
201
202 * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
203
270c9937
JB		 2042014-06-05 Joel Brobecker <brobecker@adacore.com>
205
206 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
207 bfd's development.sh.
208 * Makefile.in, configure: Regenerate.
209
9f445129
NC		 2102014-06-03 Nick Clifton <nickc@redhat.com>
211
212 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
213 decide when extended addressing is being used.
214
ec9a8169
EB		 2152014-06-02 Eric Botcazou <ebotcazou@adacore.com>
216
217 * sparc-opc.c (cas): Disable for LEON.
218 (casl): Likewise.
219
cdf2a8b7
AM		 2202014-05-20 Alan Modra <amodra@gmail.com>
221
222 * m68k-dis.c: Don't include setjmp.h.
223
df18fdba
L		 2242014-05-09 H.J. Lu <hongjiu.lu@intel.com>
225
226 * i386-dis.c (ADDR16_PREFIX): Removed.
227 (ADDR32_PREFIX): Likewise.
228 (DATA16_PREFIX): Likewise.
229 (DATA32_PREFIX): Likewise.
230 (prefix_name): Updated.
231 (print_insn): Simplify data and address size prefixes processing.
232
999b995d
SK		 2332014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
234
235 * or1k-desc.c: Regenerated.
236 * or1k-desc.h: Likewise.
237 * or1k-opc.c: Likewise.
238 * or1k-opc.h: Likewise.
239 * or1k-opinst.c: Likewise.
240
ae52f483
AB		 2412014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
242
243 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
244 (I34): New define.
245 (I36): New define.
246 (I66): New define.
247 (I68): New define.
248 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
249 mips64r5.
250 (parse_mips_dis_option): Update MSA and virtualization support to
9f445129 251 allow mips64r3 and mips64r5.
ae52f483 252
f7730599
AB		 2532014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
254
255 * mips-opc.c (G3): Remove I4.
256
285ca992
L		 2572014-05-05 H.J. Lu <hongjiu.lu@intel.com>
258
259 PR binutils/16893
260 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
261 (end_codep): Likewise.
262 (mandatory_prefix): Likewise.
263 (active_seg_prefix): Likewise.
264 (ckprefix): Set active_seg_prefix to the active segment register
265 prefix.
266 (seg_prefix): Removed.
267 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
268 for prefix index. Ignore the index if it is invalid and the
269 mandatory prefix isn't required.
270 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
271 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
272 in used_prefixes here. Don't print unused prefixes. Check
273 active_seg_prefix for the active segment register prefix.
274 Restore the DFLAG bit in sizeflag if the data size prefix is
275 unused. Check the unused mandatory PREFIX_XXX prefixes
276 (append_seg): Only print the segment register which gets used.
277 (OP_E_memory): Check active_seg_prefix for the segment register
278 prefix.
279 (OP_OFF): Likewise.
280 (OP_OFF64): Likewise.
281 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
282
8df14d78
L		 2832014-05-02 H.J. Lu <hongjiu.lu@intel.com>
284
285 PR binutils/16886
286 * config.in: Regenerated.
287 * configure: Likewise.
288 * configure.in: Check if sigsetjmp is available.
289 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
290 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
291 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
292 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
293 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
294 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
295 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
296 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
297 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
298 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
299 (OPCODES_SIGSETJMP): Likewise.
300 (OPCODES_SIGLONGJMP): Likewise.
301 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
302 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
303 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
304 * xtensa-dis.c (dis_private): Replace jmp_buf with
305 OPCODES_SIGJMP_BUF.
306 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
307 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
308 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
309 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
310 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
311
86a80a50
L		 3122014-05-01 H.J. Lu <hongjiu.lu@intel.com>
313
314 PR binutils/16891
315 * i386-dis.c (print_insn): Handle prefixes before fwait.
316
a9e18c6a
AM		 3172014-04-26 Alan Modra <amodra@gmail.com>
318
319 * po/POTFILES.in: Regenerate.
320
7d64c587
AB		 3212014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
322
323 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
324 to allow the MIPS XPA ASE.
325 (parse_mips_dis_option): Process the -Mxpa option.
326 * mips-opc.c (XPA): New define.
327 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
328 locations of the ctc0 and cfc0 instructions.
329
73589c9d
CS		 3302014-04-22 Christian Svensson <blue@cmd.nu>
331
332 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
333 * configure.in: Likewise.
334 * disassemble.c: Likewise.
335 * or1k-asm.c: New file.
336 * or1k-desc.c: New file.
337 * or1k-desc.h: New file.
338 * or1k-dis.c: New file.
339 * or1k-ibld.c: New file.
340 * or1k-opc.c: New file.
341 * or1k-opc.h: New file.
342 * or1k-opinst.c: New file.
343 * Makefile.in: Regenerate.
344 * configure: Regenerate.
345 * openrisc-asm.c: Delete.
346 * openrisc-desc.c: Delete.
347 * openrisc-desc.h: Delete.
348 * openrisc-dis.c: Delete.
349 * openrisc-ibld.c: Delete.
350 * openrisc-opc.c: Delete.
351 * openrisc-opc.h: Delete.
352 * or32-dis.c: Delete.
353 * or32-opc.c: Delete.
354
2cf200a4
IT		 3552014-04-04 Ilya Tocar <ilya.tocar@intel.com>
356
357 * i386-dis.c (rm_table): Add encls, enclu.
358 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
359 (cpu_flags): Add CpuSE1.
360 * i386-opc.h (enum): Add CpuSE1.
361 (i386_cpu_flags): Add cpuse1.
362 * i386-opc.tbl: Add encls, enclu.
363 * i386-init.h: Regenerated.
364 * i386-tbl.h: Likewise.
365
31c981bc
AG		 3662014-04-02 Anthony Green <green@moxielogic.com>
367
368 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
369 instructions, sex.b and sex.s.
370
76dfed02
YZ		 3712014-03-26 Jiong Wang <jiong.wang@arm.com>
372
373 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
374 instructions.
375
5fc35d96
IT		 3762014-03-20 Ilya Tocar <ilya.tocar@intel.com>
377
378 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
379 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
380 vscatterqps.
381 * i386-tbl.h: Regenerate.
382
ec92c392
JM		 3832014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
384
385 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
386 %hstick_enable added.
387
b8985e5c
NC		 3882014-03-19 Nick Clifton <nickc@redhat.com>
389
390 * rx-decode.opc (bwl): Allow for bogus instructions with a size
391 field of 3.
b41c812c 392 (sbwl, ubwl, SCALE): Likewise.
b8985e5c
NC		 393 * rx-decode.c: Regenerate.
394
fa47fa92
AM		 3952014-03-12 Alan Modra <amodra@gmail.com>
396
397 * Makefile.in: Regenerate.
398
4b95cf5c
AM		 3992014-03-05 Alan Modra <amodra@gmail.com>
400
401 Update copyright years.
402
cd0c81e9 4032014-03-04 Heiher <r@hev.cc>
4ba154f5
RS		 404
405 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
406
079b5aec
RS		 4072014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
408
409 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
410 so that they come after the Loongson extensions.
411
2c80b753
AM		 4122014-03-03 Alan Modra <amodra@gmail.com>
413
414 * i386-gen.c (process_copyright): Emit copyright notice on one line.
415
b721f1fa
AM		 4162014-02-28 Alan Modra <amodra@gmail.com>
417
418 * msp430-decode.c: Regenerate.
419
f17c8bfc
YZ		 4202014-02-27 Jiong Wang <jiong.wang@arm.com>
421
422 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
423 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
424
a58549dd
YZ		 4252014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
426
427 * aarch64-opc.c (print_register_offset_address): Call
428 get_int_reg_name to prepare the register name.
429
d6e9dd78
IT		 4302014-02-25 Ilya Tocar <ilya.tocar@intel.com>
431
432 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
433 * i386-tbl.h: Regenerate.
434
4352014-02-20 Ilya Tocar <ilya.tocar@intel.com>
dcf893b5
IT		 436
437 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
438 (cpu_flags): Add CpuPREFETCHWT1.
439 * i386-init.h: Regenerate.
440 * i386-opc.h (CpuPREFETCHWT1): New.
441 (i386_cpu_flags): Add cpuprefetchwt1.
442 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
443 * i386-tbl.h: Regenerate.
444
957d0955
IT		 4452014-02-20 Ilya Tocar <ilya.tocar@intel.com>
446
447 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
448 to CpuAVX512F.
449 * i386-tbl.h: Regenerate.
450
10632b79
L		 4512014-02-19 H.J. Lu <hongjiu.lu@intel.com>
452
453 * i386-gen.c (output_cpu_flags): Don't output trailing space.
454 (output_opcode_modifier): Likewise.
455 (output_operand_type): Likewise.
456 * i386-init.h: Regenerated.
457 * i386-tbl.h: Likewise.
458
963f3586
IT		 4592014-02-12 Ilya Tocar <ilya.tocar@intel.com>
460
461 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
462 MOD_0FC7_REG_5.
463 (PREFIX enum): Add PREFIX_0FAE_REG_7.
464 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
465 (prefix_table): Add clflusopt.
466 (mod_table): Add xrstors, xsavec, xsaves.
467 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
468 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
469 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
470 * i386-init.h: Regenerate.
471 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
472 xsaves64, xsavec, xsavec64.
473 * i386-tbl.h: Regenerate.
474
c1c69e83
AM		 4752014-02-10 Alan Modra <amodra@gmail.com>
476
477 * po/POTFILES.in: Regenerate.
478 * po/opcodes.pot: Regenerate.
479
eaa9d1ad
MZ		 4802014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
481 Jan Beulich <jbeulich@suse.com>
482
483 PR binutils/16490
484 * i386-dis.c (OP_E_memory): Fix shift computation for
485 vex_vsib_q_w_dq_mode.
486
e2e6193d
RM		 4872014-01-09 Bradley Nelson <bradnelson@google.com>
488 Roland McGrath <mcgrathr@google.com>
489
490 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
491 last_rex_prefix is -1.
492
221fd5d5
L		 4932014-01-08 H.J. Lu <hongjiu.lu@intel.com>
494
495 * i386-gen.c (process_copyright): Update copyright year to 2014.
496
b0b0c9fc
MR		 4972014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
498
499 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
500
5fb776a6 501For older changes see ChangeLog-2013
252b5132 502\f
5fb776a6 503Copyright (C) 2014 Free Software Foundation, Inc.
752937aa
NC		 504
505Copying and distribution of this file, with or without modification,
506are permitted in any medium without royalty provided the copyright
507notice and this notice are preserved.
508
252b5132 509Local Variables:
2f6d2f85
NC		 510mode: change-log
511left-margin: 8
512fill-column: 74
252b5132
RH		 513version-control: never
514End:
GDB Binutils - Deliverables
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