Commit | Line | Data |
---|---|---|
4cb0953d L |
1 | 2011-06-30 H.J. Lu <hongjiu.lu@intel.com> |
2 | ||
3 | AVX Programming Reference (June, 2011) | |
4 | * i386-dis.c (vex_len_table): Correct rorxS. | |
5 | ||
6 | * i386-opc.tbl: Correct rorx. | |
7 | * i386-tbl.h: Regenerated. | |
8 | ||
906efcbc L |
9 | 2011-06-29 H.J. Lu <hongjiu.lu@intel.com> |
10 | ||
11 | * tilegx-opc.c (find_opcode): Replace "index" with "i". | |
12 | * tilepro-opc.c (find_opcode): Likewise. | |
13 | ||
ceb94aa5 RS |
14 | 2011-06-29 Richard Sandiford <rdsandiford@googlemail.com> |
15 | ||
16 | * mips16-opc.c (jalrc, jrc): Move earlier in file. | |
17 | ||
f7002f42 L |
18 | 2011-06-21 H.J. Lu <hongjiu.lu@intel.com> |
19 | ||
20 | * i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and | |
21 | PREFIX_VEX_0F388E. | |
22 | ||
56300268 AS |
23 | 2011-06-17 Andreas Schwab <schwab@redhat.com> |
24 | ||
25 | * Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ... | |
26 | (MOSTLYCLEANFILES): ... here. | |
27 | * Makefile.in: Regenerate. | |
28 | ||
bcf2cf9f AM |
29 | 2011-06-14 Alan Modra <amodra@gmail.com> |
30 | ||
31 | * Makefile.in: Regenerate. | |
32 | ||
aa137e4d NC |
33 | 2011-06-13 Walter Lee <walt@tilera.com> |
34 | ||
35 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, | |
36 | tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. | |
37 | * Makefile.in: Regenerate. | |
38 | * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. | |
39 | * configure: Regenerate. | |
40 | * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. | |
41 | * po/POTFILES.in: Regenerate. | |
42 | * tilegx-dis.c: New file. | |
43 | * tilegx-opc.c: New file. | |
44 | * tilepro-dis.c: New file. | |
45 | * tilepro-opc.c: New file. | |
46 | ||
6c30d220 L |
47 | 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> |
48 | ||
49 | AVX Programming Reference (June, 2011) | |
50 | * i386-dis.c (XMGatherQ): New. | |
51 | * i386-dis.c (EXxmm_mb): New. | |
52 | (EXxmm_mb): Likewise. | |
53 | (EXxmm_mw): Likewise. | |
54 | (EXxmm_md): Likewise. | |
55 | (EXxmm_mq): Likewise. | |
56 | (EXxmmdw): Likewise. | |
57 | (EXxmmqd): Likewise. | |
58 | (VexGatherQ): Likewise. | |
59 | (MVexVSIBDWpX): Likewise. | |
60 | (MVexVSIBQWpX): Likewise. | |
61 | (xmm_mb_mode): Likewise. | |
62 | (xmm_mw_mode): Likewise. | |
63 | (xmm_md_mode): Likewise. | |
64 | (xmm_mq_mode): Likewise. | |
65 | (xmmdw_mode): Likewise. | |
66 | (xmmqd_mode): Likewise. | |
67 | (ymmxmm_mode): Likewise. | |
68 | (vex_vsib_d_w_dq_mode): Likewise. | |
69 | (vex_vsib_q_w_dq_mode): Likewise. | |
70 | (MOD_VEX_0F385A_PREFIX_2): Likewise. | |
71 | (MOD_VEX_0F388C_PREFIX_2): Likewise. | |
72 | (MOD_VEX_0F388E_PREFIX_2): Likewise. | |
73 | (PREFIX_0F3882): Likewise. | |
74 | (PREFIX_VEX_0F3816): Likewise. | |
75 | (PREFIX_VEX_0F3836): Likewise. | |
76 | (PREFIX_VEX_0F3845): Likewise. | |
77 | (PREFIX_VEX_0F3846): Likewise. | |
78 | (PREFIX_VEX_0F3847): Likewise. | |
79 | (PREFIX_VEX_0F3858): Likewise. | |
80 | (PREFIX_VEX_0F3859): Likewise. | |
81 | (PREFIX_VEX_0F385A): Likewise. | |
82 | (PREFIX_VEX_0F3878): Likewise. | |
83 | (PREFIX_VEX_0F3879): Likewise. | |
84 | (PREFIX_VEX_0F388C): Likewise. | |
85 | (PREFIX_VEX_0F388E): Likewise. | |
86 | (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. | |
87 | (PREFIX_VEX_0F38F5): Likewise. | |
88 | (PREFIX_VEX_0F38F6): Likewise. | |
89 | (PREFIX_VEX_0F3A00): Likewise. | |
90 | (PREFIX_VEX_0F3A01): Likewise. | |
91 | (PREFIX_VEX_0F3A02): Likewise. | |
92 | (PREFIX_VEX_0F3A38): Likewise. | |
93 | (PREFIX_VEX_0F3A39): Likewise. | |
94 | (PREFIX_VEX_0F3A46): Likewise. | |
95 | (PREFIX_VEX_0F3AF0): Likewise. | |
96 | (VEX_LEN_0F3816_P_2): Likewise. | |
97 | (VEX_LEN_0F3819_P_2): Likewise. | |
98 | (VEX_LEN_0F3836_P_2): Likewise. | |
99 | (VEX_LEN_0F385A_P_2_M_0): Likewise. | |
100 | (VEX_LEN_0F38F5_P_0): Likewise. | |
101 | (VEX_LEN_0F38F5_P_1): Likewise. | |
102 | (VEX_LEN_0F38F5_P_3): Likewise. | |
103 | (VEX_LEN_0F38F6_P_3): Likewise. | |
104 | (VEX_LEN_0F38F7_P_1): Likewise. | |
105 | (VEX_LEN_0F38F7_P_2): Likewise. | |
106 | (VEX_LEN_0F38F7_P_3): Likewise. | |
107 | (VEX_LEN_0F3A00_P_2): Likewise. | |
108 | (VEX_LEN_0F3A01_P_2): Likewise. | |
109 | (VEX_LEN_0F3A38_P_2): Likewise. | |
110 | (VEX_LEN_0F3A39_P_2): Likewise. | |
111 | (VEX_LEN_0F3A46_P_2): Likewise. | |
112 | (VEX_LEN_0F3AF0_P_3): Likewise. | |
113 | (VEX_W_0F3816_P_2): Likewise. | |
114 | (VEX_W_0F3818_P_2): Likewise. | |
115 | (VEX_W_0F3819_P_2): Likewise. | |
116 | (VEX_W_0F3836_P_2): Likewise. | |
117 | (VEX_W_0F3846_P_2): Likewise. | |
118 | (VEX_W_0F3858_P_2): Likewise. | |
119 | (VEX_W_0F3859_P_2): Likewise. | |
120 | (VEX_W_0F385A_P_2_M_0): Likewise. | |
121 | (VEX_W_0F3878_P_2): Likewise. | |
122 | (VEX_W_0F3879_P_2): Likewise. | |
123 | (VEX_W_0F3A00_P_2): Likewise. | |
124 | (VEX_W_0F3A01_P_2): Likewise. | |
125 | (VEX_W_0F3A02_P_2): Likewise. | |
126 | (VEX_W_0F3A38_P_2): Likewise. | |
127 | (VEX_W_0F3A39_P_2): Likewise. | |
128 | (VEX_W_0F3A46_P_2): Likewise. | |
129 | (MOD_VEX_0F3818_PREFIX_2): Removed. | |
130 | (MOD_VEX_0F3819_PREFIX_2): Likewise. | |
131 | (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. | |
132 | (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. | |
133 | (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. | |
134 | (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. | |
135 | (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. | |
136 | (VEX_LEN_0F3A0E_P_2): Likewise. | |
137 | (VEX_LEN_0F3A0F_P_2): Likewise. | |
138 | (VEX_LEN_0F3A42_P_2): Likewise. | |
139 | (VEX_LEN_0F3A4C_P_2): Likewise. | |
140 | (VEX_W_0F3818_P_2_M_0): Likewise. | |
141 | (VEX_W_0F3819_P_2_M_0): Likewise. | |
142 | (prefix_table): Updated. | |
143 | (three_byte_table): Likewise. | |
144 | (vex_table): Likewise. | |
145 | (vex_len_table): Likewise. | |
146 | (vex_w_table): Likewise. | |
147 | (mod_table): Likewise. | |
148 | (putop): Handle "LW". | |
149 | (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, | |
150 | xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, | |
151 | vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. | |
152 | (OP_EX): Likewise. | |
153 | (OP_E_memory): Handle vex_vsib_d_w_dq_mode and | |
154 | vex_vsib_q_w_dq_mode. | |
155 | (OP_XMM): Handle vex_vsib_q_w_dq_mode. | |
156 | (OP_VEX): Likewise. | |
157 | ||
158 | * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS | |
159 | and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, | |
160 | CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. | |
161 | (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. | |
162 | (opcode_modifiers): Add VecSIB. | |
163 | ||
164 | * i386-opc.h (CpuAVX2): New. | |
165 | (CpuBMI2): Likewise. | |
166 | (CpuLZCNT): Likewise. | |
167 | (CpuINVPCID): Likewise. | |
168 | (VecSIB128): Likewise. | |
169 | (VecSIB256): Likewise. | |
170 | (VecSIB): Likewise. | |
171 | (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. | |
172 | (i386_opcode_modifier): Add vecsib. | |
173 | ||
174 | * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. | |
175 | * i386-init.h: Regenerated. | |
176 | * i386-tbl.h: Likewise. | |
177 | ||
d535accd QN |
178 | 2011-06-03 Quentin Neill <quentin.neill@amd.com> |
179 | ||
180 | * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS. | |
181 | * i386-init.h: Regenerated. | |
182 | ||
f8b960bc NC |
183 | 2011-06-03 Nick Clifton <nickc@redhat.com> |
184 | ||
185 | PR binutils/12752 | |
186 | * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for | |
187 | computing address offsets. | |
188 | (print_arm_address): Likewise. | |
189 | (print_insn_arm): Likewise. | |
190 | (print_insn_thumb16): Likewise. | |
191 | (print_insn_thumb32): Likewise. | |
192 | ||
26d97720 NS |
193 | 2011-06-02 Jie Zhang <jie@codesourcery.com> |
194 | Nathan Sidwell <nathan@codesourcery.com> | |
195 | Maciej Rozycki <macro@codesourcery.com> | |
196 | ||
197 | * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 | |
198 | as address offset. | |
199 | (print_arm_address): Likewise. Elide positive #0 appropriately. | |
200 | (print_insn_arm): Likewise. | |
201 | ||
f8b960bc NC |
202 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
203 | ||
204 | PR gas/12752 | |
205 | * arm-dis.c (print_insn_thumb32): Do not sign extend addresses | |
206 | passed to print_address_func. | |
207 | ||
cc643b88 NC |
208 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
209 | ||
210 | * arm-dis.c: Fix spelling mistakes. | |
211 | * op/opcodes.pot: Regenerate. | |
212 | ||
c8fa16ed AK |
213 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
214 | ||
215 | * s390-opc.c: Replace S390_OPERAND_REG_EVEN with | |
216 | S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type. | |
217 | * s390-opc.txt: Fix cxr instruction type. | |
218 | ||
5e4b319c AK |
219 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
220 | ||
221 | * s390-opc.c: Add new instruction types marking register pair | |
222 | operands. | |
223 | * s390-opc.txt: Match instructions having register pair operands | |
224 | to the new instruction types. | |
225 | ||
fda544a2 NC |
226 | 2011-05-19 Nick Clifton <nickc@redhat.com> |
227 | ||
228 | * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2 | |
229 | operands. | |
230 | ||
4cab4add QN |
231 | 2011-05-10 Quentin Neill <quentin.neill@amd.com> |
232 | ||
233 | * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS. | |
234 | * i386-init.h: Regenerated. | |
235 | ||
b4e7b885 NC |
236 | 2011-04-27 Nick Clifton <nickc@redhat.com> |
237 | ||
238 | * po/da.po: Updated Danish translation. | |
239 | ||
2f7f7710 AM |
240 | 2011-04-26 Anton Blanchard <anton@samba.org> |
241 | ||
242 | * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7. | |
243 | ||
9887672f DD |
244 | 2011-04-21 DJ Delorie <dj@redhat.com> |
245 | ||
246 | * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs. | |
247 | * rx-decode.c: Regenerate. | |
248 | ||
3251b375 L |
249 | 2011-04-20 H.J. Lu <hongjiu.lu@intel.com> |
250 | ||
251 | * i386-init.h: Regenerated. | |
252 | ||
b13a3ca6 QN |
253 | 2011-04-19 Quentin Neill <quentin.neill@amd.com> |
254 | ||
255 | * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits | |
256 | from bdver1 flags. | |
257 | ||
7d063384 NC |
258 | 2011-04-13 Nick Clifton <nickc@redhat.com> |
259 | ||
260 | * v850-dis.c (disassemble): Always print a closing square brace if | |
261 | an opening square brace was printed. | |
262 | ||
32a94698 NC |
263 | 2011-04-12 Nick Clifton <nickc@redhat.com> |
264 | ||
265 | PR binutils/12534 | |
266 | * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn | |
267 | patterns. | |
268 | (print_insn_thumb32): Handle %L. | |
269 | ||
d2cd1205 JB |
270 | 2011-04-11 Julian Brown <julian@codesourcery.com> |
271 | ||
272 | * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. | |
273 | (print_insn_thumb32): Add APSR bitmask support. | |
274 | ||
1fbaefec PB |
275 | 2011-04-07 Paul Carroll<pcarroll@codesourcery.com> |
276 | ||
277 | * arm-dis.c (print_insn): init vars moved into private_data structure. | |
278 | ||
67171547 MF |
279 | 2011-03-24 Mike Frysinger <vapier@gentoo.org> |
280 | ||
281 | * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic. | |
282 | ||
8cc66334 EW |
283 | 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> |
284 | ||
285 | * avr-dis.c (avr_operand): Add opcode_str parameter. Check for | |
286 | post-increment to support LPM Z+ instruction. Add support for 'E' | |
287 | constraint for DES instruction. | |
288 | (print_insn_avr): Adjust calls to avr_operand. Rename variable. | |
289 | ||
34e77a92 RS |
290 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
291 | ||
292 | * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. | |
293 | ||
35fc36a8 RS |
294 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
295 | ||
296 | * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. | |
297 | Use branch types instead. | |
298 | (print_insn): Likewise. | |
299 | ||
0067d8fc MR |
300 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
301 | ||
302 | * mips-opc.c (mips_builtin_opcodes): Correct register use | |
303 | annotation of "alnv.ps". | |
304 | ||
3eebd5eb MR |
305 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
306 | ||
307 | * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. | |
308 | ||
500cccad MF |
309 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
310 | ||
311 | * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. | |
312 | ||
f5caf9f4 MF |
313 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
314 | ||
315 | * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. | |
316 | ||
e5bc4265 MF |
317 | 2011-02-19 Mike Frysinger <vapier@gentoo.org> |
318 | ||
319 | * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and | |
320 | a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, | |
321 | av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, | |
322 | exception, end_of_registers, msize, memory, bfd_mach. | |
323 | (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, | |
324 | LB0REG, LC1REG, LT1REG, LB1REG): Delete | |
325 | (AXREG, AWREG, LCREG, LTREG, LBREG): Define. | |
326 | (get_allreg): Change to new defines. Fallback to abort(). | |
327 | ||
602427c4 MF |
328 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
329 | ||
330 | * bfin-dis.c: Add whitespace/parenthesis where needed. | |
331 | ||
298c1ec2 MF |
332 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
333 | ||
334 | * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater | |
335 | than 7. | |
336 | ||
822ce8ee RW |
337 | 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
338 | ||
339 | * configure: Regenerate. | |
340 | ||
13c02f06 MF |
341 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
342 | ||
343 | * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. | |
344 | ||
4db66394 MF |
345 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
346 | ||
347 | * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output | |
348 | dregs only when P is set, and dregs_lo otherwise. | |
349 | ||
36f44611 MF |
350 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
351 | ||
352 | * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. | |
353 | ||
9805c0a5 MF |
354 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
355 | ||
356 | * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. | |
357 | ||
43a6aa65 MF |
358 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
359 | ||
360 | * bfin-dis.c (machine_registers): Delete REG_GP. | |
361 | (reg_names): Delete "GP". | |
362 | (decode_allregs): Change REG_GP to REG_LASTREG. | |
363 | ||
26bb3ddd MF |
364 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
365 | ||
89c0d58c MR |
366 | * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, |
367 | M_IH, M_IU): Delete. | |
26bb3ddd | 368 | |
69b8ea4a MF |
369 | 2011-02-11 Mike Frysinger <vapier@gentoo.org> |
370 | ||
371 | * bfin-dis.c (reg_names): Add const. | |
372 | (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, | |
373 | decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, | |
374 | decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, | |
375 | decode_counters, decode_allregs): Likewise. | |
376 | ||
42d5f9c6 MS |
377 | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
378 | ||
56300268 | 379 | * i386-dis.c (OP_J): Parenthesize expression to prevent |
42d5f9c6 MS |
380 | truncated addresses. |
381 | (print_insn): Fix indentation off-by-one. | |
382 | ||
4be0c941 NC |
383 | 2011-02-01 Nick Clifton <nickc@redhat.com> |
384 | ||
385 | * po/da.po: Updated Danish translation. | |
386 | ||
6b069ee7 AM |
387 | 2011-01-21 Dave Murphy <davem@devkitpro.org> |
388 | ||
389 | * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. | |
390 | ||
e3949f17 L |
391 | 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> |
392 | ||
393 | * i386-dis.c (sIbT): New. | |
394 | (b_T_mode): Likewise. | |
395 | (dis386): Replace sIb with sIbT on "pushT". | |
396 | (x86_64_table): Replace sIb with Ib on "aam" and "aad". | |
397 | (OP_sI): Handle b_T_mode. Properly sign-extend byte. | |
398 | ||
752573b2 JK |
399 | 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> |
400 | ||
401 | * i386-init.h: Regenerated. | |
402 | * i386-tbl.h: Regenerated | |
403 | ||
2a2a0f38 QN |
404 | 2011-01-17 Quentin Neill <quentin.neill@amd.com> |
405 | ||
406 | * i386-dis.c (REG_XOP_TBM_01): New. | |
407 | (REG_XOP_TBM_02): New. | |
408 | (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. | |
409 | (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 | |
410 | entries, and add bextr instruction. | |
411 | ||
412 | * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. | |
413 | (cpu_flags): Add CpuTBM. | |
414 | ||
415 | * i386-opc.h (CpuTBM) New. | |
416 | (i386_cpu_flags): Add bit cputbm. | |
417 | ||
418 | * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, | |
419 | blcs, blsfill, blsic, t1mskc, and tzmsk. | |
420 | ||
90d6ff62 DD |
421 | 2011-01-12 DJ Delorie <dj@redhat.com> |
422 | ||
423 | * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. | |
424 | ||
c95354ed MX |
425 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
426 | ||
427 | * mips-dis.c (print_insn_args): Adjust the value to print the real | |
428 | offset for "+c" argument. | |
429 | ||
f7465604 NC |
430 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
431 | ||
432 | * po/da.po: Updated Danish translation. | |
433 | ||
639e30d2 NS |
434 | 2011-01-05 Nathan Sidwell <nathan@codesourcery.com> |
435 | ||
436 | * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. | |
437 | ||
f12dc422 L |
438 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
439 | ||
440 | * i386-dis.c (REG_VEX_38F3): New. | |
441 | (PREFIX_0FBC): Likewise. | |
442 | (PREFIX_VEX_38F2): Likewise. | |
443 | (PREFIX_VEX_38F3_REG_1): Likewise. | |
444 | (PREFIX_VEX_38F3_REG_2): Likewise. | |
445 | (PREFIX_VEX_38F3_REG_3): Likewise. | |
446 | (PREFIX_VEX_38F7): Likewise. | |
447 | (VEX_LEN_38F2_P_0): Likewise. | |
448 | (VEX_LEN_38F3_R_1_P_0): Likewise. | |
449 | (VEX_LEN_38F3_R_2_P_0): Likewise. | |
450 | (VEX_LEN_38F3_R_3_P_0): Likewise. | |
451 | (VEX_LEN_38F7_P_0): Likewise. | |
452 | (dis386_twobyte): Use PREFIX_0FBC. | |
453 | (reg_table): Add REG_VEX_38F3. | |
454 | (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, | |
455 | PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, | |
456 | PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. | |
457 | (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and | |
458 | PREFIX_VEX_38F7. | |
459 | (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, | |
460 | VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and | |
461 | VEX_LEN_38F7_P_0. | |
462 | ||
463 | * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. | |
464 | (cpu_flags): Add CpuBMI. | |
465 | ||
466 | * i386-opc.h (CpuBMI): New. | |
467 | (i386_cpu_flags): Add cpubmi. | |
468 | ||
469 | * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. | |
470 | * i386-init.h: Regenerated. | |
471 | * i386-tbl.h: Likewise. | |
472 | ||
cb21baef L |
473 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
474 | ||
475 | * i386-dis.c (VexGdq): New. | |
476 | (OP_VEX): Handle dq_mode. | |
477 | ||
0db46eb4 L |
478 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
479 | ||
480 | * i386-gen.c (process_copyright): Update copyright to 2011. | |
481 | ||
9e9e0820 | 482 | For older changes see ChangeLog-2010 |
252b5132 RH |
483 | \f |
484 | Local Variables: | |
2f6d2f85 NC |
485 | mode: change-log |
486 | left-margin: 8 | |
487 | fill-column: 74 | |
252b5132 RH |
488 | version-control: never |
489 | End: |