Commit | Line | Data |
---|---|---|
bad9ceea JJ |
1 | 2004-06-08 Jakub Jelinek <jakub@redhat.com> |
2 | ||
3 | * ia64-gen.c (in_iclass): Handle more postinc st | |
4 | and ld variants. | |
5 | * ia64-asmtab.c: Rebuilt. | |
6 | ||
0451f5df MS |
7 | 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com> |
8 | ||
9 | * s390-opc.txt: Correct architecture mask for some opcodes. | |
10 | lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available | |
11 | in the esa mode as well. | |
12 | ||
f6f9408f JR |
13 | 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> |
14 | ||
15 | * sh-dis.c (target_arch): Make unsigned. | |
16 | (print_insn_sh): Replace (most of) switch with a call to | |
17 | sh_get_arch_from_bfd_mach(). Also use new architecture flags system. | |
18 | * sh-opc.h: Redefine architecture flags values. | |
19 | Add sh3-nommu architecture. | |
20 | Reorganise <arch>_up macros so they make more visual sense. | |
21 | (SH_MERGE_ARCH_SET): Define new macro. | |
22 | (SH_VALID_BASE_ARCH_SET): Likewise. | |
23 | (SH_VALID_MMU_ARCH_SET): Likewise. | |
24 | (SH_VALID_CO_ARCH_SET): Likewise. | |
25 | (SH_VALID_ARCH_SET): Likewise. | |
26 | (SH_MERGE_ARCH_SET_VALID): Likewise. | |
27 | (SH_ARCH_SET_HAS_FPU): Likewise. | |
28 | (SH_ARCH_SET_HAS_DSP): Likewise. | |
29 | (SH_ARCH_UNKNOWN_ARCH): Likewise. | |
30 | (sh_get_arch_from_bfd_mach): Add prototype. | |
31 | (sh_get_arch_up_from_bfd_mach): Likewise. | |
32 | (sh_get_bfd_mach_from_arch_set): Likewise. | |
33 | (sh_merge_bfd_arc): Likewise. | |
34 | ||
be8c092b NC |
35 | 2004-05-24 Peter Barada <peter@the-baradas.com> |
36 | ||
37 | * m68k-dis.c(print_insn_m68k): Strip body of diassembly out | |
38 | into new match_insn_m68k function. Loop over canidate | |
39 | matches and select first that completely matches. | |
40 | * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. | |
41 | * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea | |
42 | to verify addressing for MAC/EMAC. | |
43 | * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC | |
44 | reigster halves since 'fpu' and 'spl' look misleading. | |
45 | * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. | |
46 | * m68k-opc.c: Rearragne mac/emac cases to use longest for | |
47 | first, tighten up match masks. | |
48 | * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce | |
49 | 'size' from special case code in print_insn_m68k to | |
50 | determine decode size of insns. | |
51 | ||
a30e9cc4 AM |
52 | 2004-05-19 Alan Modra <amodra@bigpond.net.au> |
53 | ||
54 | * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as | |
55 | well as when -mpower4. | |
56 | ||
9598fbe5 NC |
57 | 2004-05-13 Nick Clifton <nickc@redhat.com> |
58 | ||
59 | * po/fr.po: Updated French translation. | |
60 | ||
6b6e92f4 NC |
61 | 2004-05-05 Peter Barada <peter@the-baradas.com> |
62 | ||
63 | * m68k-dis.c(print_insn_m68k): Add new chips, use core | |
64 | variants in arch_mask. Only set m68881/68851 for 68k chips. | |
65 | * m68k-op.c: Switch from ColdFire chips to core variants. | |
66 | ||
a404d431 AM |
67 | 2004-05-05 Alan Modra <amodra@bigpond.net.au> |
68 | ||
a30e9cc4 | 69 | PR 147. |
a404d431 AM |
70 | * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC. |
71 | ||
f3806e43 BE |
72 | 2004-04-29 Ben Elliston <bje@au.ibm.com> |
73 | ||
520ceea4 BE |
74 | * ppc-opc.c (XCMPL): Renmame to XOPL. Update users. |
75 | (powerpc_opcodes): Add "dbczl" instruction for PPC970. | |
f3806e43 | 76 | |
1f1799d5 KK |
77 | 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp> |
78 | ||
79 | * sh-dis.c (print_insn_sh): Print the value in constant pool | |
80 | as a symbol if it looks like a symbol. | |
81 | ||
fd99574b NC |
82 | 2004-04-22 Peter Barada <peter@the-baradas.com> |
83 | ||
84 | * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on | |
85 | appropriate ColdFire architectures. | |
86 | (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC | |
87 | mask addressing. | |
88 | Add EMAC instructions, fix MAC instructions. Remove | |
89 | macmw/macml/msacmw/msacml instructions since mask addressing now | |
90 | supported. | |
91 | ||
b4781d44 JJ |
92 | 2004-04-20 Jakub Jelinek <jakub@redhat.com> |
93 | ||
94 | * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define. | |
95 | (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to | |
96 | suffix. Use fmov*x macros, create all 3 fpsize variants in one | |
97 | macro. Adjust all users. | |
98 | ||
91809fda NC |
99 | 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com> |
100 | ||
101 | * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" | |
102 | separately. | |
103 | ||
f4453dfa NC |
104 | 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
105 | ||
106 | * m32r-asm.c: Regenerate. | |
107 | ||
9b0de91a SS |
108 | 2004-03-29 Stan Shebs <shebs@apple.com> |
109 | ||
110 | * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer | |
111 | used. | |
112 | ||
e20c0b3d AM |
113 | 2004-03-19 Alan Modra <amodra@bigpond.net.au> |
114 | ||
115 | * aclocal.m4: Regenerate. | |
116 | * config.in: Regenerate. | |
117 | * configure: Regenerate. | |
118 | * po/POTFILES.in: Regenerate. | |
119 | * po/opcodes.pot: Regenerate. | |
120 | ||
fdd12ef3 AM |
121 | 2004-03-16 Alan Modra <amodra@bigpond.net.au> |
122 | ||
123 | * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle | |
124 | PPC_OPERANDS_GPR_0. | |
125 | * ppc-opc.c (RA0): Define. | |
126 | (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. | |
127 | (RAOPT): Rename from RAO. Update all uses. | |
a9c3619e | 128 | (powerpc_opcodes): Use RA0 as appropriate. |
fdd12ef3 | 129 | |
2dc111b3 | 130 | 2004-03-15 Aldy Hernandez <aldyh@redhat.com> |
fdd12ef3 AM |
131 | |
132 | * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg. | |
2dc111b3 | 133 | |
7bfeee7b AM |
134 | 2004-03-15 Alan Modra <amodra@bigpond.net.au> |
135 | ||
136 | * sparc-dis.c (print_insn_sparc): Update getword prototype. | |
137 | ||
7ffdda93 ML |
138 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> |
139 | ||
140 | * i386-dis.c (GRPPLOCK): Delete. | |
7bfeee7b | 141 | (grps): Delete GRPPLOCK entry. |
7ffdda93 | 142 | |
cc0ec051 AM |
143 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> |
144 | ||
145 | * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions. | |
146 | (M, Mp): Use OP_M. | |
147 | (None, PADLOCK_SPECIAL, PADLOCK_0): Delete. | |
148 | (GRPPADLCK): Define. | |
149 | (dis386): Use NOP_Fixup on "nop". | |
150 | (dis386_twobyte): Use GRPPADLCK on opcode 0xa7. | |
151 | (twobyte_has_modrm): Set for 0xa7. | |
152 | (padlock_table): Delete. Move to.. | |
153 | (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence | |
154 | and clflush. | |
155 | (print_insn): Revert PADLOCK_SPECIAL code. | |
156 | (OP_E): Delete sfence, lfence, mfence checks. | |
157 | ||
4fd61dcb JJ |
158 | 2004-03-12 Jakub Jelinek <jakub@redhat.com> |
159 | ||
160 | * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg. | |
161 | (INVLPG_Fixup): New function. | |
162 | (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag. | |
163 | ||
0f10071e ML |
164 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> |
165 | ||
166 | * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. | |
167 | (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. | |
168 | (padlock_table): New struct with PadLock instructions. | |
169 | (print_insn): Handle PADLOCK_SPECIAL. | |
170 | ||
c02908d2 AM |
171 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> |
172 | ||
173 | * i386-dis.c (grps): Use clflush by default for 0x0fae/7. | |
174 | (OP_E): Twiddle clflush to sfence here. | |
175 | ||
d5bb7600 NC |
176 | 2004-03-08 Nick Clifton <nickc@redhat.com> |
177 | ||
178 | * po/de.po: Updated German translation. | |
179 | ||
ae51a426 JR |
180 | 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> |
181 | ||
182 | * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in | |
183 | nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. | |
184 | * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions | |
185 | accordingly. | |
186 | ||
676a64f4 RS |
187 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
188 | ||
189 | * frv-asm.c: Regenerate. | |
190 | * frv-desc.c: Regenerate. | |
191 | * frv-desc.h: Regenerate. | |
192 | * frv-dis.c: Regenerate. | |
193 | * frv-ibld.c: Regenerate. | |
194 | * frv-opc.c: Regenerate. | |
195 | * frv-opc.h: Regenerate. | |
196 | ||
c7a48b9a RS |
197 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
198 | ||
199 | * frv-desc.c, frv-opc.c: Regenerate. | |
200 | ||
8ae0baa2 RS |
201 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
202 | ||
203 | * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. | |
204 | ||
ce11586c JR |
205 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> |
206 | ||
207 | * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. | |
208 | Also correct mistake in the comment. | |
209 | ||
6a5709a5 JR |
210 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> |
211 | ||
212 | * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to | |
213 | ensure that double registers have even numbers. | |
214 | Add REG_N_B01 for nn01 (binary 01) nibble to ensure | |
215 | that reserved instruction 0xfffd does not decode the same | |
216 | as 0xfdfd (ftrv). | |
217 | * sh-opc.h: Add REG_N_D nibble type and use it whereever | |
218 | REG_N refers to a double register. | |
219 | Add REG_N_B01 nibble type and use it instead of REG_NM | |
220 | in ftrv. | |
221 | Adjust the bit patterns in a few comments. | |
222 | ||
e5d2b64f | 223 | 2004-02-25 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
224 | |
225 | * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. | |
e5d2b64f | 226 | |
1f04b05f AH |
227 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
228 | ||
229 | * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat. | |
230 | ||
2f3b8700 AH |
231 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
232 | ||
233 | * ppc-opc.c (powerpc_opcodes): Add m*ivor35. | |
234 | ||
f0b26da6 | 235 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
236 | |
237 | * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34, | |
238 | mtivor32, mtivor33, mtivor34. | |
f0b26da6 | 239 | |
23d59c56 | 240 | 2004-02-19 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
241 | |
242 | * ppc-opc.c (powerpc_opcodes): Add mfmcar. | |
23d59c56 | 243 | |
34920d91 NC |
244 | 2004-02-10 Petko Manolov <petkan@nucleusys.com> |
245 | ||
246 | * arm-opc.h Maverick accumulator register opcode fixes. | |
247 | ||
44d86481 BE |
248 | 2004-02-13 Ben Elliston <bje@wasabisystems.com> |
249 | ||
250 | * m32r-dis.c: Regenerate. | |
251 | ||
17707c23 MS |
252 | 2004-01-27 Michael Snyder <msnyder@redhat.com> |
253 | ||
254 | * sh-opc.h (sh_table): "fsrra", not "fssra". | |
255 | ||
fe3a9bc4 NC |
256 | 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au> |
257 | ||
258 | * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten | |
259 | contraints. | |
260 | ||
ff24f124 JJ |
261 | 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au> |
262 | ||
263 | * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. | |
264 | ||
a02a862a AM |
265 | 2004-01-19 Alan Modra <amodra@bigpond.net.au> |
266 | ||
267 | * i386-dis.c (OP_E): Print scale factor on intel mode sib when not | |
268 | 1. Don't print scale factor on AT&T mode when index missing. | |
269 | ||
d164ea7f AO |
270 | 2004-01-16 Alexandre Oliva <aoliva@redhat.com> |
271 | ||
272 | * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended | |
273 | when loaded into XR registers. | |
274 | ||
cb10e79a RS |
275 | 2004-01-14 Richard Sandiford <rsandifo@redhat.com> |
276 | ||
277 | * frv-desc.h: Regenerate. | |
278 | * frv-desc.c: Regenerate. | |
279 | * frv-opc.c: Regenerate. | |
280 | ||
f532f3fa MS |
281 | 2004-01-13 Michael Snyder <msnyder@redhat.com> |
282 | ||
283 | * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn. | |
284 | ||
e45d0630 PB |
285 | 2004-01-09 Paul Brook <paul@codesourcery.com> |
286 | ||
287 | * arm-opc.h (arm_opcodes): Move generic mcrr after known | |
288 | specific opcodes. | |
289 | ||
3ba7a1aa DJ |
290 | 2004-01-07 Daniel Jacobowitz <drow@mvista.com> |
291 | ||
292 | * Makefile.am (libopcodes_la_DEPENDENCIES) | |
293 | (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory | |
294 | comment about the problem. | |
295 | * Makefile.in: Regenerate. | |
296 | ||
ba2d3f07 AO |
297 | 2004-01-06 Alexandre Oliva <aoliva@redhat.com> |
298 | ||
299 | 2003-12-19 Alexandre Oliva <aoliva@redhat.com> | |
300 | * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some | |
301 | cut&paste errors in shifting/truncating numerical operands. | |
302 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
303 | * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo. | |
304 | (parse_uslo16): Likewise. | |
305 | (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. | |
306 | (parse_d12): Parse gotoff12 and gotofffuncdesc12. | |
307 | (parse_s12): Likewise. | |
308 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
309 | * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo. | |
310 | (parse_uslo16): Likewise. | |
311 | (parse_uhi16): Parse gothi and gotfuncdeschi. | |
312 | (parse_d12): Parse got12 and gotfuncdesc12. | |
313 | (parse_s12): Likewise. | |
314 | ||
3ab48931 NC |
315 | 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl> |
316 | ||
317 | * msp430-dis.c (msp430_doubleoperand): Check for an 'add' | |
318 | instruction which looks similar to an 'rla' instruction. | |
a0bd404e | 319 | |
c9e214e5 | 320 | For older changes see ChangeLog-0203 |
252b5132 RH |
321 | \f |
322 | Local Variables: | |
2f6d2f85 NC |
323 | mode: change-log |
324 | left-margin: 8 | |
325 | fill-column: 74 | |
252b5132 RH |
326 | version-control: never |
327 | End: |