[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-05-05  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
	vldm/vstm.

2006-05-05  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

	* mips-opc.c: Add macro for cache instruction.

2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
	    David Ung  <davidu@mips.com>

	* mips-dis.c (mips_arch_choices): Add smartmips instruction
	decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
	2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
	MIPS64R2.
	* mips-opc.c: fix random typos in comments.
	(INSN_SMARTMIPS): New defines.
	(mips_builtin_opcodes): Add paired single support for MIPS32R2.
	Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
	flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
	FP_S and FP_D flags to denote single and double register
	accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
	Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
	for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
	variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
	release 2 ISAs.
	* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.

2006-05-03  Thiemo Seufer  <ths@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.

2006-05-02  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
	(print_mips16_insn_arg): Force mips16 to odd addresses.

2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Add udi instructions
	"udi0" to "udi15".
	* mips-dis.c (print_insn_args): Adds udi argument handling.

2006-04-28  James E Wilson  <wilson@specifix.com>

	* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
	error message.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
	    Nigel Stephens  <nigel@mips.com>

	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	names.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	(print_insn_mips):  Adjust print_insn_args call.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

	* mips-dis.c (print_insn_args): Print $fcc only for FP
	instructions, use $cc elsewise.

2006-04-28  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	VMOV.

2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

2006-04-19  Alan Modra  <amodra@bigpond.net.au>

	* avr-dis.c (avr_operand): Warning fix.

	* configure: Regenerate.

2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>

	* po/POTFILES.in: Regenerated.

2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>

	PR binutils/2454
	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	the symolic form of an address, so that the output of objdump -d
	can be reassembled.

2006-04-10  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.

2006-04-06  Nick Clifton  <nickc@redhat.com>

	* po/vi/po: Updated Vietnamese translation.

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
1f3c39b9 JB	1	2006-05-05 Julian Brown <julian@codesourcery.com>
	2
	3	* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
	4	vldm/vstm.
	5
d43b4baf TS	6	2006-05-05 Thiemo Seufer <ths@mips.com>
	7	David Ung <davidu@mips.com>
	8
	9	* mips-opc.c: Add macro for cache instruction.
	10
39a7806d TS	11	2006-05-04 Thiemo Seufer <ths@mips.com>
	12	Nigel Stephens <nigel@mips.com>
	13	David Ung <davidu@mips.com>
	14
	15	* mips-dis.c (mips_arch_choices): Add smartmips instruction
	16	decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
	17	2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
	18	MIPS64R2.
	19	* mips-opc.c: fix random typos in comments.
	20	(INSN_SMARTMIPS): New defines.
	21	(mips_builtin_opcodes): Add paired single support for MIPS32R2.
	22	Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
	23	flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
	24	FP_S and FP_D flags to denote single and double register
	25	accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
	26	Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
	27	for MIPS32R2. Add SmartMIPS instructions. Add two-argument
	28	variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
	29	release 2 ISAs.
	30	* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
	31
104b4fab TS	32	2006-05-03 Thiemo Seufer <ths@mips.com>
	33
	34	* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
	35
022fac6d TS	36	2006-05-02 Thiemo Seufer <ths@mips.com>
	37	Nigel Stephens <nigel@mips.com>
	38	David Ung <davidu@mips.com>
	39
	40	* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
	41	(print_mips16_insn_arg): Force mips16 to odd addresses.
	42
9bcd4f99 TS	43	2006-04-30 Thiemo Seufer <ths@mips.com>
	44	David Ung <davidu@mips.com>
	45
	46	* mips-opc.c (mips_builtin_opcodes): Add udi instructions
	47	"udi0" to "udi15".
	48	* mips-dis.c (print_insn_args): Adds udi argument handling.
	49
f095b97b JW	50	2006-04-28 James E Wilson <wilson@specifix.com>
	51
	52	* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
	53	error message.
	54
59c455b3 TS	55	2006-04-28 Thiemo Seufer <ths@mips.com>
59c455b3 TS	56	David Ung <davidu@mips.com>
bdb09db1	57	Nigel Stephens <nigel@mips.com>
59c455b3 TS	58
	59	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
	60	names.
	61
cc0ca239	62	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	63	Nigel Stephens <nigel@mips.com>
cc0ca239 TS	64	David Ung <davidu@mips.com>
	65
	66	* mips-dis.c (print_insn_args): Add mips_opcode argument.
	67	(print_insn_mips): Adjust print_insn_args call.
	68
0d09bfe6	69	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	70	Nigel Stephens <nigel@mips.com>
0d09bfe6 TS	71
	72	* mips-dis.c (print_insn_args): Print $fcc only for FP
	73	instructions, use $cc elsewise.
	74
654c225a	75	2006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1	76	Nigel Stephens <nigel@mips.com>
654c225a TS	77
	78	* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
	79	Map MIPS16 registers to O32 names.
	80	(print_mips16_insn_arg): Use mips16_reg_names.
	81
0dbde4cf JB	82	2006-04-26 Julian Brown <julian@codesourcery.com>
	83
	84	* arm-dis.c (print_insn_neon): Disassemble floating-point constant
	85	VMOV.
	86
16980d0b JB	87	2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
	88	Julian Brown <julian@codesourcery.com>
	89
	90	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
	91	%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
	92	Add unified load/store instruction names.
	93	(neon_opcode_table): New.
	94	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	95	(arm_decode_bitfield): New.
	96	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	97	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	98	(print_insn_neon): New.
	99	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	100	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	101	(print_insn_thumb32): Likewise.
	102
ec3fcc56 AM	103	2006-04-19 Alan Modra <amodra@bigpond.net.au>
	104
	105	* Makefile.am: Run "make dep-am".
	106	* Makefile.in: Regenerate.
	107
241a6c40 AM	108	2006-04-19 Alan Modra <amodra@bigpond.net.au>
241a6c40 AM	109
7c6646cd AM	110	* avr-dis.c (avr_operand): Warning fix.
7c6646cd AM	111
241a6c40 AM	112	* configure: Regenerate.
241a6c40 AM	113
e7403566 DJ	114	2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
	115
	116	* po/POTFILES.in: Regenerated.
	117
52f16a0e NC	118	2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
	119
	120	PR binutils/2454
	121	* avr-dis.c (avr_operand): Arrange for a comment to appear before
	122	the symolic form of an address, so that the output of objdump -d
	123	can be reassembled.
	124
e78efa90 DD	125	2006-04-10 DJ Delorie <dj@redhat.com>
	126
	127	* m32c-asm.c: Regenerate.
	128
108a6f8e CD	129	2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
	130
	131	* Makefile.am: Add install-html target.
	132	* Makefile.in: Regenerate.
	133
a135cb2c NC	134	2006-04-06 Nick Clifton <nickc@redhat.com>
	135
	136	* po/vi/po: Updated Vietnamese translation.
	137
47426b41 AM	138	2006-03-31 Paul Koning <ni1d@arrl.net>
	139
	140	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	141
331f1cbe BS	142	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	143
	144	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	145	logic to identify halfword shifts.
	146
c16d2bf0 PB	147	2006-03-16 Paul Brook <paul@codesourcery.com>
	148
	149	* arm-dis.c (arm_opcodes): Rename swi to svc.
	150	(thumb_opcodes): Ditto.
	151
5348b81e DD	152	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	153
5398310a DD	154	* m32c-asm.c: Regenerate.
	155	* m32c-desc.c: Likewise.
	156	* m32c-desc.h: Likewise.
	157	* m32c-dis.c: Likewise.
	158	* m32c-ibld.c: Likewise.
5348b81e DD	159	* m32c-opc.c: Likewise.
	160	* m32c-opc.h: Likewise.
	161
253d272c DD	162	2006-03-10 DJ Delorie <dj@redhat.com>
	163
	164	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	165	* m32c-opc.c: Likewise.
	166	* m32c-opc.h: Likewise.
	167
	168
f530741d NC	169	2006-03-09 Nick Clifton <nickc@redhat.com>
	170
	171	* po/sv.po: Updated Swedish translation.
	172
35c52694 L	173	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	174
	175	PR binutils/2428
	176	* i386-dis.c (REP_Fixup): New function.
	177	(AL): Remove duplicate.
	178	(Xbr): New.
	179	(Xvr): Likewise.
	180	(Ybr): Likewise.
	181	(Yvr): Likewise.
	182	(indirDXr): Likewise.
	183	(ALr): Likewise.
	184	(eAXr): Likewise.
	185	(dis386): Updated entries of ins, outs, movs, lods and stos.
	186
ed963e2d NC	187	2006-03-05 Nick Clifton <nickc@redhat.com>
	188
	189	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	190	signed 32-bit value into an unsigned 32-bit field when the host is
	191	a 64-bit machine.
	192	* fr30-ibld.c: Regenerate.
	193	* frv-ibld.c: Regenerate.
	194	* ip2k-ibld.c: Regenerate.
	195	* iq2000-asm.c: Regenerate.
	196	* iq2000-ibld.c: Regenerate.
	197	* m32c-ibld.c: Regenerate.
	198	* m32r-ibld.c: Regenerate.
	199	* openrisc-ibld.c: Regenerate.
	200	* xc16x-ibld.c: Regenerate.
	201	* xstormy16-ibld.c: Regenerate.
	202
c7d41dc5 NC	203	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	204
	205	* xc16x-asm.c: Regenerate.
	206	* xc16x-dis.c: Regenerate.
c7d41dc5	207
f7d9e5c3 CD	208	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	209
	210	* po/Make-in: Add html target.
	211
331d2d0d L	212	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	213
	214	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	215	Intel Merom New Instructions.
	216	(THREE_BYTE_0): Likewise.
	217	(THREE_BYTE_1): Likewise.
	218	(three_byte_table): Likewise.
	219	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	220	THREE_BYTE_1 for entry 0x3a.
	221	(twobyte_has_modrm): Updated.
	222	(twobyte_uses_SSE_prefix): Likewise.
	223	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	224	Instructions.
	225
ff3f9d5b DM	226	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	227
	228	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	229	(v9_hpriv_reg_names): New table.
	230	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	231	New cases '$' and '%' for read/write hyperprivileged register.
	232	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	233	window handling and rdhpr/wrhpr instructions.
	234
6772dd07 DD	235	2006-02-24 DJ Delorie <dj@redhat.com>
	236
	237	* m32c-desc.c: Regenerate with linker relaxation attributes.
	238	* m32c-desc.h: Likewise.
	239	* m32c-dis.c: Likewise.
	240	* m32c-opc.c: Likewise.
	241
62b3e311 PB	242	2006-02-24 Paul Brook <paul@codesourcery.com>
	243
	244	* arm-dis.c (arm_opcodes): Add V7 instructions.
	245	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	246	(print_arm_address): New function.
	247	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	248	(psr_name): New function.
	249	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	250
59cf82fe L	251	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	252
	253	* ia64-opc-i.c (bXc): New.
	254	(mXc): Likewise.
	255	(OpX2TaTbYaXcC): Likewise.
	256	(TF). Likewise.
	257	(TFCM). Likewise.
	258	(ia64_opcodes_i): Add instructions for tf.
	259
	260	* ia64-opc.h (IMMU5b): New.
	261
	262	* ia64-asmtab.c: Regenerated.
	263
19a7219f L	264	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	265
	266	* ia64-gen.c: Update copyright years.
	267	* ia64-opc-b.c: Likewise.
	268
7f3dfb9c L	269	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	270
	271	* ia64-gen.c (lookup_regindex): Handle ".vm".
	272	(print_dependency_table): Handle '\"'.
	273
	274	* ia64-ic.tbl: Updated from SDM 2.2.
	275	* ia64-raw.tbl: Likewise.
	276	* ia64-waw.tbl: Likewise.
	277	* ia64-asmtab.c: Regenerated.
	278
	279	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	280
d70c5fc7 NC	281	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	282	Anil Paranjape <anilp1@kpitcummins.com>
	283	Shilin Shakti <shilins@kpitcummins.com>
	284
	285	* xc16x-desc.h: New file
	286	* xc16x-desc.c: New file
	287	* xc16x-opc.h: New file
	288	* xc16x-opc.c: New file
	289	* xc16x-ibld.c: New file
	290	* xc16x-asm.c: New file
	291	* xc16x-dis.c: New file
	292	* Makefile.am: Entries for xc16x
	293	* Makefile.in: Regenerate
	294	* cofigure.in: Add xc16x target information.
	295	* configure: Regenerate.
	296	* disassemble.c: Add xc16x target information.
	297
a1cfb73e L	298	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	299
	300	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	301	moves.
	302
6dd5059a L	303	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	304
	305	* i386-dis.c ('Z'): Add a new macro.
	306	(dis386_twobyte): Use "movZ" for control register moves.
	307
8536c657 NC	308	2006-02-10 Nick Clifton <nickc@redhat.com>
	309
	310	* iq2000-asm.c: Regenerate.
	311
266abb8f NS	312	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	313
	314	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	315
f1a64f49 DU	316	2006-01-26 David Ung <davidu@mips.com>
	317
	318	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	319	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	320	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	321	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	322	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	323
9e919b5f AM	324	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	325
	326	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	327	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	328	disassembled.
	329	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	330	buffer overflows when disassembling instructions like
	331	ld (ix+123),0x23
	332	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	333	operand, if the offset is negative.
	334
c9021189 AM	335	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	336
	337	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	338	unsigned char to hold data to be disassembled.
	339
d99b6465 AS	340	2006-01-17 Andreas Schwab <schwab@suse.de>
	341
	342	PR binutils/1486
	343	* disassemble.c (disassemble_init_for_target): Set
	344	disassembler_needs_relocs for bfd_arch_arm.
	345
c2fe9327 PB	346	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	347
e88d958a	348	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	349	f?add?, and f?sub? instructions.
c2fe9327 PB	350
32fba81d NC	351	2006-01-16 Nick Clifton <nickc@redhat.com>
	352
	353	* po/zh_CN.po: New Chinese (simplified) translation.
	354	* configure.in (ALL_LINGUAS): Add "zh_CH".
	355	* configure: Regenerate.
	356
1b3a26b5 PB	357	2006-01-05 Paul Brook <paul@codesourcery.com>
	358
	359	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	360
db313fa6 DD	361	2006-01-06 DJ Delorie <dj@redhat.com>
	362
	363	* m32c-desc.c: Regenerate.
	364	* m32c-opc.c: Regenerate.
	365	* m32c-opc.h: Regenerate.
	366
54d46aca DD	367	2006-01-03 DJ Delorie <dj@redhat.com>
	368
	369	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	370	* m32c-ibld.c: Regenerated.
	371
e88d958a	372	For older changes see ChangeLog-2005
252b5132 RH	373	\f
252b5132 RH	374	Local Variables:
2f6d2f85 NC	375	mode: change-log
	376	left-margin: 8
	377	fill-column: 74
252b5132 RH	378	version-control: never
252b5132 RH	379	End: