[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2012-05-16  Meador Inge  <meadori@codesourcery.com>

	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	to PUSH/POP {reg}.

2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
	    Stephane Carrez <stcarrez@nerim.fr>

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.

2012-05-11  Daniel Richard G.  <skunk@iskunk.org>

	PR binutils/14028
	* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.

2012-05-11  Nick Clifton  <nickc@redhat.com>

	PR binutils/14006
	* arm-dis.c (print_insn): Fix detection of instruction mode in
	files containing multiple executable sections.

2012-05-03  Sean Keys  <skeys@ipdatasys.com>

	* Makefile.in, configure: regenerate
	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	New functions.
	* configure.in: Recognize xgate.
	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	and opcode generation for xgate.

2012-04-30  DJ Delorie  <dj@redhat.com>

	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	already the maximum bit size.
	* rx-decode.c: Regenerate.

2012-04-27  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

2012-04-12  David S. Miller  <davem@davemloft.net>

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

2012-04-01  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	sprintf call and the '*' field width.

2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>

	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

2012-03-16  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	(powerpc_opcd_indices): Bump array size.
	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	corresponding to unused opcodes to following entry.
	(lookup_powerpc): New function, extracted and optimised from..
	(print_insn_powerpc): ..here.

2012-03-15  Alan Modra  <amodra@gmail.com>
	    James Lemke  <jwlemke@codesourcery.com>

	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	* ppc-dis.c (private): New var.
	(powerpc_init_dialect): Don't return calloc failure, instead use
	private.
	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	(powerpc_opcd_indices): New array.
	(disassemble_init_powerpc): New function.
	(print_insn_big_powerpc): Don't init dialect here.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Start search using powerpc_opcd_indices.

2012-03-10  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	(PPCVEC2, PPCTMR, E6500): New short names.
	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	optional operands on sync instruction for E6500 target.

2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* mt-dis.c: Regenerate.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	is the inverse of corresponding insert function.
	(extract_d22, extract_u9, extract_r4): Likewise.
	(extract_d9): Correct sign extension.
	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	rely on implementation defined behaviour for shift right of
	signed types.
	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	(extract_d23): Likewise, and correct mask.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (print_arg): Mask constant to 32 bits.
	* crx-opc.c (cst4_map): Use int array.

2012-02-27  Alan Modra  <amodra@gmail.com>

	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	(FIELDD): Sign extend with xor,sub.

2012-02-25  Walter Lee  <walt@tilera.com>

	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.

2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (HLEPrefixNone): New.
	(HLEPrefixLock): Likewise.
	(HLEPrefixAny): Likewise.
	(HLEPrefixRelease): Likewise.

2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (HLE_Fixup1): New.
	(HLE_Fixup2): Likewise.
	(HLE_Fixup3): Likewise.
	(Ebh1): Likewise.
	(Evh1): Likewise.
	(Ebh2): Likewise.
	(Evh2): Likewise.
	(Ebh3): Likewise.
	(Evh3): Likewise.
	(MOD_C6_REG_7): Likewise.
	(MOD_C7_REG_7): Likewise.
	(RM_C6_REG_7): Likewise.
	(RM_C7_REG_7): Likewise.
	(XACQUIRE_PREFIX): Likewise.
	(XRELEASE_PREFIX): Likewise.
	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
	MOD_C6_REG_7 and MOD_C7_REG_7.
	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
	xtest.
	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.

	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	CPU_RTM_FLAGS.
	(cpu_flags): Add CpuHLE and CpuRTM.
	(opcode_modifiers): Add HLEPrefixOk.

	* i386-opc.h (CpuHLE): New.
	(CpuRTM): Likewise.
	(HLEPrefixOk): Likewise.
	(i386_cpu_flags): Add cpuhle and cpurtm.
	(i386_opcode_modifier): Add hleprefixok.

	* i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
	operand.  Add xacquire, xrelease, xabort, xbegin, xend and
	xtest.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2012-01-24  DJ Delorie  <dj@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	* rl78-decode.c: Regenerate.

2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>

	PR binutils/10173
	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.

2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>

	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	register and move them after pmove with PSR/PCSR register.

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

For older changes see ChangeLog-2011
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
101af531 NC	1	2012-05-16 Meador Inge <meadori@codesourcery.com>
	2
	3	* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
	4	to PUSH/POP {reg}.
	5
6927f982 NC	6	2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
	7	Stephane Carrez <stcarrez@nerim.fr>
	8
	9	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	10	target.
	11	* disassemble.c: Likewise.
	12	* configure: Regenerate.
	13	* m68hc11-dis.c: Make objdump output more consistent, use hex
	14	instead of decimal and use 0x prefix for hex.
	15	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	16
b9c361e0 JL	17	2012-05-14 James Lemke <jwlemke@codesourcery.com>
	18
	19	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	20	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	21	(vle_opcd_indices): New array.
	22	(lookup_vle): New function.
	23	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	24	(print_insn_powerpc): Likewise.
	25	* ppc-opc.c: Likewise.
	26
	27	2012-05-14 Catherine Moore <clm@codesourcery.com>
	28	Maciej W. Rozycki <macro@codesourcery.com>
	29	Rhonda Wittels <rhonda@codesourcery.com>
	30	Nathan Froyd <froydnj@codesourcery.com>
	31
	32	* ppc-opc.c (insert_arx, extract_arx): New functions.
	33	(insert_ary, extract_ary): New functions.
	34	(insert_li20, extract_li20): New functions.
	35	(insert_rx, extract_rx): New functions.
	36	(insert_ry, extract_ry): New functions.
	37	(insert_sci8, extract_sci8): New functions.
	38	(insert_sci8n, extract_sci8n): New functions.
	39	(insert_sd4h, extract_sd4h): New functions.
	40	(insert_sd4w, extract_sd4w): New functions.
	41	(insert_vlesi, extract_vlesi): New functions.
	42	(insert_vlensi, extract_vlensi): New functions.
	43	(insert_vleui, extract_vleui): New functions.
	44	(insert_vleil, extract_vleil): New functions.
	45	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
	46	(BI16, BI32, BO32, B8): New.
	47	(B15, B24, CRD32, CRS): New.
	48	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	49	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	50	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	51	(SH6_MASK): Use PPC_OPSHIFT_INV.
	52	(SI8, UI5, OIMM5, UI7, BO16): New.
	53	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	54	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	55	(ALLOW8_SPRG): New.
	56	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	57	(OPVUP, OPVUP_MASK OPVUP): New
	58	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	59	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	60	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	61	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
	62	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	63	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	64	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	65	(SE_IM5, SE_IM5_MASK): New.
	66	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	67	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	68	(BO32DNZ, BO32DZ): New.
	69	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	70	(PPCVLE): New.
	71	(powerpc_opcodes): Add new VLE instructions. Update existing
	72	instruction to include PPCVLE if supported.
	73	* ppc-dis.c (ppc_opts): Add vle entry.
	74	(get_powerpc_dialect): New function.
	75	(powerpc_init_dialect): VLE support.
	76	(print_insn_big_powerpc): Call get_powerpc_dialect.
	77	(print_insn_little_powerpc): Likewise.
	78	(operand_value_powerpc): Handle negative shift counts.
	79	(print_insn_powerpc): Handle 2-byte instruction lengths.
	80
208a4923 NC	81	2012-05-11 Daniel Richard G. <skunk@iskunk.org>
	82
	83	PR binutils/14028
	84	* configure.in: Invoke ACX_HEADER_STRING.
	85	* configure: Regenerate.
	86	* config.in: Regenerate.
	87	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	88	string.h and strings.h.
	89
6750a3a7 NC	90	2012-05-11 Nick Clifton <nickc@redhat.com>
	91
	92	PR binutils/14006
	93	* arm-dis.c (print_insn): Fix detection of instruction mode in
	94	files containing multiple executable sections.
	95
f6c1a2d5 NC	96	2012-05-03 Sean Keys <skeys@ipdatasys.com>
	97
	98	* Makefile.in, configure: regenerate
	99	* disassemble.c (disassembler): Recognize ARCH_XGATE.
	100	* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
	101	New functions.
	102	* configure.in: Recognize xgate.
	103	* xgate-dis.c, xgate-opc.c: New files for support of xgate
	104	* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
	105	and opcode generation for xgate.
	106
78e98aab DD	107	2012-04-30 DJ Delorie <dj@redhat.com>
	108
	109	* rx-decode.opc (MOV): Do not sign-extend immediates which are
	110	already the maximum bit size.
	111	* rx-decode.c: Regenerate.
	112
ec668d69 DM	113	2012-04-27 David S. Miller <davem@davemloft.net>
ec668d69 DM	114
2e52845b DM	115	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	116	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
	117
58004e23 DM	118	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	119	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
	120
698544e1 DM	121	* sparc-opc.c (CBCOND): New define.
	122	(CBCOND_XCC): Likewise.
	123	(cbcond): New helper macro.
	124	(sparc_opcodes): Add compare-and-branch instructions.
	125
6cda1326 DM	126	* sparc-dis.c (print_insn_sparc): Handle ')'.
	127	* sparc-opc.c (sparc_opcodes): Add crypto instructions.
	128
ec668d69 DM	129	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	130	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
	131
2615994e DM	132	2012-04-12 David S. Miller <davem@davemloft.net>
	133
	134	* sparc-dis.c (X_DISP10): Define.
	135	(print_insn_sparc): Handle '='.
	136
5de10af0 MF	137	2012-04-01 Mike Frysinger <vapier@gentoo.org>
	138
	139	* bfin-dis.c (fmtconst): Replace decimal handling with a single
	140	sprintf call and the '*' field width.
	141
55a36193 MK	142	2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
	143
	144	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
	145
d6688282 AM	146	2012-03-16 Alan Modra <amodra@gmail.com>
	147
	148	* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
	149	(powerpc_opcd_indices): Bump array size.
	150	(disassemble_init_powerpc): Set powerpc_opcd_indices entries
	151	corresponding to unused opcodes to following entry.
	152	(lookup_powerpc): New function, extracted and optimised from..
	153	(print_insn_powerpc): ..here.
	154
b240011a AM	155	2012-03-15 Alan Modra <amodra@gmail.com>
	156	James Lemke <jwlemke@codesourcery.com>
	157
	158	* disassemble.c (disassemble_init_for_target): Handle ppc init.
	159	* ppc-dis.c (private): New var.
	160	(powerpc_init_dialect): Don't return calloc failure, instead use
	161	private.
	162	(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
	163	(powerpc_opcd_indices): New array.
	164	(disassemble_init_powerpc): New function.
	165	(print_insn_big_powerpc): Don't init dialect here.
	166	(print_insn_little_powerpc): Likewise.
	167	(print_insn_powerpc): Start search using powerpc_opcd_indices.
	168
aea77599 AM	169	2012-03-10 Edmar Wienskoski <edmar@freescale.com>
	170
	171	* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
	172	* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
	173	(PPCVEC2, PPCTMR, E6500): New short names.
	174	(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
	175	mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
	176	lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
	177	lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
	178	lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
	179	optional operands on sync instruction for E6500 target.
	180
5333187a AK	181	2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
	182
	183	* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
	184
a597d2d3 AM	185	2012-02-27 Alan Modra <amodra@gmail.com>
	186
	187	* mt-dis.c: Regenerate.
	188
3f26eb3a AM	189	2012-02-27 Alan Modra <amodra@gmail.com>
	190
	191	* v850-opc.c (extract_v8): Rearrange to make it obvious this
	192	is the inverse of corresponding insert function.
	193	(extract_d22, extract_u9, extract_r4): Likewise.
	194	(extract_d9): Correct sign extension.
	195	(extract_d16_15): Don't assume "long" is 32 bits, and don't
	196	rely on implementation defined behaviour for shift right of
	197	signed types.
	198	(extract_d16_16, extract_d17_16, extract_i9): Likewise.
	199	(extract_d23): Likewise, and correct mask.
	200
1f42f8b3 AM	201	2012-02-27 Alan Modra <amodra@gmail.com>
	202
	203	* crx-dis.c (print_arg): Mask constant to 32 bits.
	204	* crx-opc.c (cst4_map): Use int array.
	205
cdb06235 AM	206	2012-02-27 Alan Modra <amodra@gmail.com>
	207
	208	* arc-dis.c (BITS): Don't use shifts to mask off bits.
	209	(FIELDD): Sign extend with xor,sub.
	210
6f7be959 WL	211	2012-02-25 Walter Lee <walt@tilera.com>
	212
	213	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	214	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	215	TILEPRO_OPC_LW_TLS_SN.
	216
82c2def5 L	217	2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
	218
	219	* i386-opc.h (HLEPrefixNone): New.
	220	(HLEPrefixLock): Likewise.
	221	(HLEPrefixAny): Likewise.
	222	(HLEPrefixRelease): Likewise.
	223
42164a71 L	224	2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
	225
	226	* i386-dis.c (HLE_Fixup1): New.
	227	(HLE_Fixup2): Likewise.
	228	(HLE_Fixup3): Likewise.
	229	(Ebh1): Likewise.
	230	(Evh1): Likewise.
	231	(Ebh2): Likewise.
	232	(Evh2): Likewise.
	233	(Ebh3): Likewise.
	234	(Evh3): Likewise.
	235	(MOD_C6_REG_7): Likewise.
	236	(MOD_C7_REG_7): Likewise.
	237	(RM_C6_REG_7): Likewise.
	238	(RM_C7_REG_7): Likewise.
	239	(XACQUIRE_PREFIX): Likewise.
	240	(XRELEASE_PREFIX): Likewise.
	241	(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
	242	cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
	243	Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
	244	(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
	245	not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
	246	MOD_C6_REG_7 and MOD_C7_REG_7.
	247	(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
	248	(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
	249	xtest.
	250	(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
	251	(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
	252
	253	* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
	254	CPU_RTM_FLAGS.
	255	(cpu_flags): Add CpuHLE and CpuRTM.
	256	(opcode_modifiers): Add HLEPrefixOk.
	257
	258	* i386-opc.h (CpuHLE): New.
	259	(CpuRTM): Likewise.
	260	(HLEPrefixOk): Likewise.
	261	(i386_cpu_flags): Add cpuhle and cpurtm.
	262	(i386_opcode_modifier): Add hleprefixok.
	263
	264	* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
	265	add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
	266	sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
	267	operand. Add xacquire, xrelease, xabort, xbegin, xend and
	268	xtest.
	269	* i386-init.h: Regenerated.
	270	* i386-tbl.h: Likewise.
	271
21abe33a DD	272	2012-01-24 DJ Delorie <dj@redhat.com>
	273
	274	* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
	275	* rl78-decode.c: Regenerate.
	276
e20cc039 AM	277	2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
	278
	279	PR binutils/10173
	280	* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
	281
e143d25c AS	282	2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
	283
	284	* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
	285	register and move them after pmove with PSR/PCSR register.
	286
8729a6f6 L	287	2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
	288
	289	* i386-dis.c (mod_table): Add vmfunc.
	290
	291	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	292	(cpu_flags): CpuVMFUNC.
	293
	294	* i386-opc.h (CpuVMFUNC): New.
	295	(i386_cpu_flags): Add cpuvmfunc.
	296
	297	* i386-opc.tbl: Add vmfunc.
	298	* i386-init.h: Regenerated.
	299	* i386-tbl.h: Likewise.
5011093d	300
23e1d329	301	For older changes see ChangeLog-2011
252b5132 RH	302	\f
252b5132 RH	303	Local Variables:
2f6d2f85 NC	304	mode: change-log
	305	left-margin: 8
	306	fill-column: 74
252b5132 RH	307	version-control: never
252b5132 RH	308	End: