gas/testsuite/
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
9fa0f14a
RM
12012-07-02 Roland McGrath <mcgrathr@google.com>
2
3 * i386-opc.tbl: Add RepPrefixOk to nop.
4 * i386-tbl.h: Regenerate.
5
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62012-06-28 Nick Clifton <nickc@redhat.com>
7
8 * po/vi.po: Updated Vietnamese translation.
9
29c048b6
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102012-06-22 Roland McGrath <mcgrathr@google.com>
11
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12 * i386-opc.tbl: Add RepPrefixOk to ret.
13 * i386-tbl.h: Regenerate.
14
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15 * i386-opc.h (RepPrefixOk): New enum constant.
16 (i386_opcode_modifier): New bitfield 'repprefixok'.
17 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
18 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
19 instructions that have IsString.
20 * i386-tbl.h: Regenerate.
21
c7a8dbf9
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222012-06-11 Andreas Schwab <schwab@linux-m68k.org>
23
24 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
25 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
26 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
27 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
28 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
29 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
30 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
31 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
32 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
33
94caa966
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342012-05-19 Alan Modra <amodra@gmail.com>
35
36 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
37 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
38
5eb3690e
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392012-05-18 Alan Modra <amodra@gmail.com>
40
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41 * ia64-opc.c: Remove #include "ansidecl.h".
42 * z8kgen.c: Include sysdep.h first.
43
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44 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
45 * bfin-dis.c: Likewise.
46 * i860-dis.c: Likewise.
47 * ia64-dis.c: Likewise.
48 * ia64-gen.c: Likewise.
49 * m68hc11-dis.c: Likewise.
50 * mmix-dis.c: Likewise.
51 * msp430-dis.c: Likewise.
52 * or32-dis.c: Likewise.
53 * rl78-dis.c: Likewise.
54 * rx-dis.c: Likewise.
55 * tic4x-dis.c: Likewise.
56 * tilegx-opc.c: Likewise.
57 * tilepro-opc.c: Likewise.
58 * rx-decode.c: Regenerate.
59
a4ebc835
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602012-05-17 James Lemke <jwlemke@codesourcery.com>
61
62 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
63
98c76446
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642012-05-17 James Lemke <jwlemke@codesourcery.com>
65
66 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
67
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682012-05-17 Daniel Richard G. <skunk@iskunk.org>
69 Nick Clifton <nickc@redhat.com>
70
71 PR 14072
72 * configure.in: Add check that sysdep.h has been included before
73 any system header files.
74 * configure: Regenerate.
75 * config.in: Regenerate.
76 * sysdep.h: Generate an error if included before config.h.
77 * alpha-opc.c: Include sysdep.h before any other header file.
78 * alpha-dis.c: Likewise.
79 * avr-dis.c: Likewise.
80 * cgen-opc.c: Likewise.
81 * cr16-dis.c: Likewise.
82 * cris-dis.c: Likewise.
83 * crx-dis.c: Likewise.
84 * d10v-dis.c: Likewise.
85 * d10v-opc.c: Likewise.
86 * d30v-dis.c: Likewise.
87 * d30v-opc.c: Likewise.
88 * h8500-dis.c: Likewise.
89 * i370-dis.c: Likewise.
90 * i370-opc.c: Likewise.
91 * m10200-dis.c: Likewise.
92 * m10300-dis.c: Likewise.
93 * micromips-opc.c: Likewise.
94 * mips-opc.c: Likewise.
95 * mips61-opc.c: Likewise.
96 * moxie-dis.c: Likewise.
97 * or32-opc.c: Likewise.
98 * pj-dis.c: Likewise.
99 * ppc-dis.c: Likewise.
100 * ppc-opc.c: Likewise.
101 * s390-dis.c: Likewise.
102 * sh-dis.c: Likewise.
103 * sh64-dis.c: Likewise.
104 * sparc-dis.c: Likewise.
105 * sparc-opc.c: Likewise.
106 * spu-dis.c: Likewise.
107 * tic30-dis.c: Likewise.
108 * tic54x-dis.c: Likewise.
109 * tic80-dis.c: Likewise.
110 * tic80-opc.c: Likewise.
111 * tilegx-dis.c: Likewise.
112 * tilepro-dis.c: Likewise.
113 * v850-dis.c: Likewise.
114 * v850-opc.c: Likewise.
115 * vax-dis.c: Likewise.
116 * w65-dis.c: Likewise.
117 * xgate-dis.c: Likewise.
118 * xtensa-dis.c: Likewise.
119 * rl78-decode.opc: Likewise.
120 * rl78-decode.c: Regenerate.
121 * rx-decode.opc: Likewise.
122 * rx-decode.c: Regenerate.
123
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1242012-05-17 Alan Modra <amodra@gmail.com>
125
126 * ppc_dis.c: Don't include elf/ppc.h.
127
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1282012-05-16 Meador Inge <meadori@codesourcery.com>
129
130 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
131 to PUSH/POP {reg}.
132
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1332012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
134 Stephane Carrez <stcarrez@nerim.fr>
135
136 * configure.in: Add S12X and XGATE co-processor support to m68hc11
137 target.
138 * disassemble.c: Likewise.
139 * configure: Regenerate.
140 * m68hc11-dis.c: Make objdump output more consistent, use hex
141 instead of decimal and use 0x prefix for hex.
142 * m68hc11-opc.c: Add S12X and XGATE opcodes.
143
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1442012-05-14 James Lemke <jwlemke@codesourcery.com>
145
146 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
147 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
148 (vle_opcd_indices): New array.
149 (lookup_vle): New function.
150 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
151 (print_insn_powerpc): Likewise.
152 * ppc-opc.c: Likewise.
153
1542012-05-14 Catherine Moore <clm@codesourcery.com>
155 Maciej W. Rozycki <macro@codesourcery.com>
156 Rhonda Wittels <rhonda@codesourcery.com>
157 Nathan Froyd <froydnj@codesourcery.com>
158
159 * ppc-opc.c (insert_arx, extract_arx): New functions.
160 (insert_ary, extract_ary): New functions.
161 (insert_li20, extract_li20): New functions.
162 (insert_rx, extract_rx): New functions.
163 (insert_ry, extract_ry): New functions.
164 (insert_sci8, extract_sci8): New functions.
165 (insert_sci8n, extract_sci8n): New functions.
166 (insert_sd4h, extract_sd4h): New functions.
167 (insert_sd4w, extract_sd4w): New functions.
168 (insert_vlesi, extract_vlesi): New functions.
169 (insert_vlensi, extract_vlensi): New functions.
170 (insert_vleui, extract_vleui): New functions.
171 (insert_vleil, extract_vleil): New functions.
172 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
173 (BI16, BI32, BO32, B8): New.
174 (B15, B24, CRD32, CRS): New.
175 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
176 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
177 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
178 (SH6_MASK): Use PPC_OPSHIFT_INV.
179 (SI8, UI5, OIMM5, UI7, BO16): New.
180 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
181 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
182 (ALLOW8_SPRG): New.
183 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
184 (OPVUP, OPVUP_MASK OPVUP): New
185 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
186 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
187 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
188 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
189 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
190 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
191 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
192 (SE_IM5, SE_IM5_MASK): New.
193 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
194 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
195 (BO32DNZ, BO32DZ): New.
196 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
197 (PPCVLE): New.
198 (powerpc_opcodes): Add new VLE instructions. Update existing
199 instruction to include PPCVLE if supported.
200 * ppc-dis.c (ppc_opts): Add vle entry.
201 (get_powerpc_dialect): New function.
202 (powerpc_init_dialect): VLE support.
203 (print_insn_big_powerpc): Call get_powerpc_dialect.
204 (print_insn_little_powerpc): Likewise.
205 (operand_value_powerpc): Handle negative shift counts.
206 (print_insn_powerpc): Handle 2-byte instruction lengths.
207
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2082012-05-11 Daniel Richard G. <skunk@iskunk.org>
209
210 PR binutils/14028
211 * configure.in: Invoke ACX_HEADER_STRING.
212 * configure: Regenerate.
213 * config.in: Regenerate.
214 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
215 string.h and strings.h.
216
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2172012-05-11 Nick Clifton <nickc@redhat.com>
218
219 PR binutils/14006
220 * arm-dis.c (print_insn): Fix detection of instruction mode in
221 files containing multiple executable sections.
222
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2232012-05-03 Sean Keys <skeys@ipdatasys.com>
224
225 * Makefile.in, configure: regenerate
226 * disassemble.c (disassembler): Recognize ARCH_XGATE.
227 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
228 New functions.
229 * configure.in: Recognize xgate.
230 * xgate-dis.c, xgate-opc.c: New files for support of xgate
231 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
232 and opcode generation for xgate.
233
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DD
2342012-04-30 DJ Delorie <dj@redhat.com>
235
236 * rx-decode.opc (MOV): Do not sign-extend immediates which are
237 already the maximum bit size.
238 * rx-decode.c: Regenerate.
239
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2402012-04-27 David S. Miller <davem@davemloft.net>
241
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242 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
243 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
244
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245 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
246 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
247
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248 * sparc-opc.c (CBCOND): New define.
249 (CBCOND_XCC): Likewise.
250 (cbcond): New helper macro.
251 (sparc_opcodes): Add compare-and-branch instructions.
252
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253 * sparc-dis.c (print_insn_sparc): Handle ')'.
254 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
255
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256 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
257 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
258
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2592012-04-12 David S. Miller <davem@davemloft.net>
260
261 * sparc-dis.c (X_DISP10): Define.
262 (print_insn_sparc): Handle '='.
263
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2642012-04-01 Mike Frysinger <vapier@gentoo.org>
265
266 * bfin-dis.c (fmtconst): Replace decimal handling with a single
267 sprintf call and the '*' field width.
268
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2692012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
270
271 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
272
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2732012-03-16 Alan Modra <amodra@gmail.com>
274
275 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
276 (powerpc_opcd_indices): Bump array size.
277 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
278 corresponding to unused opcodes to following entry.
279 (lookup_powerpc): New function, extracted and optimised from..
280 (print_insn_powerpc): ..here.
281
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2822012-03-15 Alan Modra <amodra@gmail.com>
283 James Lemke <jwlemke@codesourcery.com>
284
285 * disassemble.c (disassemble_init_for_target): Handle ppc init.
286 * ppc-dis.c (private): New var.
287 (powerpc_init_dialect): Don't return calloc failure, instead use
288 private.
289 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
290 (powerpc_opcd_indices): New array.
291 (disassemble_init_powerpc): New function.
292 (print_insn_big_powerpc): Don't init dialect here.
293 (print_insn_little_powerpc): Likewise.
294 (print_insn_powerpc): Start search using powerpc_opcd_indices.
295
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2962012-03-10 Edmar Wienskoski <edmar@freescale.com>
297
298 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
299 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
300 (PPCVEC2, PPCTMR, E6500): New short names.
301 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
302 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
303 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
304 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
305 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
306 optional operands on sync instruction for E6500 target.
307
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3082012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
309
310 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
311
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3122012-02-27 Alan Modra <amodra@gmail.com>
313
314 * mt-dis.c: Regenerate.
315
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3162012-02-27 Alan Modra <amodra@gmail.com>
317
318 * v850-opc.c (extract_v8): Rearrange to make it obvious this
319 is the inverse of corresponding insert function.
320 (extract_d22, extract_u9, extract_r4): Likewise.
321 (extract_d9): Correct sign extension.
322 (extract_d16_15): Don't assume "long" is 32 bits, and don't
323 rely on implementation defined behaviour for shift right of
324 signed types.
325 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
326 (extract_d23): Likewise, and correct mask.
327
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3282012-02-27 Alan Modra <amodra@gmail.com>
329
330 * crx-dis.c (print_arg): Mask constant to 32 bits.
331 * crx-opc.c (cst4_map): Use int array.
332
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3332012-02-27 Alan Modra <amodra@gmail.com>
334
335 * arc-dis.c (BITS): Don't use shifts to mask off bits.
336 (FIELDD): Sign extend with xor,sub.
337
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3382012-02-25 Walter Lee <walt@tilera.com>
339
340 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
341 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
342 TILEPRO_OPC_LW_TLS_SN.
343
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3442012-02-21 H.J. Lu <hongjiu.lu@intel.com>
345
346 * i386-opc.h (HLEPrefixNone): New.
347 (HLEPrefixLock): Likewise.
348 (HLEPrefixAny): Likewise.
349 (HLEPrefixRelease): Likewise.
350
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3512012-02-08 H.J. Lu <hongjiu.lu@intel.com>
352
353 * i386-dis.c (HLE_Fixup1): New.
354 (HLE_Fixup2): Likewise.
355 (HLE_Fixup3): Likewise.
356 (Ebh1): Likewise.
357 (Evh1): Likewise.
358 (Ebh2): Likewise.
359 (Evh2): Likewise.
360 (Ebh3): Likewise.
361 (Evh3): Likewise.
362 (MOD_C6_REG_7): Likewise.
363 (MOD_C7_REG_7): Likewise.
364 (RM_C6_REG_7): Likewise.
365 (RM_C7_REG_7): Likewise.
366 (XACQUIRE_PREFIX): Likewise.
367 (XRELEASE_PREFIX): Likewise.
368 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
369 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
370 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
371 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
372 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
373 MOD_C6_REG_7 and MOD_C7_REG_7.
374 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
375 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
376 xtest.
377 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
378 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
379
380 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
381 CPU_RTM_FLAGS.
382 (cpu_flags): Add CpuHLE and CpuRTM.
383 (opcode_modifiers): Add HLEPrefixOk.
384
385 * i386-opc.h (CpuHLE): New.
386 (CpuRTM): Likewise.
387 (HLEPrefixOk): Likewise.
388 (i386_cpu_flags): Add cpuhle and cpurtm.
389 (i386_opcode_modifier): Add hleprefixok.
390
391 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
392 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
393 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
394 operand. Add xacquire, xrelease, xabort, xbegin, xend and
395 xtest.
396 * i386-init.h: Regenerated.
397 * i386-tbl.h: Likewise.
398
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3992012-01-24 DJ Delorie <dj@redhat.com>
400
401 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
402 * rl78-decode.c: Regenerate.
403
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4042012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
405
406 PR binutils/10173
407 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
408
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4092012-01-17 Andreas Schwab <schwab@linux-m68k.org>
410
411 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
412 register and move them after pmove with PSR/PCSR register.
413
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4142012-01-13 H.J. Lu <hongjiu.lu@intel.com>
415
416 * i386-dis.c (mod_table): Add vmfunc.
417
418 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
419 (cpu_flags): CpuVMFUNC.
420
421 * i386-opc.h (CpuVMFUNC): New.
422 (i386_cpu_flags): Add cpuvmfunc.
423
424 * i386-opc.tbl: Add vmfunc.
425 * i386-init.h: Regenerated.
426 * i386-tbl.h: Likewise.
5011093d 427
23e1d329 428For older changes see ChangeLog-2011
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429\f
430Local Variables:
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431mode: change-log
432left-margin: 8
433fill-column: 74
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434version-control: never
435End:
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