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* configure.ac: Enable fortran for cris-*-elf and crisv32-*-elf.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
930bb4cf
AM		 12008-01-29 Alan Modra <amodra@bigpond.net.au>
2
3 * ppc-opc.c: Support optional L form mtmsr.
4
82c18208
L		 52008-01-24 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
8
599121aa
L		 92008-01-23 H.J. Lu <hongjiu.lu@intel.com>
10
11 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
12 * i386-init.h: Regenerated.
13
80098f51
TG		 142008-01-23 Tristan Gingold <gingold@adacore.com>
15
16 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
17 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
18
115c7c25
L		 192008-01-22 H.J. Lu <hongjiu.lu@intel.com>
20
21 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
22 (cpu_flags): Likewise.
23
24 * i386-opc.h (CpuMMX2): Removed.
25 (CpuSSE): Updated.
26
27 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
28 * i386-init.h: Regenerated.
29 * i386-tbl.h: Likewise.
30
6305a203
L		 312008-01-22 H.J. Lu <hongjiu.lu@intel.com>
32
33 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
34 CPU_SMX_FLAGS.
35 * i386-init.h: Regenerated.
36
fd07a1c8
L		 372008-01-15 H.J. Lu <hongjiu.lu@intel.com>
38
39 * i386-opc.tbl: Use Qword on movddup.
40 * i386-tbl.h: Regenerated.
41
321fd21e
L		 422008-01-15 H.J. Lu <hongjiu.lu@intel.com>
43
44 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
45 * i386-tbl.h: Regenerated.
46
4ee52178
L		 472008-01-15 H.J. Lu <hongjiu.lu@intel.com>
48
49 * i386-dis.c (Mx): New.
50 (PREFIX_0FC3): Likewise.
51 (PREFIX_0FC7_REG_6): Updated.
52 (dis386_twobyte): Use PREFIX_0FC3.
53 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
54 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
55 movntss.
56
5c07affc
L		 572008-01-14 H.J. Lu <hongjiu.lu@intel.com>
58
59 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
60 (operand_types): Add Mem.
61
62 * i386-opc.h (IntelSyntax): New.
63 * i386-opc.h (Mem): New.
64 (Byte): Updated.
65 (Opcode_Modifier_Max): Updated.
66 (i386_opcode_modifier): Add intelsyntax.
67 (i386_operand_type): Add mem.
68
69 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
70 instructions.
71
72 * i386-reg.tbl: Add size for accumulator.
73
74 * i386-init.h: Regenerated.
75 * i386-tbl.h: Likewise.
76
0d6a2f58
L		 772008-01-13 H.J. Lu <hongjiu.lu@intel.com>
78
79 * i386-opc.h (Byte): Fix a typo.
80
7d5e4556
L		 812008-01-12 H.J. Lu <hongjiu.lu@intel.com>
82
83 PR gas/5534
84 * i386-gen.c (operand_type_init): Add Dword to
85 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
86 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
87 Qword and Xmmword.
88 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
89 Xmmword, Unspecified and Anysize.
90 (set_bitfield): Make Mmword an alias of Qword. Make Oword
91 an alias of Xmmword.
92
93 * i386-opc.h (CheckSize): Removed.
94 (Byte): Updated.
95 (Word): Likewise.
96 (Dword): Likewise.
97 (Qword): Likewise.
98 (Xmmword): Likewise.
99 (FWait): Updated.
100 (OTMax): Likewise.
101 (i386_opcode_modifier): Remove checksize, byte, word, dword,
102 qword and xmmword.
103 (Fword): New.
104 (TBYTE): Likewise.
105 (Unspecified): Likewise.
106 (Anysize): Likewise.
107 (i386_operand_type): Add byte, word, dword, fword, qword,
108 tbyte xmmword, unspecified and anysize.
109
110 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
111 Tbyte, Xmmword, Unspecified and Anysize.
112
113 * i386-reg.tbl: Add size for accumulator.
114
115 * i386-init.h: Regenerated.
116 * i386-tbl.h: Likewise.
117
b5b1fc4f
L		 1182008-01-10 H.J. Lu <hongjiu.lu@intel.com>
119
120 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
121 (REG_0F18): Updated.
122 (reg_table): Updated.
123 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
124 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
125
50e8458f
L		 1262008-01-08 H.J. Lu <hongjiu.lu@intel.com>
127
128 * i386-gen.c (set_bitfield): Use fail () on error.
129
3d4d5afa
L		 1302008-01-08 H.J. Lu <hongjiu.lu@intel.com>
131
132 * i386-gen.c (lineno): New.
133 (filename): Likewise.
134 (set_bitfield): Report filename and line numer on error.
135 (process_i386_opcodes): Set filename and update lineno.
136 (process_i386_registers): Likewise.
137
e1d4d893
L		 1382008-01-05 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
141 ATTSyntax.
142
143 * i386-opc.h (IntelMnemonic): Renamed to ..
144 (ATTSyntax): This
145 (Opcode_Modifier_Max): Updated.
146 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
147 and intelsyntax.
148
149 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
150 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
151 * i386-tbl.h: Regenerated.
152
6f143e4d
L		 1532008-01-04 H.J. Lu <hongjiu.lu@intel.com>
154
155 * i386-gen.c: Update copyright to 2008.
156 * i386-opc.h: Likewise.
157 * i386-opc.tbl: Likewise.
158
159 * i386-init.h: Regenerated.
160 * i386-tbl.h: Likewise.
161
c6add537
L		 1622008-01-04 H.J. Lu <hongjiu.lu@intel.com>
163
164 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
165 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
166 * i386-tbl.h: Regenerated.
167
3629bb00
L		 1682008-01-03 H.J. Lu <hongjiu.lu@intel.com>
169
170 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
171 CpuSSE4_2_Or_ABM.
172 (cpu_flags): Likewise.
173
174 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
175 (CpuSSE4_2_Or_ABM): Likewise.
176 (CpuLM): Updated.
177 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
178
179 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
180 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
181 and CpuPadLock, respectively.
182 * i386-init.h: Regenerated.
183 * i386-tbl.h: Likewise.
184
24995bd6
L		 1852008-01-03 H.J. Lu <hongjiu.lu@intel.com>
186
187 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
188
189 * i386-opc.h (No_xSuf): Removed.
190 (CheckSize): Updated.
191
192 * i386-tbl.h: Regenerated.
193
e0329a22
L		 1942008-01-02 H.J. Lu <hongjiu.lu@intel.com>
195
196 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
197 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
198 CPU_SSE5_FLAGS.
199 (cpu_flags): Add CpuSSE4_2_Or_ABM.
200
201 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
202 (CpuLM): Updated.
203 (i386_cpu_flags): Add cpusse4_2_or_abm.
204
205 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
206 CpuABM|CpuSSE4_2 on popcnt.
207 * i386-init.h: Regenerated.
208 * i386-tbl.h: Likewise.
209
f2a9c676
L		 2102008-01-02 H.J. Lu <hongjiu.lu@intel.com>
211
212 * i386-opc.h: Update comments.
213
d978b5be
L		 2142008-01-02 H.J. Lu <hongjiu.lu@intel.com>
215
216 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
217 * i386-opc.h: Likewise.
218 * i386-opc.tbl: Likewise.
219
582d5edd
L		 2202008-01-02 H.J. Lu <hongjiu.lu@intel.com>
221
222 PR gas/5534
223 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
224 Byte, Word, Dword, QWord and Xmmword.
225
226 * i386-opc.h (No_xSuf): New.
227 (CheckSize): Likewise.
228 (Byte): Likewise.
229 (Word): Likewise.
230 (Dword): Likewise.
231 (QWord): Likewise.
232 (Xmmword): Likewise.
233 (FWait): Updated.
234 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
235 Dword, QWord and Xmmword.
236
237 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
238 used.
239 * i386-tbl.h: Regenerated.
240
3fe15143
MK		 2412008-01-02 Mark Kettenis <kettenis@gnu.org>
242
243 * m88k-dis.c (instructions): Fix fcvt.* instructions.
244 From Miod Vallat.
245
6c7ac64e 246For older changes see ChangeLog-2007
252b5132
RH		 247\f
248Local Variables:
2f6d2f85
NC		 249mode: change-log
250left-margin: 8
251fill-column: 74
252b5132
RH		 252version-control: never
253End:
GDB Binutils - Deliverables
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