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* doc/c-xtensa.texi (Literal Directive): Spelling correction.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
10b076a2
JW		 12005-05-05 James E Wilson <wilson@specifixinc.com>
2
3 * ia64-opc.c: Include sysdep.h before libiberty.h.
4
022716b6
NC		 52005-05-05 Nick Clifton <nickc@redhat.com>
6
7 * configure.in (ALL_LINGUAS): Add vi.
8 * configure: Regenerate.
9 * po/vi.po: New.
10
db5152b4
JG		 112005-04-26 Jerome Guitton <guitton@gnat.com>
12
13 * configure.in: Fix the check for basename declaration.
14 * configure: Regenerate.
15
eed0d89a
AM		 162005-04-19 Alan Modra <amodra@bigpond.net.au>
17
18 * ppc-opc.c (RTO): Define.
19 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
20 entries to suit PPC440.
21
791fe849
MK		 222005-04-18 Mark Kettenis <kettenis@gnu.org>
23
24 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
25 Add xcrypt-ctr.
26
ffe58f7c
NC		 272005-04-14 Nick Clifton <nickc@redhat.com>
28
29 * po/fi.po: New translation: Finnish.
30 * configure.in (ALL_LINGUAS): Add fi.
31 * configure: Regenerate.
32
9e9b66a9
AM		 332005-04-14 Alan Modra <amodra@bigpond.net.au>
34
35 * Makefile.am (NO_WERROR): Define.
36 * configure.in: Invoke AM_BINUTILS_WARNINGS.
37 * Makefile.in: Regenerate.
38 * aclocal.m4: Regenerate.
39 * configure: Regenerate.
40
9494d739
NC		 412005-04-04 Nick Clifton <nickc@redhat.com>
42
43 * fr30-asm.c: Regenerate.
44 * frv-asm.c: Regenerate.
45 * iq2000-asm.c: Regenerate.
46 * m32r-asm.c: Regenerate.
47 * openrisc-asm.c: Regenerate.
48
6128c599
JB		 492005-04-01 Jan Beulich <jbeulich@novell.com>
50
51 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
52 visible operands in Intel mode. The first operand of monitor is
53 %rax in 64-bit mode.
54
373ff435
JB		 552005-04-01 Jan Beulich <jbeulich@novell.com>
56
57 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
58 easier future additions.
59
4bd60896
JG		 602005-03-31 Jerome Guitton <guitton@gnat.com>
61
62 * configure.in: Check for basename.
63 * configure: Regenerate.
64 * config.in: Ditto.
65
4cc91dba
L		 662005-03-29 H.J. Lu <hongjiu.lu@intel.com>
67
68 * i386-dis.c (SEG_Fixup): New.
69 (Sv): New.
70 (dis386): Use "Sv" for 0x8c and 0x8e.
71
ec72cfe5
NC		 722005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
73 Nick Clifton <nickc@redhat.com>
74
75 * vax-dis.c: (entry_addr): New varible: An array of user supplied
76 function entry mask addresses.
77 (entry_addr_occupied_slots): New variable: The number of occupied
78 elements in entry_addr.
79 (entry_addr_total_slots): New variable: The total number of
80 elements in entry_addr.
81 (parse_disassembler_options): New function. Fills in the entry_addr
82 array.
83 (free_entry_array): New function. Release the memory used by the
84 entry addr array. Suppressed because there is no way to call it.
85 (is_function_entry): Check if a given address is a function's
86 start address by looking at supplied entry mask addresses and
87 symbol information, if available.
88 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
89
85064c79
L		 902005-03-23 H.J. Lu <hongjiu.lu@intel.com>
91
92 * cris-dis.c (print_with_operands): Use ~31L for long instead
93 of ~31.
94
de7141c7
L		 952005-03-20 H.J. Lu <hongjiu.lu@intel.com>
96
97 * mmix-opc.c (O): Revert the last change.
98 (Z): Likewise.
99
e493ab45
L		 1002005-03-19 H.J. Lu <hongjiu.lu@intel.com>
101
102 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
103 (Z): Likewise.
104
d8d7c459
HPN		 1052005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
106
107 * mmix-opc.c (O, Z): Force expression as unsigned long.
108
ebdb0383
NC		 1092005-03-18 Nick Clifton <nickc@redhat.com>
110
111 * ip2k-asm.c: Regenerate.
112 * op/opcodes.pot: Regenerate.
113
1ad12f97
NC		 1142005-03-16 Nick Clifton <nickc@redhat.com>
115 Ben Elliston <bje@au.ibm.com>
116
569acd2c 117 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 118 compiler command line. Enabled by default. Disable via
569acd2c 119 --disable-werror.
1ad12f97
NC		 120 * configure: Regenerate.
121
4eb30afc
AM		 1222005-03-16 Alan Modra <amodra@bigpond.net.au>
123
124 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
125 BOOKE.
126
ea8409f7
AM		 1272005-03-15 Alan Modra <amodra@bigpond.net.au>
128
729ae8d2
AM		 129 * po/es.po: Commit new Spanish translation.
130
ea8409f7
AM		 131 * po/fr.po: Commit new French translation.
132
4f495e61
NC		 1332005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
134
135 * vax-dis.c: Fix spelling error
136 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
137 of just "Entry mask: < r1 ... >"
138
0a003adc
ZW		 1392005-03-12 Zack Weinberg <zack@codesourcery.com>
140
141 * arm-dis.c (arm_opcodes): Document %E and %V.
142 Add entries for v6T2 ARM instructions:
143 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
144 (print_insn_arm): Add support for %E and %V.
885fc257 145 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 146
da99ee72
AM		 1472005-03-10 Jeff Baker <jbaker@qnx.com>
148 Alan Modra <amodra@bigpond.net.au>
149
150 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
151 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
152 (SPRG_MASK): Delete.
153 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 154 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 155 mfsprg4..7 after msprg and consolidate.
156
220abb21
AM		 1572005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
158
159 * vax-dis.c (entry_mask_bit): New array.
160 (print_insn_vax): Decode function entry mask.
161
0e06657a
AH		 1622005-03-07 Aldy Hernandez <aldyh@redhat.com>
163
164 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
165
06647dfd
AM		 1662005-03-05 Alan Modra <amodra@bigpond.net.au>
167
168 * po/opcodes.pot: Regenerate.
169
82b829a7
RR		 1702005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
171
220abb21 172 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 173 (dsmOneArcInst): Use the enum values for the decoding class.
174 Remove redundant case in the switch for decodingClass value 11.
82b829a7 175
c4a530c5
JB		 1762005-03-02 Jan Beulich <jbeulich@novell.com>
177
178 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
179 accesses.
180 (OP_C): Consider lock prefix in non-64-bit modes.
181
47d8304e
AM		 1822005-02-24 Alan Modra <amodra@bigpond.net.au>
183
184 * cris-dis.c (format_hex): Remove ineffective warning fix.
185 * crx-dis.c (make_instruction): Warning fix.
186 * frv-asm.c: Regenerate.
187
ec36c4a4
NC		 1882005-02-23 Nick Clifton <nickc@redhat.com>
189
33b71eeb
NC		 190 * cgen-dis.in: Use bfd_byte for buffers that are passed to
191 read_memory.
06647dfd 192
33b71eeb 193 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 194
ec36c4a4
NC		 195 * crx-dis.c (make_instruction): Move argument structure into inner
196 scope and ensure that all of its fields are initialised before
197 they are used.
198
33b71eeb
NC		 199 * fr30-asm.c: Regenerate.
200 * fr30-dis.c: Regenerate.
201 * frv-asm.c: Regenerate.
202 * frv-dis.c: Regenerate.
203 * ip2k-asm.c: Regenerate.
204 * ip2k-dis.c: Regenerate.
205 * iq2000-asm.c: Regenerate.
206 * iq2000-dis.c: Regenerate.
207 * m32r-asm.c: Regenerate.
208 * m32r-dis.c: Regenerate.
209 * openrisc-asm.c: Regenerate.
210 * openrisc-dis.c: Regenerate.
211 * xstormy16-asm.c: Regenerate.
212 * xstormy16-dis.c: Regenerate.
213
53c9ebc5
AM		 2142005-02-22 Alan Modra <amodra@bigpond.net.au>
215
216 * arc-ext.c: Warning fixes.
217 * arc-ext.h: Likewise.
218 * cgen-opc.c: Likewise.
219 * ia64-gen.c: Likewise.
220 * maxq-dis.c: Likewise.
221 * ns32k-dis.c: Likewise.
222 * w65-dis.c: Likewise.
223 * ia64-asmtab.c: Regenerate.
224
610ad19b
AM		 2252005-02-22 Alan Modra <amodra@bigpond.net.au>
226
227 * fr30-desc.c: Regenerate.
228 * fr30-desc.h: Regenerate.
229 * fr30-opc.c: Regenerate.
230 * fr30-opc.h: Regenerate.
231 * frv-desc.c: Regenerate.
232 * frv-desc.h: Regenerate.
233 * frv-opc.c: Regenerate.
234 * frv-opc.h: Regenerate.
235 * ip2k-desc.c: Regenerate.
236 * ip2k-desc.h: Regenerate.
237 * ip2k-opc.c: Regenerate.
238 * ip2k-opc.h: Regenerate.
239 * iq2000-desc.c: Regenerate.
240 * iq2000-desc.h: Regenerate.
241 * iq2000-opc.c: Regenerate.
242 * iq2000-opc.h: Regenerate.
243 * m32r-desc.c: Regenerate.
244 * m32r-desc.h: Regenerate.
245 * m32r-opc.c: Regenerate.
246 * m32r-opc.h: Regenerate.
247 * m32r-opinst.c: Regenerate.
248 * openrisc-desc.c: Regenerate.
249 * openrisc-desc.h: Regenerate.
250 * openrisc-opc.c: Regenerate.
251 * openrisc-opc.h: Regenerate.
252 * xstormy16-desc.c: Regenerate.
253 * xstormy16-desc.h: Regenerate.
254 * xstormy16-opc.c: Regenerate.
255 * xstormy16-opc.h: Regenerate.
256
db9db6f2
AM		 2572005-02-21 Alan Modra <amodra@bigpond.net.au>
258
259 * Makefile.am: Run "make dep-am"
260 * Makefile.in: Regenerate.
261
bf143b25
NC		 2622005-02-15 Nick Clifton <nickc@redhat.com>
263
264 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
265 compile time warnings.
266 (print_keyword): Likewise.
267 (default_print_insn): Likewise.
268
269 * fr30-desc.c: Regenerated.
270 * fr30-desc.h: Regenerated.
271 * fr30-dis.c: Regenerated.
272 * fr30-opc.c: Regenerated.
273 * fr30-opc.h: Regenerated.
274 * frv-desc.c: Regenerated.
275 * frv-dis.c: Regenerated.
276 * frv-opc.c: Regenerated.
277 * ip2k-asm.c: Regenerated.
278 * ip2k-desc.c: Regenerated.
279 * ip2k-desc.h: Regenerated.
280 * ip2k-dis.c: Regenerated.
281 * ip2k-opc.c: Regenerated.
282 * ip2k-opc.h: Regenerated.
283 * iq2000-desc.c: Regenerated.
284 * iq2000-dis.c: Regenerated.
285 * iq2000-opc.c: Regenerated.
286 * m32r-asm.c: Regenerated.
287 * m32r-desc.c: Regenerated.
288 * m32r-desc.h: Regenerated.
289 * m32r-dis.c: Regenerated.
290 * m32r-opc.c: Regenerated.
291 * m32r-opc.h: Regenerated.
292 * m32r-opinst.c: Regenerated.
293 * openrisc-desc.c: Regenerated.
294 * openrisc-desc.h: Regenerated.
295 * openrisc-dis.c: Regenerated.
296 * openrisc-opc.c: Regenerated.
297 * openrisc-opc.h: Regenerated.
298 * xstormy16-desc.c: Regenerated.
299 * xstormy16-desc.h: Regenerated.
300 * xstormy16-dis.c: Regenerated.
301 * xstormy16-opc.c: Regenerated.
302 * xstormy16-opc.h: Regenerated.
303
d6098898
L		 3042005-02-14 H.J. Lu <hongjiu.lu@intel.com>
305
306 * dis-buf.c (perror_memory): Use sprintf_vma to print out
307 address.
308
5a84f3e0
NC		 3092005-02-11 Nick Clifton <nickc@redhat.com>
310
bc18c937
NC		 311 * iq2000-asm.c: Regenerate.
312
5a84f3e0
NC		 313 * frv-dis.c: Regenerate.
314
0a40490e
JB		 3152005-02-07 Jim Blandy <jimb@redhat.com>
316
317 * Makefile.am (CGEN): Load guile.scm before calling the main
318 application script.
319 * Makefile.in: Regenerated.
320 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
321 Simply pass the cgen-opc.scm path to ${cgen} as its first
322 argument; ${cgen} itself now contains the '-s', or whatever is
323 appropriate for the Scheme being used.
324
c46f8c51
AC		 3252005-01-31 Andrew Cagney <cagney@gnu.org>
326
327 * configure: Regenerate to track ../gettext.m4.
328
60b9a617
JB		 3292005-01-31 Jan Beulich <jbeulich@novell.com>
330
331 * ia64-gen.c (NELEMS): Define.
332 (shrink): Generate alias with missing second predicate register when
333 opcode has two outputs and these are both predicates.
334 * ia64-opc-i.c (FULL17): Define.
335 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
336 here to generate output template.
337 (TBITCM, TNATCM): Undefine after use.
338 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
339 first input. Add ld16 aliases without ar.csd as second output. Add
340 st16 aliases without ar.csd as second input. Add cmpxchg aliases
341 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
342 ar.ccv as third/fourth inputs. Consolidate through...
343 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
344 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
345 * ia64-asmtab.c: Regenerate.
346
a53bf506
AC		 3472005-01-27 Andrew Cagney <cagney@gnu.org>
348
349 * configure: Regenerate to track ../gettext.m4 change.
350
90219bd0
AO		 3512005-01-25 Alexandre Oliva <aoliva@redhat.com>
352
353 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
354 * frv-asm.c: Rebuilt.
355 * frv-desc.c: Rebuilt.
356 * frv-desc.h: Rebuilt.
357 * frv-dis.c: Rebuilt.
358 * frv-ibld.c: Rebuilt.
359 * frv-opc.c: Rebuilt.
360 * frv-opc.h: Rebuilt.
361
45181ed1
AC		 3622005-01-24 Andrew Cagney <cagney@gnu.org>
363
364 * configure: Regenerate, ../gettext.m4 was updated.
365
9e836e3d
FF		 3662005-01-21 Fred Fish <fnf@specifixinc.com>
367
368 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
369 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
370 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
371 * mips-dis.c: Ditto.
372
5e8cb021
AM		 3732005-01-20 Alan Modra <amodra@bigpond.net.au>
374
375 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
376
986e18a5
FF		 3772005-01-19 Fred Fish <fnf@specifixinc.com>
378
379 * mips-dis.c (no_aliases): New disassembly option flag.
380 (set_default_mips_dis_options): Init no_aliases to zero.
381 (parse_mips_dis_option): Handle no-aliases option.
382 (print_insn_mips): Ignore table entries that are aliases
383 if no_aliases is set.
384 (print_insn_mips16): Ditto.
385 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
386 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
387 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
388 * mips16-opc.c (mips16_opcodes): Ditto.
389
e38bc3b5
NC		 3902005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
391
392 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
393 (inheritance diagram): Add missing edge.
394 (arch_sh1_up): Rename arch_sh_up to match external name to make life
395 easier for the testsuite.
396 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
397 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 398 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 399 arch_sh2a_or_sh4_up child.
400 (sh_table): Do renaming as above.
401 Correct comment for ldc.l for gas testsuite to read.
402 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
403 Correct comments for movy.w and movy.l for gas testsuite to read.
404 Correct comments for fmov.d and fmov.s for gas testsuite to read.
405
9df48ba9
L		 4062005-01-12 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
409
2033b4b9
L		 4102005-01-12 H.J. Lu <hongjiu.lu@intel.com>
411
412 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
413
0bcb06d2
AS		 4142005-01-10 Andreas Schwab <schwab@suse.de>
415
416 * disassemble.c (disassemble_init_for_target) <case
417 bfd_arch_ia64>: Set skip_zeroes to 16.
418 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
419
47add74d
TL		 4202004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
421
422 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
423
246f4c05
SS		 4242004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
425
426 * avr-dis.c: Prettyprint. Added printing of symbol names in all
427 memory references. Convert avr_operand() to C90 formatting.
428
0e1200e5
TL		 4292004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
430
431 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
432
89a649f7
TL		 4332004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
434
435 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
436 (no_op_insn): Initialize array with instructions that have no
437 operands.
438 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
439
6255809c
RE		 4402004-11-29 Richard Earnshaw <rearnsha@arm.com>
441
442 * arm-dis.c: Correct top-level comment.
443
2fbad815
RE		 4442004-11-27 Richard Earnshaw <rearnsha@arm.com>
445
446 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
447 architecuture defining the insn.
448 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 449 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
450 field.
2fbad815
RE		 451 Also include opcode/arm.h.
452 * Makefile.am (arm-dis.lo): Update dependency list.
453 * Makefile.in: Regenerate.
454
d81acc42
NC		 4552004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
456
457 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
458 reflect the change to the short immediate syntax.
459
ca4f2377
AM		 4602004-11-19 Alan Modra <amodra@bigpond.net.au>
461
5da8bf1b
AM		 462 * or32-opc.c (debug): Warning fix.
463 * po/POTFILES.in: Regenerate.
464
ca4f2377
AM		 465 * maxq-dis.c: Formatting.
466 (print_insn): Warning fix.
467
b7693d02
DJ		 4682004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
469
470 * arm-dis.c (WORD_ADDRESS): Define.
471 (print_insn): Use it. Correct big-endian end-of-section handling.
472
300dac7e
NC		 4732004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
474 Vineet Sharma <vineets@noida.hcltech.com>
475
476 * maxq-dis.c: New file.
477 * disassemble.c (ARCH_maxq): Define.
610ad19b 478 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 479 instructions..
480 * configure.in: Add case for bfd_maxq_arch.
481 * configure: Regenerate.
482 * Makefile.am: Add support for maxq-dis.c
483 * Makefile.in: Regenerate.
484 * aclocal.m4: Regenerate.
485
42048ee7
TL		 4862004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
487
488 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
489 mode.
490 * crx-dis.c: Likewise.
491
bd21e58e
HPN		 4922004-11-04 Hans-Peter Nilsson <hp@axis.com>
493
494 Generally, handle CRISv32.
495 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
496 (struct cris_disasm_data): New type.
497 (format_reg, format_hex, cris_constraint, print_flags)
498 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
499 callers changed.
500 (format_sup_reg, print_insn_crisv32_with_register_prefix)
501 (print_insn_crisv32_without_register_prefix)
502 (print_insn_crisv10_v32_with_register_prefix)
503 (print_insn_crisv10_v32_without_register_prefix)
504 (cris_parse_disassembler_options): New functions.
505 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
506 parameter. All callers changed.
507 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
508 failure.
509 (cris_constraint) <case 'Y', 'U'>: New cases.
510 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
511 for constraint 'n'.
512 (print_with_operands) <case 'Y'>: New case.
513 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
514 <case 'N', 'Y', 'Q'>: New cases.
515 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
516 (print_insn_cris_with_register_prefix)
517 (print_insn_cris_without_register_prefix): Call
518 cris_parse_disassembler_options.
519 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
520 for CRISv32 and the size of immediate operands. New v32-only
521 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
522 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
523 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
524 Change brp to be v3..v10.
525 (cris_support_regs): New vector.
526 (cris_opcodes): Update head comment. New format characters '[',
527 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
528 Add new opcodes for v32 and adjust existing opcodes to accommodate
529 differences to earlier variants.
530 (cris_cond15s): New vector.
531
9306ca4a
JB		 5322004-11-04 Jan Beulich <jbeulich@novell.com>
533
534 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
535 (indirEb): Remove.
536 (Mp): Use f_mode rather than none at all.
537 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
538 replaces what previously was x_mode; x_mode now means 128-bit SSE
539 operands.
540 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
541 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
542 pinsrw's second operand is Edqw.
543 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
544 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
545 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
546 mode when an operand size override is present or always suffixing.
547 More instructions will need to be added to this group.
548 (putop): Handle new macro chars 'C' (short/long suffix selector),
549 'I' (Intel mode override for following macro char), and 'J' (for
550 adding the 'l' prefix to far branches in AT&T mode). When an
551 alternative was specified in the template, honor macro character when
552 specified for Intel mode.
553 (OP_E): Handle new *_mode values. Correct pointer specifications for
554 memory operands. Consolidate output of index register.
555 (OP_G): Handle new *_mode values.
556 (OP_I): Handle const_1_mode.
557 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
558 respective opcode prefix bits have been consumed.
559 (OP_EM, OP_EX): Provide some default handling for generating pointer
560 specifications.
561
f39c96a9
TL		 5622004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
563
564 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
565 COP_INST macro.
566
812337be
TL		 5672004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
568
569 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
570 (getregliststring): Support HI/LO and user registers.
610ad19b 571 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 572 rearrangement done in CRX opcode header file.
573 (crx_regtab): Likewise.
574 (crx_optab): Likewise.
610ad19b 575 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 576 formats.
577 support new Co-Processor instruction 'cpi'.
578
4030fa5a
NC		 5792004-10-27 Nick Clifton <nickc@redhat.com>
580
581 * opcodes/iq2000-asm.c: Regenerate.
582 * opcodes/iq2000-desc.c: Regenerate.
583 * opcodes/iq2000-desc.h: Regenerate.
584 * opcodes/iq2000-dis.c: Regenerate.
585 * opcodes/iq2000-ibld.c: Regenerate.
586 * opcodes/iq2000-opc.c: Regenerate.
587 * opcodes/iq2000-opc.h: Regenerate.
588
fc3d45e8
TL		 5892004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
590
591 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
592 us4, us5 (respectively).
593 Remove unsupported 'popa' instruction.
594 Reverse operands order in store co-processor instructions.
595
3c55da70
AM		 5962004-10-15 Alan Modra <amodra@bigpond.net.au>
597
598 * Makefile.am: Run "make dep-am"
599 * Makefile.in: Regenerate.
600
7fa3d080
BW		 6012004-10-12 Bob Wilson <bob.wilson@acm.org>
602
603 * xtensa-dis.c: Use ISO C90 formatting.
604
e612bb4d
AM		 6052004-10-09 Alan Modra <amodra@bigpond.net.au>
606
607 * ppc-opc.c: Revert 2004-09-09 change.
608
43cd72b9
BW		 6092004-10-07 Bob Wilson <bob.wilson@acm.org>
610
611 * xtensa-dis.c (state_names): Delete.
612 (fetch_data): Use xtensa_isa_maxlength.
613 (print_xtensa_operand): Replace operand parameter with opcode/operand
614 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
615 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
616 instruction bundles. Use xmalloc instead of malloc.
617
bbac1f2a
NC		 6182004-10-07 David Gibson <david@gibson.dropbear.id.au>
619
620 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
621 initializers.
622
48c9f030
NC		 6232004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
624
625 * crx-opc.c (crx_instruction): Support Co-processor insns.
626 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
627 (getregliststring): Change function to use the above enum.
628 (print_arg): Handle CO-Processor insns.
629 (crx_cinvs): Add 'b' option to invalidate the branch-target
630 cache.
631
12c64a4e
AH		 6322004-10-06 Aldy Hernandez <aldyh@redhat.com>
633
634 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
635 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
636 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
637 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
638 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
639
14127cc4
NC		 6402004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
641
642 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
643 rather than add it.
644
0dd132b6
NC		 6452004-09-30 Paul Brook <paul@codesourcery.com>
646
647 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
648 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
649
3f85e526
L		 6502004-09-17 H.J. Lu <hongjiu.lu@intel.com>
651
652 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
653 (CONFIG_STATUS_DEPENDENCIES): New.
654 (Makefile): Removed.
655 (config.status): Likewise.
656 * Makefile.in: Regenerated.
657
8ae85421
AM		 6582004-09-17 Alan Modra <amodra@bigpond.net.au>
659
660 * Makefile.am: Run "make dep-am".
661 * Makefile.in: Regenerate.
662 * aclocal.m4: Regenerate.
663 * configure: Regenerate.
664 * po/POTFILES.in: Regenerate.
665 * po/opcodes.pot: Regenerate.
666
24443139
AS		 6672004-09-11 Andreas Schwab <schwab@suse.de>
668
669 * configure: Rebuild.
670
2a309db0
AM		 6712004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
672
673 * ppc-opc.c (L): Make this field not optional.
674
42851540
NC		 6752004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
676
677 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
678 Fix parameter to 'm[t|f]csr' insns.
679
979273e3
NN		 6802004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
681
682 * configure.in: Autoupdate to autoconf 2.59.
683 * aclocal.m4: Rebuild with aclocal 1.4p6.
684 * configure: Rebuild with autoconf 2.59.
685 * Makefile.in: Rebuild with automake 1.4p6 (picking up
686 bfd changes for autoconf 2.59 on the way).
687 * config.in: Rebuild with autoheader 2.59.
688
ac28a1cb
RS		 6892004-08-27 Richard Sandiford <rsandifo@redhat.com>
690
691 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
692
30d1c836
ML		 6932004-07-30 Michal Ludvig <mludvig@suse.cz>
694
695 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
696 (GRPPADLCK2): New define.
697 (twobyte_has_modrm): True for 0xA6.
698 (grps): GRPPADLCK2 for opcode 0xA6.
699
0b0ac059
AO		 7002004-07-29 Alexandre Oliva <aoliva@redhat.com>
701
702 Introduce SH2a support.
703 * sh-opc.h (arch_sh2a_base): Renumber.
704 (arch_sh2a_nofpu_base): Remove.
705 (arch_sh_base_mask): Adjust.
706 (arch_opann_mask): New.
707 (arch_sh2a, arch_sh2a_nofpu): Adjust.
708 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
709 (sh_table): Adjust whitespace.
710 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
711 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
712 instruction list throughout.
713 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
714 of arch_sh2a in instruction list throughout.
715 (arch_sh2e_up): Accomodate above changes.
716 (arch_sh2_up): Ditto.
717 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
718 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
719 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
720 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
721 * sh-opc.h (arch_sh2a_nofpu): New.
722 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
723 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
724 instruction.
725 2004-01-20 DJ Delorie <dj@redhat.com>
726 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
727 2003-12-29 DJ Delorie <dj@redhat.com>
728 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
729 sh_opcode_info, sh_table): Add sh2a support.
730 (arch_op32): New, to tag 32-bit opcodes.
731 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
732 2003-12-02 Michael Snyder <msnyder@redhat.com>
733 * sh-opc.h (arch_sh2a): Add.
734 * sh-dis.c (arch_sh2a): Handle.
735 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
736
670ec21d
NC		 7372004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
738
739 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
740
ed049af3
NC		 7412004-07-22 Nick Clifton <nickc@redhat.com>
742
743 PR/280
744 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
745 insns - this is done by objdump itself.
746 * h8500-dis.c (print_insn_h8500): Likewise.
747
20f0a1fc
NC		 7482004-07-21 Jan Beulich <jbeulich@novell.com>
749
750 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
751 regardless of address size prefix in effect.
752 (ptr_reg): Size or address registers does not depend on rex64, but
753 on the presence of an address size override.
754 (OP_MMX): Use rex.x only for xmm registers.
755 (OP_EM): Use rex.z only for xmm registers.
756
6f14957b
MR		 7572004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
758
759 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
760 move/branch operations to the bottom so that VR5400 multimedia
761 instructions take precedence in disassembly.
762
1586d91e
MR		 7632004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
764
765 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
766 ISA-specific "break" encoding.
767
982de27a
NC		 7682004-07-13 Elvis Chiang <elvisfb@gmail.com>
769
770 * arm-opc.h: Fix typo in comment.
771
4300ab10
AS		 7722004-07-11 Andreas Schwab <schwab@suse.de>
773
774 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
775
8577e690
AS		 7762004-07-09 Andreas Schwab <schwab@suse.de>
777
778 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
779
1fe1f39c
NC		 7802004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
781
782 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
783 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
784 (crx-dis.lo): New target.
785 (crx-opc.lo): Likewise.
786 * Makefile.in: Regenerate.
787 * configure.in: Handle bfd_crx_arch.
788 * configure: Regenerate.
789 * crx-dis.c: New file.
790 * crx-opc.c: New file.
791 * disassemble.c (ARCH_crx): Define.
792 (disassembler): Handle ARCH_crx.
793
7a33b495
JW		 7942004-06-29 James E Wilson <wilson@specifixinc.com>
795
796 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
797 * ia64-asmtab.c: Regnerate.
798
98e69875
AM		 7992004-06-28 Alan Modra <amodra@bigpond.net.au>
800
801 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
802 (extract_fxm): Don't test dialect.
803 (XFXFXM_MASK): Include the power4 bit.
804 (XFXM): Add p4 param.
805 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
806
a53b85e2
AO		 8072004-06-27 Alexandre Oliva <aoliva@redhat.com>
808
809 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
810 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
811
d0618d1c
AM		 8122004-06-26 Alan Modra <amodra@bigpond.net.au>
813
814 * ppc-opc.c (BH, XLBH_MASK): Define.
815 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
816
1d9f512f
AM		 8172004-06-24 Alan Modra <amodra@bigpond.net.au>
818
819 * i386-dis.c (x_mode): Comment.
820 (two_source_ops): File scope.
821 (float_mem): Correct fisttpll and fistpll.
822 (float_mem_mode): New table.
823 (dofloat): Use it.
824 (OP_E): Correct intel mode PTR output.
825 (ptr_reg): Use open_char and close_char.
826 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
827 operands. Set two_source_ops.
828
52886d70
AM		 8292004-06-15 Alan Modra <amodra@bigpond.net.au>
830
831 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
832 instead of _raw_size.
833
bad9ceea
JJ		 8342004-06-08 Jakub Jelinek <jakub@redhat.com>
835
836 * ia64-gen.c (in_iclass): Handle more postinc st
837 and ld variants.
838 * ia64-asmtab.c: Rebuilt.
839
0451f5df
MS		 8402004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
841
842 * s390-opc.txt: Correct architecture mask for some opcodes.
843 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
844 in the esa mode as well.
845
f6f9408f
JR		 8462004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
847
848 * sh-dis.c (target_arch): Make unsigned.
849 (print_insn_sh): Replace (most of) switch with a call to
850 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
851 * sh-opc.h: Redefine architecture flags values.
852 Add sh3-nommu architecture.
853 Reorganise <arch>_up macros so they make more visual sense.
854 (SH_MERGE_ARCH_SET): Define new macro.
855 (SH_VALID_BASE_ARCH_SET): Likewise.
856 (SH_VALID_MMU_ARCH_SET): Likewise.
857 (SH_VALID_CO_ARCH_SET): Likewise.
858 (SH_VALID_ARCH_SET): Likewise.
859 (SH_MERGE_ARCH_SET_VALID): Likewise.
860 (SH_ARCH_SET_HAS_FPU): Likewise.
861 (SH_ARCH_SET_HAS_DSP): Likewise.
862 (SH_ARCH_UNKNOWN_ARCH): Likewise.
863 (sh_get_arch_from_bfd_mach): Add prototype.
864 (sh_get_arch_up_from_bfd_mach): Likewise.
865 (sh_get_bfd_mach_from_arch_set): Likewise.
866 (sh_merge_bfd_arc): Likewise.
867
be8c092b
NC		 8682004-05-24 Peter Barada <peter@the-baradas.com>
869
870 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 871 into new match_insn_m68k function. Loop over canidate
872 matches and select first that completely matches.
be8c092b
NC		 873 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
874 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 875 to verify addressing for MAC/EMAC.
be8c092b
NC		 876 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
877 reigster halves since 'fpu' and 'spl' look misleading.
878 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
879 * m68k-opc.c: Rearragne mac/emac cases to use longest for
880 first, tighten up match masks.
881 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
882 'size' from special case code in print_insn_m68k to
883 determine decode size of insns.
884
a30e9cc4
AM		 8852004-05-19 Alan Modra <amodra@bigpond.net.au>
886
887 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
888 well as when -mpower4.
889
9598fbe5
NC		 8902004-05-13 Nick Clifton <nickc@redhat.com>
891
892 * po/fr.po: Updated French translation.
893
6b6e92f4
NC		 8942004-05-05 Peter Barada <peter@the-baradas.com>
895
896 * m68k-dis.c(print_insn_m68k): Add new chips, use core
897 variants in arch_mask. Only set m68881/68851 for 68k chips.
898 * m68k-op.c: Switch from ColdFire chips to core variants.
899
a404d431
AM		 9002004-05-05 Alan Modra <amodra@bigpond.net.au>
901
a30e9cc4 902 PR 147.
a404d431
AM		 903 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
904
f3806e43
BE		 9052004-04-29 Ben Elliston <bje@au.ibm.com>
906
520ceea4
BE		 907 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
908 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 909
1f1799d5
KK		 9102004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
911
912 * sh-dis.c (print_insn_sh): Print the value in constant pool
913 as a symbol if it looks like a symbol.
914
fd99574b
NC		 9152004-04-22 Peter Barada <peter@the-baradas.com>
916
917 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
918 appropriate ColdFire architectures.
919 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
920 mask addressing.
921 Add EMAC instructions, fix MAC instructions. Remove
922 macmw/macml/msacmw/msacml instructions since mask addressing now
923 supported.
924
b4781d44
JJ		 9252004-04-20 Jakub Jelinek <jakub@redhat.com>
926
927 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
928 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
929 suffix. Use fmov*x macros, create all 3 fpsize variants in one
930 macro. Adjust all users.
931
91809fda 9322004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 933
91809fda
NC		 934 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
935 separately.
936
f4453dfa
NC		 9372004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
938
939 * m32r-asm.c: Regenerate.
940
9b0de91a
SS		 9412004-03-29 Stan Shebs <shebs@apple.com>
942
943 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
944 used.
945
e20c0b3d
AM		 9462004-03-19 Alan Modra <amodra@bigpond.net.au>
947
948 * aclocal.m4: Regenerate.
949 * config.in: Regenerate.
950 * configure: Regenerate.
951 * po/POTFILES.in: Regenerate.
952 * po/opcodes.pot: Regenerate.
953
fdd12ef3
AM		 9542004-03-16 Alan Modra <amodra@bigpond.net.au>
955
956 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
957 PPC_OPERANDS_GPR_0.
958 * ppc-opc.c (RA0): Define.
959 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
960 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 961 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 962
2dc111b3 9632004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 964
965 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 966
7bfeee7b
AM		 9672004-03-15 Alan Modra <amodra@bigpond.net.au>
968
969 * sparc-dis.c (print_insn_sparc): Update getword prototype.
970
7ffdda93
ML		 9712004-03-12 Michal Ludvig <mludvig@suse.cz>
972
973 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 974 (grps): Delete GRPPLOCK entry.
7ffdda93 975
cc0ec051
AM		 9762004-03-12 Alan Modra <amodra@bigpond.net.au>
977
978 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
979 (M, Mp): Use OP_M.
980 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
981 (GRPPADLCK): Define.
982 (dis386): Use NOP_Fixup on "nop".
983 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
984 (twobyte_has_modrm): Set for 0xa7.
985 (padlock_table): Delete. Move to..
986 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
987 and clflush.
988 (print_insn): Revert PADLOCK_SPECIAL code.
989 (OP_E): Delete sfence, lfence, mfence checks.
990
4fd61dcb
JJ		 9912004-03-12 Jakub Jelinek <jakub@redhat.com>
992
993 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
994 (INVLPG_Fixup): New function.
995 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
996
0f10071e
ML		 9972004-03-12 Michal Ludvig <mludvig@suse.cz>
998
999 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1000 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1001 (padlock_table): New struct with PadLock instructions.
1002 (print_insn): Handle PADLOCK_SPECIAL.
1003
c02908d2
AM		 10042004-03-12 Alan Modra <amodra@bigpond.net.au>
1005
1006 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1007 (OP_E): Twiddle clflush to sfence here.
1008
d5bb7600
NC		 10092004-03-08 Nick Clifton <nickc@redhat.com>
1010
1011 * po/de.po: Updated German translation.
1012
ae51a426
JR		 10132003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1014
1015 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1016 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1017 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1018 accordingly.
1019
676a64f4
RS		 10202004-03-01 Richard Sandiford <rsandifo@redhat.com>
1021
1022 * frv-asm.c: Regenerate.
1023 * frv-desc.c: Regenerate.
1024 * frv-desc.h: Regenerate.
1025 * frv-dis.c: Regenerate.
1026 * frv-ibld.c: Regenerate.
1027 * frv-opc.c: Regenerate.
1028 * frv-opc.h: Regenerate.
1029
c7a48b9a
RS		 10302004-03-01 Richard Sandiford <rsandifo@redhat.com>
1031
1032 * frv-desc.c, frv-opc.c: Regenerate.
1033
8ae0baa2
RS		 10342004-03-01 Richard Sandiford <rsandifo@redhat.com>
1035
1036 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1037
ce11586c
JR		 10382004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1039
1040 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1041 Also correct mistake in the comment.
1042
6a5709a5
JR		 10432004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1044
1045 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1046 ensure that double registers have even numbers.
1047 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1048 that reserved instruction 0xfffd does not decode the same
1049 as 0xfdfd (ftrv).
1050 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1051 REG_N refers to a double register.
1052 Add REG_N_B01 nibble type and use it instead of REG_NM
1053 in ftrv.
1054 Adjust the bit patterns in a few comments.
1055
e5d2b64f 10562004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1057
1058 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1059
1f04b05f
AH		 10602004-02-20 Aldy Hernandez <aldyh@redhat.com>
1061
1062 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1063
2f3b8700
AH		 10642004-02-20 Aldy Hernandez <aldyh@redhat.com>
1065
1066 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1067
f0b26da6 10682004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1069
1070 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1071 mtivor32, mtivor33, mtivor34.
f0b26da6 1072
23d59c56 10732004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1074
1075 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1076
34920d91
NC		 10772004-02-10 Petko Manolov <petkan@nucleusys.com>
1078
1079 * arm-opc.h Maverick accumulator register opcode fixes.
1080
44d86481
BE		 10812004-02-13 Ben Elliston <bje@wasabisystems.com>
1082
1083 * m32r-dis.c: Regenerate.
1084
17707c23
MS		 10852004-01-27 Michael Snyder <msnyder@redhat.com>
1086
1087 * sh-opc.h (sh_table): "fsrra", not "fssra".
1088
fe3a9bc4
NC		 10892004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1090
1091 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1092 contraints.
1093
ff24f124
JJ		 10942004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1095
1096 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1097
a02a862a
AM		 10982004-01-19 Alan Modra <amodra@bigpond.net.au>
1099
1100 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1101 1. Don't print scale factor on AT&T mode when index missing.
1102
d164ea7f
AO		 11032004-01-16 Alexandre Oliva <aoliva@redhat.com>
1104
1105 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1106 when loaded into XR registers.
1107
cb10e79a
RS		 11082004-01-14 Richard Sandiford <rsandifo@redhat.com>
1109
1110 * frv-desc.h: Regenerate.
1111 * frv-desc.c: Regenerate.
1112 * frv-opc.c: Regenerate.
1113
f532f3fa
MS		 11142004-01-13 Michael Snyder <msnyder@redhat.com>
1115
1116 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1117
e45d0630
PB		 11182004-01-09 Paul Brook <paul@codesourcery.com>
1119
1120 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1121 specific opcodes.
1122
3ba7a1aa
DJ		 11232004-01-07 Daniel Jacobowitz <drow@mvista.com>
1124
1125 * Makefile.am (libopcodes_la_DEPENDENCIES)
1126 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1127 comment about the problem.
1128 * Makefile.in: Regenerate.
1129
ba2d3f07
AO		 11302004-01-06 Alexandre Oliva <aoliva@redhat.com>
1131
1132 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1133 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1134 cut&paste errors in shifting/truncating numerical operands.
1135 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1136 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1137 (parse_uslo16): Likewise.
1138 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1139 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1140 (parse_s12): Likewise.
1141 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1142 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1143 (parse_uslo16): Likewise.
1144 (parse_uhi16): Parse gothi and gotfuncdeschi.
1145 (parse_d12): Parse got12 and gotfuncdesc12.
1146 (parse_s12): Likewise.
1147
3ab48931
NC		 11482004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1149
1150 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1151 instruction which looks similar to an 'rla' instruction.
a0bd404e 1152
c9e214e5 1153For older changes see ChangeLog-0203
252b5132
RH		 1154\f
1155Local Variables:
2f6d2f85
NC		 1156mode: change-log
1157left-margin: 8
1158fill-column: 74
252b5132
RH		 1159version-control: never
1160End:
GDB Binutils - Deliverables
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