projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 0067d8fc MR |
1 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 2 | ||
| 3 | * mips-opc.c (mips_builtin_opcodes): Correct register use | |
| 4 | annotation of "alnv.ps". | |
| 5 | ||
| 3eebd5eb MR |
6 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 7 | ||
| 8 | * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. | |
| 9 | ||
| 500cccad MF |
10 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 11 | ||
| 12 | * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. | |
| 13 | ||
| f5caf9f4 MF |
14 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 15 | ||
| 16 | * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. | |
| 17 | ||
| e5bc4265 MF |
18 | 2011-02-19 Mike Frysinger <vapier@gentoo.org> |
| 19 | ||
| 20 | * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and | |
| 21 | a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, | |
| 22 | av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, | |
| 23 | exception, end_of_registers, msize, memory, bfd_mach. | |
| 24 | (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, | |
| 25 | LB0REG, LC1REG, LT1REG, LB1REG): Delete | |
| 26 | (AXREG, AWREG, LCREG, LTREG, LBREG): Define. | |
| 27 | (get_allreg): Change to new defines. Fallback to abort(). | |
| 28 | ||
| 602427c4 MF |
29 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 30 | ||
| 31 | * bfin-dis.c: Add whitespace/parenthesis where needed. | |
| 32 | ||
| 298c1ec2 MF |
33 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 34 | ||
| 35 | * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater | |
| 36 | than 7. | |
| 37 | ||
| 822ce8ee RW |
38 | 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 39 | ||
| 40 | * configure: Regenerate. | |
| 41 | ||
| 13c02f06 MF |
42 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 43 | ||
| 44 | * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. | |
| 45 | ||
| 4db66394 MF |
46 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 47 | ||
| 48 | * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output | |
| 49 | dregs only when P is set, and dregs_lo otherwise. | |
| 50 | ||
| 36f44611 MF |
51 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 52 | ||
| 53 | * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. | |
| 54 | ||
| 9805c0a5 MF |
55 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 56 | ||
| 57 | * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. | |
| 58 | ||
| 43a6aa65 MF |
59 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 60 | ||
| 61 | * bfin-dis.c (machine_registers): Delete REG_GP. | |
| 62 | (reg_names): Delete "GP". | |
| 63 | (decode_allregs): Change REG_GP to REG_LASTREG. | |
| 64 | ||
| 26bb3ddd MF |
65 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 66 | ||
| 89c0d58c MR |
67 | * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, |
| 68 | M_IH, M_IU): Delete. | |
| 26bb3ddd | 69 | |
| 69b8ea4a MF |
70 | 2011-02-11 Mike Frysinger <vapier@gentoo.org> |
| 71 | ||
| 72 | * bfin-dis.c (reg_names): Add const. | |
| 73 | (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, | |
| 74 | decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, | |
| 75 | decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, | |
| 76 | decode_counters, decode_allregs): Likewise. | |
| 77 | ||
| 42d5f9c6 MS |
78 | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
| 79 | ||
| 80 | * i386-dis.c (OP_J): Parenthesize expression to prevent | |
| 81 | truncated addresses. | |
| 82 | (print_insn): Fix indentation off-by-one. | |
| 83 | ||
| 4be0c941 NC |
84 | 2011-02-01 Nick Clifton <nickc@redhat.com> |
| 85 | ||
| 86 | * po/da.po: Updated Danish translation. | |
| 87 | ||
| 6b069ee7 AM |
88 | 2011-01-21 Dave Murphy <davem@devkitpro.org> |
| 89 | ||
| 90 | * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. | |
| 91 | ||
| e3949f17 L |
92 | 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> |
| 93 | ||
| 94 | * i386-dis.c (sIbT): New. | |
| 95 | (b_T_mode): Likewise. | |
| 96 | (dis386): Replace sIb with sIbT on "pushT". | |
| 97 | (x86_64_table): Replace sIb with Ib on "aam" and "aad". | |
| 98 | (OP_sI): Handle b_T_mode. Properly sign-extend byte. | |
| 99 | ||
| 752573b2 JK |
100 | 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> |
| 101 | ||
| 102 | * i386-init.h: Regenerated. | |
| 103 | * i386-tbl.h: Regenerated | |
| 104 | ||
| 2a2a0f38 QN |
105 | 2011-01-17 Quentin Neill <quentin.neill@amd.com> |
| 106 | ||
| 107 | * i386-dis.c (REG_XOP_TBM_01): New. | |
| 108 | (REG_XOP_TBM_02): New. | |
| 109 | (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. | |
| 110 | (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 | |
| 111 | entries, and add bextr instruction. | |
| 112 | ||
| 113 | * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. | |
| 114 | (cpu_flags): Add CpuTBM. | |
| 115 | ||
| 116 | * i386-opc.h (CpuTBM) New. | |
| 117 | (i386_cpu_flags): Add bit cputbm. | |
| 118 | ||
| 119 | * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, | |
| 120 | blcs, blsfill, blsic, t1mskc, and tzmsk. | |
| 121 | ||
| 90d6ff62 DD |
122 | 2011-01-12 DJ Delorie <dj@redhat.com> |
| 123 | ||
| 124 | * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. | |
| 125 | ||
| c95354ed MX |
126 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
| 127 | ||
| 128 | * mips-dis.c (print_insn_args): Adjust the value to print the real | |
| 129 | offset for "+c" argument. | |
| 130 | ||
| f7465604 NC |
131 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
| 132 | ||
| 133 | * po/da.po: Updated Danish translation. | |
| 134 | ||
| 639e30d2 NS |
135 | 2011-01-05 Nathan Sidwell <nathan@codesourcery.com> |
| 136 | ||
| 137 | * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. | |
| 138 | ||
| f12dc422 L |
139 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 140 | ||
| 141 | * i386-dis.c (REG_VEX_38F3): New. | |
| 142 | (PREFIX_0FBC): Likewise. | |
| 143 | (PREFIX_VEX_38F2): Likewise. | |
| 144 | (PREFIX_VEX_38F3_REG_1): Likewise. | |
| 145 | (PREFIX_VEX_38F3_REG_2): Likewise. | |
| 146 | (PREFIX_VEX_38F3_REG_3): Likewise. | |
| 147 | (PREFIX_VEX_38F7): Likewise. | |
| 148 | (VEX_LEN_38F2_P_0): Likewise. | |
| 149 | (VEX_LEN_38F3_R_1_P_0): Likewise. | |
| 150 | (VEX_LEN_38F3_R_2_P_0): Likewise. | |
| 151 | (VEX_LEN_38F3_R_3_P_0): Likewise. | |
| 152 | (VEX_LEN_38F7_P_0): Likewise. | |
| 153 | (dis386_twobyte): Use PREFIX_0FBC. | |
| 154 | (reg_table): Add REG_VEX_38F3. | |
| 155 | (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, | |
| 156 | PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, | |
| 157 | PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. | |
| 158 | (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and | |
| 159 | PREFIX_VEX_38F7. | |
| 160 | (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, | |
| 161 | VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and | |
| 162 | VEX_LEN_38F7_P_0. | |
| 163 | ||
| 164 | * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. | |
| 165 | (cpu_flags): Add CpuBMI. | |
| 166 | ||
| 167 | * i386-opc.h (CpuBMI): New. | |
| 168 | (i386_cpu_flags): Add cpubmi. | |
| 169 | ||
| 170 | * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. | |
| 171 | * i386-init.h: Regenerated. | |
| 172 | * i386-tbl.h: Likewise. | |
| 173 | ||
| cb21baef L |
174 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 175 | ||
| 176 | * i386-dis.c (VexGdq): New. | |
| 177 | (OP_VEX): Handle dq_mode. | |
| 178 | ||
| 0db46eb4 L |
179 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
| 180 | ||
| 181 | * i386-gen.c (process_copyright): Update copyright to 2011. | |
| 182 | ||
| 9e9e0820 | 183 | For older changes see ChangeLog-2010 |
| 252b5132 RH |
184 | \f |
| 185 | Local Variables: | |
| 2f6d2f85 NC |
186 | mode: change-log |
| 187 | left-margin: 8 | |
| 188 | fill-column: 74 | |
| 252b5132 RH |
189 | version-control: never |
| 190 | End: |