* cp-valprint.c (cp_print_value): Replace potentially unsafe
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
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12012-07-05 Thomas Schwinge <thomas@codesourcery.com>
2
f4263ca2 3 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 4
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52012-07-02 Roland McGrath <mcgrathr@google.com>
6
7 * i386-opc.tbl: Add RepPrefixOk to nop.
8 * i386-tbl.h: Regenerate.
9
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102012-06-28 Nick Clifton <nickc@redhat.com>
11
12 * po/vi.po: Updated Vietnamese translation.
13
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142012-06-22 Roland McGrath <mcgrathr@google.com>
15
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16 * i386-opc.tbl: Add RepPrefixOk to ret.
17 * i386-tbl.h: Regenerate.
18
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19 * i386-opc.h (RepPrefixOk): New enum constant.
20 (i386_opcode_modifier): New bitfield 'repprefixok'.
21 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
22 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
23 instructions that have IsString.
24 * i386-tbl.h: Regenerate.
25
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262012-06-11 Andreas Schwab <schwab@linux-m68k.org>
27
28 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
29 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
30 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
31 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
32 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
33 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
34 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
35 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
36 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
37
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382012-05-19 Alan Modra <amodra@gmail.com>
39
40 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
41 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
42
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432012-05-18 Alan Modra <amodra@gmail.com>
44
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45 * ia64-opc.c: Remove #include "ansidecl.h".
46 * z8kgen.c: Include sysdep.h first.
47
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48 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
49 * bfin-dis.c: Likewise.
50 * i860-dis.c: Likewise.
51 * ia64-dis.c: Likewise.
52 * ia64-gen.c: Likewise.
53 * m68hc11-dis.c: Likewise.
54 * mmix-dis.c: Likewise.
55 * msp430-dis.c: Likewise.
56 * or32-dis.c: Likewise.
57 * rl78-dis.c: Likewise.
58 * rx-dis.c: Likewise.
59 * tic4x-dis.c: Likewise.
60 * tilegx-opc.c: Likewise.
61 * tilepro-opc.c: Likewise.
62 * rx-decode.c: Regenerate.
63
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642012-05-17 James Lemke <jwlemke@codesourcery.com>
65
66 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
67
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682012-05-17 James Lemke <jwlemke@codesourcery.com>
69
70 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
71
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722012-05-17 Daniel Richard G. <skunk@iskunk.org>
73 Nick Clifton <nickc@redhat.com>
74
75 PR 14072
76 * configure.in: Add check that sysdep.h has been included before
77 any system header files.
78 * configure: Regenerate.
79 * config.in: Regenerate.
80 * sysdep.h: Generate an error if included before config.h.
81 * alpha-opc.c: Include sysdep.h before any other header file.
82 * alpha-dis.c: Likewise.
83 * avr-dis.c: Likewise.
84 * cgen-opc.c: Likewise.
85 * cr16-dis.c: Likewise.
86 * cris-dis.c: Likewise.
87 * crx-dis.c: Likewise.
88 * d10v-dis.c: Likewise.
89 * d10v-opc.c: Likewise.
90 * d30v-dis.c: Likewise.
91 * d30v-opc.c: Likewise.
92 * h8500-dis.c: Likewise.
93 * i370-dis.c: Likewise.
94 * i370-opc.c: Likewise.
95 * m10200-dis.c: Likewise.
96 * m10300-dis.c: Likewise.
97 * micromips-opc.c: Likewise.
98 * mips-opc.c: Likewise.
99 * mips61-opc.c: Likewise.
100 * moxie-dis.c: Likewise.
101 * or32-opc.c: Likewise.
102 * pj-dis.c: Likewise.
103 * ppc-dis.c: Likewise.
104 * ppc-opc.c: Likewise.
105 * s390-dis.c: Likewise.
106 * sh-dis.c: Likewise.
107 * sh64-dis.c: Likewise.
108 * sparc-dis.c: Likewise.
109 * sparc-opc.c: Likewise.
110 * spu-dis.c: Likewise.
111 * tic30-dis.c: Likewise.
112 * tic54x-dis.c: Likewise.
113 * tic80-dis.c: Likewise.
114 * tic80-opc.c: Likewise.
115 * tilegx-dis.c: Likewise.
116 * tilepro-dis.c: Likewise.
117 * v850-dis.c: Likewise.
118 * v850-opc.c: Likewise.
119 * vax-dis.c: Likewise.
120 * w65-dis.c: Likewise.
121 * xgate-dis.c: Likewise.
122 * xtensa-dis.c: Likewise.
123 * rl78-decode.opc: Likewise.
124 * rl78-decode.c: Regenerate.
125 * rx-decode.opc: Likewise.
126 * rx-decode.c: Regenerate.
127
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1282012-05-17 Alan Modra <amodra@gmail.com>
129
130 * ppc_dis.c: Don't include elf/ppc.h.
131
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1322012-05-16 Meador Inge <meadori@codesourcery.com>
133
134 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
135 to PUSH/POP {reg}.
136
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1372012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
138 Stephane Carrez <stcarrez@nerim.fr>
139
140 * configure.in: Add S12X and XGATE co-processor support to m68hc11
141 target.
142 * disassemble.c: Likewise.
143 * configure: Regenerate.
144 * m68hc11-dis.c: Make objdump output more consistent, use hex
145 instead of decimal and use 0x prefix for hex.
146 * m68hc11-opc.c: Add S12X and XGATE opcodes.
147
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1482012-05-14 James Lemke <jwlemke@codesourcery.com>
149
150 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
151 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
152 (vle_opcd_indices): New array.
153 (lookup_vle): New function.
154 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
155 (print_insn_powerpc): Likewise.
156 * ppc-opc.c: Likewise.
157
1582012-05-14 Catherine Moore <clm@codesourcery.com>
159 Maciej W. Rozycki <macro@codesourcery.com>
160 Rhonda Wittels <rhonda@codesourcery.com>
161 Nathan Froyd <froydnj@codesourcery.com>
162
163 * ppc-opc.c (insert_arx, extract_arx): New functions.
164 (insert_ary, extract_ary): New functions.
165 (insert_li20, extract_li20): New functions.
166 (insert_rx, extract_rx): New functions.
167 (insert_ry, extract_ry): New functions.
168 (insert_sci8, extract_sci8): New functions.
169 (insert_sci8n, extract_sci8n): New functions.
170 (insert_sd4h, extract_sd4h): New functions.
171 (insert_sd4w, extract_sd4w): New functions.
172 (insert_vlesi, extract_vlesi): New functions.
173 (insert_vlensi, extract_vlensi): New functions.
174 (insert_vleui, extract_vleui): New functions.
175 (insert_vleil, extract_vleil): New functions.
176 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
177 (BI16, BI32, BO32, B8): New.
178 (B15, B24, CRD32, CRS): New.
179 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
180 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
181 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
182 (SH6_MASK): Use PPC_OPSHIFT_INV.
183 (SI8, UI5, OIMM5, UI7, BO16): New.
184 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
185 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
186 (ALLOW8_SPRG): New.
187 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
188 (OPVUP, OPVUP_MASK OPVUP): New
189 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
190 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
191 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
192 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
193 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
194 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
195 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
196 (SE_IM5, SE_IM5_MASK): New.
197 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
198 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
199 (BO32DNZ, BO32DZ): New.
200 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
201 (PPCVLE): New.
202 (powerpc_opcodes): Add new VLE instructions. Update existing
203 instruction to include PPCVLE if supported.
204 * ppc-dis.c (ppc_opts): Add vle entry.
205 (get_powerpc_dialect): New function.
206 (powerpc_init_dialect): VLE support.
207 (print_insn_big_powerpc): Call get_powerpc_dialect.
208 (print_insn_little_powerpc): Likewise.
209 (operand_value_powerpc): Handle negative shift counts.
210 (print_insn_powerpc): Handle 2-byte instruction lengths.
211
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2122012-05-11 Daniel Richard G. <skunk@iskunk.org>
213
214 PR binutils/14028
215 * configure.in: Invoke ACX_HEADER_STRING.
216 * configure: Regenerate.
217 * config.in: Regenerate.
218 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
219 string.h and strings.h.
220
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2212012-05-11 Nick Clifton <nickc@redhat.com>
222
223 PR binutils/14006
224 * arm-dis.c (print_insn): Fix detection of instruction mode in
225 files containing multiple executable sections.
226
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2272012-05-03 Sean Keys <skeys@ipdatasys.com>
228
229 * Makefile.in, configure: regenerate
230 * disassemble.c (disassembler): Recognize ARCH_XGATE.
231 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
232 New functions.
233 * configure.in: Recognize xgate.
234 * xgate-dis.c, xgate-opc.c: New files for support of xgate
235 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
236 and opcode generation for xgate.
237
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2382012-04-30 DJ Delorie <dj@redhat.com>
239
240 * rx-decode.opc (MOV): Do not sign-extend immediates which are
241 already the maximum bit size.
242 * rx-decode.c: Regenerate.
243
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2442012-04-27 David S. Miller <davem@davemloft.net>
245
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246 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
247 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
248
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249 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
250 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
251
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252 * sparc-opc.c (CBCOND): New define.
253 (CBCOND_XCC): Likewise.
254 (cbcond): New helper macro.
255 (sparc_opcodes): Add compare-and-branch instructions.
256
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257 * sparc-dis.c (print_insn_sparc): Handle ')'.
258 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
259
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260 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
261 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
262
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2632012-04-12 David S. Miller <davem@davemloft.net>
264
265 * sparc-dis.c (X_DISP10): Define.
266 (print_insn_sparc): Handle '='.
267
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2682012-04-01 Mike Frysinger <vapier@gentoo.org>
269
270 * bfin-dis.c (fmtconst): Replace decimal handling with a single
271 sprintf call and the '*' field width.
272
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2732012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
274
275 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
276
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2772012-03-16 Alan Modra <amodra@gmail.com>
278
279 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
280 (powerpc_opcd_indices): Bump array size.
281 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
282 corresponding to unused opcodes to following entry.
283 (lookup_powerpc): New function, extracted and optimised from..
284 (print_insn_powerpc): ..here.
285
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2862012-03-15 Alan Modra <amodra@gmail.com>
287 James Lemke <jwlemke@codesourcery.com>
288
289 * disassemble.c (disassemble_init_for_target): Handle ppc init.
290 * ppc-dis.c (private): New var.
291 (powerpc_init_dialect): Don't return calloc failure, instead use
292 private.
293 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
294 (powerpc_opcd_indices): New array.
295 (disassemble_init_powerpc): New function.
296 (print_insn_big_powerpc): Don't init dialect here.
297 (print_insn_little_powerpc): Likewise.
298 (print_insn_powerpc): Start search using powerpc_opcd_indices.
299
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3002012-03-10 Edmar Wienskoski <edmar@freescale.com>
301
302 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
303 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
304 (PPCVEC2, PPCTMR, E6500): New short names.
305 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
306 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
307 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
308 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
309 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
310 optional operands on sync instruction for E6500 target.
311
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3122012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
313
314 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
315
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3162012-02-27 Alan Modra <amodra@gmail.com>
317
318 * mt-dis.c: Regenerate.
319
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3202012-02-27 Alan Modra <amodra@gmail.com>
321
322 * v850-opc.c (extract_v8): Rearrange to make it obvious this
323 is the inverse of corresponding insert function.
324 (extract_d22, extract_u9, extract_r4): Likewise.
325 (extract_d9): Correct sign extension.
326 (extract_d16_15): Don't assume "long" is 32 bits, and don't
327 rely on implementation defined behaviour for shift right of
328 signed types.
329 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
330 (extract_d23): Likewise, and correct mask.
331
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3322012-02-27 Alan Modra <amodra@gmail.com>
333
334 * crx-dis.c (print_arg): Mask constant to 32 bits.
335 * crx-opc.c (cst4_map): Use int array.
336
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3372012-02-27 Alan Modra <amodra@gmail.com>
338
339 * arc-dis.c (BITS): Don't use shifts to mask off bits.
340 (FIELDD): Sign extend with xor,sub.
341
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3422012-02-25 Walter Lee <walt@tilera.com>
343
344 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
345 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
346 TILEPRO_OPC_LW_TLS_SN.
347
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3482012-02-21 H.J. Lu <hongjiu.lu@intel.com>
349
350 * i386-opc.h (HLEPrefixNone): New.
351 (HLEPrefixLock): Likewise.
352 (HLEPrefixAny): Likewise.
353 (HLEPrefixRelease): Likewise.
354
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3552012-02-08 H.J. Lu <hongjiu.lu@intel.com>
356
357 * i386-dis.c (HLE_Fixup1): New.
358 (HLE_Fixup2): Likewise.
359 (HLE_Fixup3): Likewise.
360 (Ebh1): Likewise.
361 (Evh1): Likewise.
362 (Ebh2): Likewise.
363 (Evh2): Likewise.
364 (Ebh3): Likewise.
365 (Evh3): Likewise.
366 (MOD_C6_REG_7): Likewise.
367 (MOD_C7_REG_7): Likewise.
368 (RM_C6_REG_7): Likewise.
369 (RM_C7_REG_7): Likewise.
370 (XACQUIRE_PREFIX): Likewise.
371 (XRELEASE_PREFIX): Likewise.
372 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
373 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
374 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
375 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
376 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
377 MOD_C6_REG_7 and MOD_C7_REG_7.
378 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
379 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
380 xtest.
381 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
382 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
383
384 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
385 CPU_RTM_FLAGS.
386 (cpu_flags): Add CpuHLE and CpuRTM.
387 (opcode_modifiers): Add HLEPrefixOk.
388
389 * i386-opc.h (CpuHLE): New.
390 (CpuRTM): Likewise.
391 (HLEPrefixOk): Likewise.
392 (i386_cpu_flags): Add cpuhle and cpurtm.
393 (i386_opcode_modifier): Add hleprefixok.
394
395 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
396 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
397 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
398 operand. Add xacquire, xrelease, xabort, xbegin, xend and
399 xtest.
400 * i386-init.h: Regenerated.
401 * i386-tbl.h: Likewise.
402
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404
405 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
406 * rl78-decode.c: Regenerate.
407
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4082012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
409
410 PR binutils/10173
411 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
412
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4132012-01-17 Andreas Schwab <schwab@linux-m68k.org>
414
415 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
416 register and move them after pmove with PSR/PCSR register.
417
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4182012-01-13 H.J. Lu <hongjiu.lu@intel.com>
419
420 * i386-dis.c (mod_table): Add vmfunc.
421
422 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
423 (cpu_flags): CpuVMFUNC.
424
425 * i386-opc.h (CpuVMFUNC): New.
426 (i386_cpu_flags): Add cpuvmfunc.
427
428 * i386-opc.tbl: Add vmfunc.
429 * i386-init.h: Regenerated.
430 * i386-tbl.h: Likewise.
5011093d 431
23e1d329 432For older changes see ChangeLog-2011
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433\f
434Local Variables:
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435mode: change-log
436left-margin: 8
437fill-column: 74
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438version-control: never
439End:
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