*** empty log message ***
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
ddefa7f5
KH
12007-06-18 Nathan Sidwell <nathan@codesourcery.com>
2
3 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
4
79887925
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52007-06-14 H.J. Lu <hongjiu.lu@intel.com>
6
7 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
8
9 * acinclude.m4: Removed.
10
11 * Makefile.in: Regenerated.
12 * doc/Makefile.in: Likewise.
13 * aclocal.m4: Likewise.
14 * configure: Likewise.
15
79d49516
PB
162007-06-05 Paul Brook <paul@codesourcery.com>
17
18 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
19
37ad9514
SE
202007-05-24 Steve Ellcey <sje@cup.hp.com>
21
22 * Makefile.in: Regnerate.
23 * configure: Regenerate.
24 * aclocal.m4: Regenerate.
25
65b650b4
AM
262007-05-18 Alan Modra <amodra@bigpond.net.au>
27
28 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
29 after setting skip_optional.
30
ea192fa3
PB
312007-05-16 Peter Bergner <bergner@vnet.ibm.com>
32
33 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
34 (print_insn_powerpc): Use the new operand_value_powerpc and
35 skip_optional_operands functions to omit or print all optional
36 operands as a group.
37 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
38 (XFL_MASK): Delete L and W bits from the mask.
39 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
40 with XWRA_MASK. Use W.
41 (mtfsf, mtfsf.): Use XFL_L and W.
42
9beff690
L
432007-05-14 H.J. Lu <hongjiu.lu@intel.com>
44
45 PR binutils/4502
46 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
47
4d67a4d3
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482007-05-10 H.J. Lu <hongjiu.lu@intel.com>
49
50 * i386-opc.h (ShortForm): Redefined.
51 (Jump): Likewise.
52 (JumpDword): Likewise.
53 (JumpByte): Likewise.
54 (JumpInterSegment): Likewise.
55 (FloatMF): Likewise.
56 (FloatR): Likewise.
57 (FloatD): Likewise.
58 (Size16): Likewise.
59 (Size32): Likewise.
60 (Size64): Likewise.
61 (IgnoreSize): Likewise.
62 (DefaultSize): Likewise.
63 (No_bSuf): Likewise.
64 (No_wSuf): Likewise.
65 (No_lSuf): Likewise.
66 (No_sSuf): Likewise.
67 (No_qSuf): Likewise.
68 (No_xSuf): Likewise.
69 (FWait): Likewise.
70 (IsString): Likewise.
71 (regKludge): Likewise.
72 (IsPrefix): Likewise.
73 (ImmExt): Likewise.
74 (NoRex64): Likewise.
75 (Rex64): Likewise.
76 (Ugh): Likewise.
77
8de28984
L
782007-05-07 H.J. Lu <hongjiu.lu@intel.com>
79
80 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
81 for some SSE4 instructions.
82 (threebyte_0x3a_uses_DATA_prefix): Likewise.
83
20592a94
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842007-05-03 H.J. Lu <hongjiu.lu@intel.com>
85
86 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
87
88 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
89 type for crc32.
90
9344ff29
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912007-05-01 H.J. Lu <hongjiu.lu@intel.com>
92
93 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
94 check data size prefix in 16bit mode.
95
96 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
97 support Intel mode.
98
53289dcd 992007-04-30 Mark Salter <msalter@redhat.com>
65b650b4 100
53289dcd
MS
101 * frv-desc.c: Regenerate.
102 * frv-desc.h: Regenerate.
65b650b4 103
eb42fac1
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1042007-04-30 Alan Modra <amodra@bigpond.net.au>
105
106 PR 4436
107 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
108
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1092007-04-27 H.J. Lu <hongjiu.lu@intel.com>
110
111 * i386-dis.c (modrm): Put reg before rm.
112
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1132007-04-26 H.J. Lu <hongjiu.lu@intel.com>
114
115 PR binutils/4430
116 * i386-dis.c (print_displacement): New.
117 (OP_E): Call print_displacement instead of print_operand_value
118 to output displacement when either base or index exist. Print
119 the explicit zero displacement in 16bit mode.
120
185b1163
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1212007-04-26 H.J. Lu <hongjiu.lu@intel.com>
122
123 PR binutils/4429
124 * i386-dis.c (print_insn): Also swap the order of op_riprel
125 when swapping op_index. Break when the RIP relative address
126 is printed.
127 (OP_E): Properly handle RIP relative addressing and print the
128 explicit zero displacement for Intel mode.
129
eddc20ad
AM
1302007-04-27 Alan Modra <amodra@bigpond.net.au>
131
132 * Makefile.am: Run "make dep-am".
133 * Makefile.in: Regenerate.
134 * ns32k-dis.c: Include sysdep.h first.
135
dacc8b01
MS
1362007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
137
138 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
139 opcode.
eddc20ad
AM
140 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
141
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1422007-04-24 Nick Clifton <nickc@redhat.com>
143
144 * arm-dis.c (print_insn): Initialise type.
145
4c273957
AM
1462007-04-24 Alan Modra <amodra@bigpond.net.au>
147
148 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
149 * Makefile.am: Run "make dep-am".
150 * Makefile.in: Regenerate.
151
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1522007-04-23 Nathan Sidwell <nathan@codesourcery.com>
153
154 * m68k-opc.c: Mark mcfisa_c instructions.
155
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1562007-04-21 Richard Earnshaw <rearnsha@arm.com>
157
158 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
159 (thumb_opcodes): Add missing white space in adr.
65b650b4 160 (arm_decode_shift): New parameter, print_shift. Only decode the
37b37b2d
RE
161 shift parameter if set. Adjust callers.
162 (print_insn_arm): Support for operand type q with no shift decode.
163
717bbdf1
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1642007-04-21 Alan Modra <amodra@bigpond.net.au>
165
db557034
AM
166 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
167 Move contents to..
168 (i386_regtab): ..here.
169 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
170
717bbdf1
AM
171 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
172 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
173 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
174 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
175
78336706
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1762007-04-20 Nathan Sidwell <nathan@codesourcery.com>
177
178 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
179 rambar1.
180
b84bf58a
AM
1812007-04-20 Alan Modra <amodra@bigpond.net.au>
182
183 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
184 change.
185 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
186 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
187 references to following deleted functions.
188 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
189 (insert_ds, extract_ds, insert_de, extract_de): Delete.
190 (insert_des, extract_des, insert_li, extract_li): Delete.
191 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
192 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
193 (num_powerpc_operands): New constant.
194 (XSPRG_MASK): Remove entire SPRG field.
195 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
196
0bbdef92
AM
1972007-04-20 Alan Modra <amodra@bigpond.net.au>
198
199 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
200 (Z2_MASK): Define.
201 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
202
86ad2a13
RE
2032007-04-20 Richard Earnshaw <rearnsha@arm.com>
204
205 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
206 being disassembled.
207
a33e055d
AM
2082007-04-19 Alan Modra <amodra@bigpond.net.au>
209
210 * Makefile.am: Run "make dep-am".
211 * Makefile.in: Regenerate.
212 * po/POTFILES.in: Regenerate.
213
360b1600
AM
2142007-04-19 Alan Modra <amodra@bigpond.net.au>
215
216 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
217 db10cyc, db12cyc, db16cyc.
218
b20ae55e
AM
2192007-04-19 Nathan Froyd <froydnj@codesourcery.com>
220
221 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
222
381d071f
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2232007-04-18 H.J. Lu <hongjiu.lu@intel.com>
224
225 * i386-dis.c (CRC32_Fixup): New.
226 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
227 PREGRP91): New.
228 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
229 (threebyte_0x3a_uses_DATA_prefix): Likewise.
230 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
231 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
232 (three_byte_table): Likewise.
233
234 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
235
f6fdceb7 236 * i386-opc.h (CpuSSE4_2): New.
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237 (CpuSSE4): Likewise.
238 (CpuUnknownFlags): Add CpuSSE4_2.
239
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2402007-04-18 H.J. Lu <hongjiu.lu@intel.com>
241
242 * i386-dis.c (XMM_Fixup): New.
243 (Edqb): New.
244 (Edqd): New.
245 (XMM0): New.
246 (dqb_mode): New.
247 (dqd_mode): New.
248 (PREGRP39 ... PREGRP85): New.
249 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
250 (threebyte_0x3a_uses_DATA_prefix): Likewise.
251 (prefix_user_table): Add PREGRP39 ... PREGRP85.
252 (three_byte_table): Likewise.
253 (putop): Handle 'K'.
254 (intel_operand_size): Handle dqb_mode, dqd_mode):
255 (OP_E): Likewise.
256 (OP_G): Likewise.
257
258 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
259
260 * i386-opc.h (CpuSSE4_1): New.
261 (CpuUnknownFlags): Add CpuSSE4_1.
262 (regKludge): Update comment.
263
ee5c21a0
DJ
2642007-04-18 Matthias Klose <doko@ubuntu.com>
265
266 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
267 * Makefile.in: Regenerate.
268
b7d19ba6
SE
2692007-04-14 Steve Ellcey <sje@cup.hp.com>
270
271 * Makefile.am: Add ACLOCAL_AMFLAGS.
272 * Makefile.in: Regenerate.
273
246c51aa
L
2742007-04-13 H.J. Lu <hongjiu.lu@intel.com>
275
276 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L
277 * i386-opc.c: Likewise.
278 * i386-opc.h: Likewise.
246c51aa 279
7967e09e
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2802007-04-11 H.J. Lu <hongjiu.lu@intel.com>
281
282 PR binutils/4333
283 * i386-dis.c (GRP1a): New.
284 (GRP1b ... GRPPADLCK2): Update index.
285 (dis386): Use GRP1a for entry 0x8f.
286 (mod, rm, reg): Removed. Replaced by ...
287 (modrm): This.
288 (grps): Add GRP1a.
289
56dc1f8a
KH
2902007-04-09 Kazu Hirata <kazu@codesourcery.com>
291
292 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
293 info->print_address_func if longjmp is called.
294
144f4bc6
DD
2952007-03-29 DJ Delorie <dj@redhat.com>
296
297 * m32c-desc.c: Regenerate.
298 * m32c-dis.c: Regenerate.
299 * m32c-opc.c: Regenerate.
300
e72cf3ec
L
3012007-03-28 H.J. Lu <hongjiu.lu@intel.com>
302
303 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
304 movq. Remove InvMem from sldt, smsw and str.
305
306 * i386-opc.h (InvMem): Renamed to ...
307 (RegMem): Update comments.
308 (AnyMem): Remove InvMem.
309
831480e9 3102007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 311
b74ed8f5
PB
312 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
313
4146fd53
PB
3142007-03-24 Paul Brook <paul@codesourcery.com>
315
316 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
317 (print_insn_coprocessor): Handle %<bitfield>x.
318
b6702015 3192007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 320 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB
321
322 * arm-dis.c (arm_opcodes): Print SRS base register.
323
831480e9 3242007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
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325
326 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
327
328 * i386-opc.c (i386_optab): Add rex.wrxb.
329
831480e9 3302007-03-21 H.J. Lu <hongjiu.lu@intel.com>
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L
331
332 * i386-dis.c (REX_MODE64): Remove definition.
333 (REX_EXTX): Likewise.
334 (REX_EXTY): Likewise.
335 (REX_EXTZ): Likewise.
336 (USED_REX): Use REX_OPCODE instead of 0x40.
337 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
338 REX_R, REX_X and REX_B respectively.
339
831480e9 3402007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
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341
342 PR binutils/4218
343 * i386-dis.c (PREGRP38): New.
344 (dis386): Use PREGRP38 for 0x90.
345 (prefix_user_table): Add PREGRP38.
346 (print_insn): Set uses_REPZ_prefix to 1 for pause.
347 (NOP_Fixup1): Properly handle REX bits.
348 (NOP_Fixup2): Likewise.
349
350 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
351 Allow register with nop.
352
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DD
3532007-03-20 DJ Delorie <dj@redhat.com>
354
355 * m32c-asm.c: Regenerate.
356 * m32c-desc.c: Regenerate.
357 * m32c-desc.h: Regenerate.
358 * m32c-dis.h: Regenerate.
359 * m32c-ibld.c: Regenerate.
360 * m32c-opc.c: Regenerate.
361 * m32c-opc.h: Regenerate.
362
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3632007-03-15 H.J. Lu <hongjiu.lu@intel.com>
364
365 * i386-opc.c: Include "libiberty.h".
366 (i386_regtab): Remove the last entry.
367 (i386_regtab_size): New.
368 (i386_float_regtab_size): Likewise.
369
370 * i386-opc.h (i386_regtab_size): New.
371 (i386_float_regtab_size): Likewise.
372
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3732007-03-15 H.J. Lu <hongjiu.lu@intel.com>
374
375 * Makefile.am (CFILES): Add i386-opc.c.
376 (ALL_MACHINES): Add i386-opc.lo.
377 Run "make dep-am".
378 * Makefile.in: Regenerated.
379
380 * configure.in: Add i386-opc.lo for bfd_i386_arch.
381 * configure: Regenerated.
382
383 * i386-dis.c: Include "opcode/i386.h".
384 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
385 (FWAIT_OPCODE): Remove definition.
386 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
387 (MAX_OPERANDS): Remove definition.
388
389 * i386-opc.c: New file.
390 * i386-opc.h: Likewise.
391
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3922007-03-15 H.J. Lu <hongjiu.lu@intel.com>
393
394 * Makefile.in: Regenerated.
395
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3962007-03-09 H.J. Lu <hongjiu.lu@intel.com>
397
398 * i386-dis.c (OP_Rd): Renamed to ...
399 (OP_R): This.
400 (Rd): Updated.
401 (Rm): Likewise.
402
a6d04ec4
AM
4032007-03-08 Alan Modra <amodra@bigpond.net.au>
404
1620f33d
AM
405 * fr30-asm.c: Regenerate.
406 * frv-asm.c: Regenerate.
407 * ip2k-asm.c: Regenerate.
408 * iq2000-asm.c: Regenerate.
409 * m32c-asm.c: Regenerate.
410 * m32r-asm.c: Regenerate.
411 * m32r-dis.c: Regenerate.
412 * mt-asm.c: Regenerate.
413 * mt-ibld.c: Regenerate.
414 * mt-opc.c: Regenerate.
415 * openrisc-asm.c: Regenerate.
416 * xc16x-asm.c: Regenerate.
417 * xstormy16-asm.c: Regenerate.
418
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419 * Makefile.am: Run "make dep-am".
420 * Makefile.in: Regenerate.
421 * po/POTFILES.in: Regenerate.
422
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MS
4232007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
424
425 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
426 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
427 instruction formats added.
428 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
429 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
430 masks added.
431 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
432 instructions added.
433 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
434 (main): z9-ec cpu type option added.
435 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
436
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4372007-02-22 DJ Delorie <dj@redhat.com>
438
439 * s390-opc.c (INSTR_SS_L2RDRD): New.
440 (MASK_SS_L2RDRD): New.
441 * s390-opc.txt (pka): Use it.
442
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4432007-02-20 Thiemo Seufer <ths@mips.com>
444 Chao-Ying Fu <fu@mips.com>
445
446 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
447 (print_insn_args): Add support for balign instruction.
448 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
449 (mips_builtin_opcodes): Add DSP R2 instructions.
450
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4512007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
452
453 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
454 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
455 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
456 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
457
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MS
4582007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
459
460 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
461 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
462 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
463 and sfpc.
464
af692060
NC
4652007-02-16 Nick Clifton <nickc@redhat.com>
466
467 PR binutils/4045
468 * avr-dis.c (comment_start): New variable, contains the prefix to
469 use when printing addresses in comments.
470 (print_insn_avr): Set comment_start to an empty space if there is
471 no symbol table available as the generic address printing code
472 will prefix the numeric value of the address with 0x.
473
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L
4742007-02-13 H.J. Lu <hongjiu.lu@intel.com>
475
476 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
477 in struct dis386.
478
bd2f2e55 4792007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB
480 Richard Sandiford <rsandifo@redhat.com>
481 DJ Delorie <dj@redhat.com>
482 Graydon Hoare <graydon@redhat.com>
483 Frank Ch. Eigler <fche@redhat.com>
484 Ben Elliston <bje@redhat.com>
485
486 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
487 (CFILES): Add mep-*.c
488 (ALL_MACHINES): Add mep-*.lo.
489 (CLEANFILES): Add stamp-mep.
490 (CGEN_CPUS): Add mep.
491 (MEP_DEPS): New variable.
492 (mep-*): New targets.
493 * configure.in: Handle bfd_mep_arch.
494 * disassemble.c (ARCH_mep): New macro.
495 (disassembler): Handle bfd_arch_mep.
496 (disassemble_init_for_target): Likewise.
497 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB
498 * Makefile.in: Regenerated.
499 * configure: Regenerated.
500
eb7834a6 5012007-02-05 H.J. Lu <hongjiu.lu@intel.com>
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L
502
503 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
504 wrap around within the same segment in 16bit mode.
505
eb7834a6 5062007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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507
508 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
509 prefix.
510
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5112007-02-02 H.J. Lu <hongjiu.lu@intel.com>
512
513 * avr-dis.c (avr_operand): Correct PR number in comment.
514
fc523535 5152007-02-02 H.J. Lu <hongjiu.lu@intel.com>
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516
517 * disassemble.c (disassembler_usage): Call
518 print_i386_disassembler_options for i386 disassembler.
519
520 * i386-dis.c (print_i386_disassembler_options): New.
521 (print_insn): Support the new addr64 option.
522
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5232007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
524
525 * ppc-dis.c (powerpc_dialect): Handle ppc440.
526 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
527 be used.
528
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5292007-02-02 Alan Modra <amodra@bigpond.net.au>
530
531 * ppc-opc.c (insert_bdm): -Many comment.
532 (valid_bo): Add "extract" param. Accept both powerpc and power4
533 BO fields when disassembling with -Many.
534 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
535
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5362007-01-08 Kazu Hirata <kazu@codesourcery.com>
537
538 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
539 cpu32 | fido_a except on tbl instructions.
540
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PB
5412007-01-04 Paul Brook <paul@codesourcery.com>
542
543 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
544
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AS
5452007-01-04 Andreas Schwab <schwab@suse.de>
546
547 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
548
62ac925e
JB
5492007-01-04 Julian Brown <julian@codesourcery.com>
550
551 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
552 vqrshl instructions.
553
10a2343e 554For older changes see ChangeLog-2006
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555\f
556Local Variables:
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557mode: change-log
558left-margin: 8
559fill-column: 74
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560version-control: never
561End:
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