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* readelf.c (get_parisc_dynamic_type): Add new dynamic types.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
e9f89963
PB		 12005-07-29 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
4
92e90b6e
PB		 52005-07-29 Paul Brook <paul@codesourcery.com>
6
7 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
8 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
9
fd54057a
DD		 102005-07-25 DJ Delorie <dj@redhat.com>
11
12 * m32c-asm.c Regenerate.
13 * m32c-dis.c Regenerate.
14
760c0f6a
DD		 152005-07-20 DJ Delorie <dj@redhat.com>
16
17 * disassemble.c (disassemble_init_for_target): M32C ISAs are
18 enums, so convert them to bit masks, which attributes are.
19
85da3a56
NC		 202005-07-18 Nick Clifton <nickc@redhat.com>
21
22 * configure.in: Restore alpha ordering to list of arches.
23 * configure: Regenerate.
24 * disassemble.c: Restore alpha ordering to list of arches.
25
262005-07-18 Nick Clifton <nickc@redhat.com>
27
28 * m32c-asm.c: Regenerate.
29 * m32c-desc.c: Regenerate.
30 * m32c-desc.h: Regenerate.
31 * m32c-dis.c: Regenerate.
32 * m32c-ibld.h: Regenerate.
33 * m32c-opc.c: Regenerate.
34 * m32c-opc.h: Regenerate.
35
22cbf2e7
L		 362005-07-18 H.J. Lu <hongjiu.lu@intel.com>
37
38 * i386-dis.c (PNI_Fixup): Update comment.
39 (VMX_Fixup): Properly handle the suffix check.
40
0aea0460
DA		 412005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
42
43 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
44 mfctl disassembly.
45
0f82ff91
AM		 462005-07-16 Alan Modra <amodra@bigpond.net.au>
47
48 * Makefile.am: Run "make dep-am".
49 (stamp-m32c): Fix cpu dependencies.
50 * Makefile.in: Regenerate.
51 * ip2k-dis.c: Regenerate.
52
90700ea2
L		 532007-07-15 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
56 (VMX_Fixup): New. Fix up Intel VMX Instructions.
57 (Em): New.
58 (Gm): New.
59 (VM): New.
60 (dis386_twobyte): Updated entries 0x78 and 0x79.
61 (twobyte_has_modrm): Likewise.
62 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
63 (OP_G): Handle m_mode.
64
49f58d10
JB		 652005-07-14 Jim Blandy <jimb@redhat.com>
66
67 Add support for the Renesas M32C and M16C.
68 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
69 * m32c-desc.h, m32c-opc.h: New.
70 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
71 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
72 m32c-opc.c.
73 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
74 m32c-ibld.lo, m32c-opc.lo.
75 (CLEANFILES): List stamp-m32c.
76 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
77 (CGEN_CPUS): Add m32c.
78 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
79 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
80 (m32c_opc_h): New variable.
81 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
82 (m32c-opc.lo): New rules.
83 * Makefile.in: Regenerated.
84 * configure.in: Add case for bfd_m32c_arch.
85 * configure: Regenerated.
86 * disassemble.c (ARCH_m32c): New.
87 [ARCH_m32c]: #include "m32c-desc.h".
88 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
89 (disassemble_init_for_target) [ARCH_m32c]: Same.
90
91 * cgen-ops.h, cgen-types.h: New files.
92 * Makefile.am (HFILES): List them.
93 * Makefile.in: Regenerated.
94
0fd3a477
JW		 952005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
96
97 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
98 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
99 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
100 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
101 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
102 v850-dis.c: Fix format bugs.
103 * ia64-gen.c (fail, warn): Add format attribute.
104 * or32-opc.c (debug): Likewise.
105
22f8fcbd
NC		 1062005-07-07 Khem Raj <kraj@mvista.com>
107
108 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
109 disassembly pattern.
110
d125c27b
AM		 1112005-07-06 Alan Modra <amodra@bigpond.net.au>
112
113 * Makefile.am (stamp-m32r): Fix path to cpu files.
114 (stamp-m32r, stamp-iq2000): Likewise.
115 * Makefile.in: Regenerate.
116 * m32r-asm.c: Regenerate.
117 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
118 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
119
3ec2b351
NC		 1202005-07-05 Nick Clifton <nickc@redhat.com>
121
122 * iq2000-asm.c: Regenerate.
123 * ms1-asm.c: Regenerate.
124
30123838
JB		 1252005-07-05 Jan Beulich <jbeulich@novell.com>
126
127 * i386-dis.c (SVME_Fixup): New.
128 (grps): Use it for the lidt entry.
129 (PNI_Fixup): Call OP_M rather than OP_E.
130 (INVLPG_Fixup): Likewise.
131
b0eec63e
L		 1322005-07-04 H.J. Lu <hongjiu.lu@intel.com>
133
134 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
135
47b0e7ad
NC		 1362005-07-01 Nick Clifton <nickc@redhat.com>
137
138 * a29k-dis.c: Update to ISO C90 style function declarations and
139 fix formatting.
140 * alpha-opc.c: Likewise.
141 * arc-dis.c: Likewise.
142 * arc-opc.c: Likewise.
143 * avr-dis.c: Likewise.
144 * cgen-asm.in: Likewise.
145 * cgen-dis.in: Likewise.
146 * cgen-ibld.in: Likewise.
147 * cgen-opc.c: Likewise.
148 * cris-dis.c: Likewise.
149 * d10v-dis.c: Likewise.
150 * d30v-dis.c: Likewise.
151 * d30v-opc.c: Likewise.
152 * dis-buf.c: Likewise.
153 * dlx-dis.c: Likewise.
154 * h8300-dis.c: Likewise.
155 * h8500-dis.c: Likewise.
156 * hppa-dis.c: Likewise.
157 * i370-dis.c: Likewise.
158 * i370-opc.c: Likewise.
159 * m10200-dis.c: Likewise.
160 * m10300-dis.c: Likewise.
161 * m68k-dis.c: Likewise.
162 * m88k-dis.c: Likewise.
163 * mips-dis.c: Likewise.
164 * mmix-dis.c: Likewise.
165 * msp430-dis.c: Likewise.
166 * ns32k-dis.c: Likewise.
167 * or32-dis.c: Likewise.
168 * or32-opc.c: Likewise.
169 * pdp11-dis.c: Likewise.
170 * pj-dis.c: Likewise.
171 * s390-dis.c: Likewise.
172 * sh-dis.c: Likewise.
173 * sh64-dis.c: Likewise.
174 * sparc-dis.c: Likewise.
175 * sparc-opc.c: Likewise.
176 * sysdep.h: Likewise.
177 * tic30-dis.c: Likewise.
178 * tic4x-dis.c: Likewise.
179 * tic80-dis.c: Likewise.
180 * v850-dis.c: Likewise.
181 * v850-opc.c: Likewise.
182 * vax-dis.c: Likewise.
183 * w65-dis.c: Likewise.
184 * z8kgen.c: Likewise.
185
186 * fr30-*: Regenerate.
187 * frv-*: Regenerate.
188 * ip2k-*: Regenerate.
189 * iq2000-*: Regenerate.
190 * m32r-*: Regenerate.
191 * ms1-*: Regenerate.
192 * openrisc-*: Regenerate.
193 * xstormy16-*: Regenerate.
194
cc16ba8c
BE		 1952005-06-23 Ben Elliston <bje@gnu.org>
196
197 * m68k-dis.c: Use ISC C90.
198 * m68k-opc.c: Formatting fixes.
199
4b185e97
DU		 2002005-06-16 David Ung <davidu@mips.com>
201
202 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
203 instructions to the table; seb/seh/sew/zeb/zeh/zew.
204
ac188222
DB		 2052005-06-15 Dave Brolley <brolley@redhat.com>
206
207 Contribute Morpho ms1 on behalf of Red Hat
208 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
209 ms1-opc.h: New files, Morpho ms1 target.
210
211 2004-05-14 Stan Cox <scox@redhat.com>
212
213 * disassemble.c (ARCH_ms1): Define.
214 (disassembler): Handle bfd_arch_ms1
215
216 2004-05-13 Michael Snyder <msnyder@redhat.com>
217
218 * Makefile.am, Makefile.in: Add ms1 target.
219 * configure.in: Ditto.
220
6b5d3a4d
ZW		 2212005-06-08 Zack Weinberg <zack@codesourcery.com>
222
223 * arm-opc.h: Delete; fold contents into ...
224 * arm-dis.c: ... here. Move includes of internal COFF headers
225 next to includes of internal ELF headers.
226 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
227 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
228 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
229 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
230 (iwmmxt_wwnames, iwmmxt_wwssnames):
231 Make const.
232 (regnames): Remove iWMMXt coprocessor register sets.
233 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
234 (get_arm_regnames): Adjust fourth argument to match above changes.
235 (set_iwmmxt_regnames): Delete.
236 (print_insn_arm): Constify 'c'. Use ISO syntax for function
237 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
238 and iwmmxt_cregnames, not set_iwmmxt_regnames.
239 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
240 ISO syntax for function pointer calls.
241
4a5329c6
ZW		 2422005-06-07 Zack Weinberg <zack@codesourcery.com>
243
244 * arm-dis.c: Split up the comments describing the format codes, so
245 that the ARM and 16-bit Thumb opcode tables each have comments
246 preceding them that describe all the codes, and only the codes,
247 valid in those tables. (32-bit Thumb table is already like this.)
248 Reorder the lists in all three comments to match the order in
249 which the codes are implemented.
250 Remove all forward declarations of static functions. Convert all
251 function definitions to ISO C format.
252 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
253 Return nothing.
254 (print_insn_thumb16): Remove unused case 'I'.
255 (print_insn): Update for changed calling convention of subroutines.
256
3d456fa1
JB		 2572005-05-25 Jan Beulich <jbeulich@novell.com>
258
259 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
260 hex (but retain it being displayed as signed). Remove redundant
261 checks. Add handling of displacements for 16-bit addressing in Intel
262 mode.
263
2888cb7a
JB		 2642005-05-25 Jan Beulich <jbeulich@novell.com>
265
266 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
267 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
268 masking of 'rm' in 16-bit memory address handling.
269
1ed8e1e4
AM		 2702005-05-19 Anton Blanchard <anton@samba.org>
271
272 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
273 (print_ppc_disassembler_options): Document it.
274 * ppc-opc.c (SVC_LEV): Define.
275 (LEV): Allow optional operand.
276 (POWER5): Define.
277 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
278 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
279
49cc2e69
KC		 2802005-05-19 Kelley Cook <kcook@gcc.gnu.org>
281
282 * Makefile.in: Regenerate.
283
c19d1205
ZW		 2842005-05-17 Zack Weinberg <zack@codesourcery.com>
285
286 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
287 instructions. Adjust disassembly of some opcodes to match
288 unified syntax.
289 (thumb32_opcodes): New table.
290 (print_insn_thumb): Rename print_insn_thumb16; don't handle
291 two-halfword branches here.
292 (print_insn_thumb32): New function.
293 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
294 and print_insn_thumb32. Be consistent about order of
295 halfwords when printing 32-bit instructions.
296
003519a7
L		 2972005-05-07 H.J. Lu <hongjiu.lu@intel.com>
298
299 PR 843
300 * i386-dis.c (branch_v_mode): New.
301 (indirEv): Use branch_v_mode instead of v_mode.
302 (OP_E): Handle branch_v_mode.
303
920a34a7
L		 3042005-05-07 H.J. Lu <hongjiu.lu@intel.com>
305
306 * d10v-dis.c (dis_2_short): Support 64bit host.
307
5de773c1
NC		 3082005-05-07 Nick Clifton <nickc@redhat.com>
309
310 * po/nl.po: Updated translation.
311
f4321104
NC		 3122005-05-07 Nick Clifton <nickc@redhat.com>
313
314 * Update the address and phone number of the FSF organization in
315 the GPL notices in the following files:
316 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
317 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
318 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
319 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
320 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
321 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
322 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
323 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
324 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
325 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
326 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
327 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
328 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
329 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
330 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
331 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
332 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
333 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
334 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
335 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
336 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
337 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
338 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
339 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
340 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
341 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
342 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
343 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
344 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
345 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
346 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
347 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
348 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
349
10b076a2
JW		 3502005-05-05 James E Wilson <wilson@specifixinc.com>
351
352 * ia64-opc.c: Include sysdep.h before libiberty.h.
353
022716b6
NC		 3542005-05-05 Nick Clifton <nickc@redhat.com>
355
356 * configure.in (ALL_LINGUAS): Add vi.
357 * configure: Regenerate.
358 * po/vi.po: New.
359
db5152b4
JG		 3602005-04-26 Jerome Guitton <guitton@gnat.com>
361
362 * configure.in: Fix the check for basename declaration.
363 * configure: Regenerate.
364
eed0d89a
AM		 3652005-04-19 Alan Modra <amodra@bigpond.net.au>
366
367 * ppc-opc.c (RTO): Define.
368 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
369 entries to suit PPC440.
370
791fe849
MK		 3712005-04-18 Mark Kettenis <kettenis@gnu.org>
372
373 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
374 Add xcrypt-ctr.
375
ffe58f7c
NC		 3762005-04-14 Nick Clifton <nickc@redhat.com>
377
378 * po/fi.po: New translation: Finnish.
379 * configure.in (ALL_LINGUAS): Add fi.
380 * configure: Regenerate.
381
9e9b66a9
AM		 3822005-04-14 Alan Modra <amodra@bigpond.net.au>
383
384 * Makefile.am (NO_WERROR): Define.
385 * configure.in: Invoke AM_BINUTILS_WARNINGS.
386 * Makefile.in: Regenerate.
387 * aclocal.m4: Regenerate.
388 * configure: Regenerate.
389
9494d739
NC		 3902005-04-04 Nick Clifton <nickc@redhat.com>
391
392 * fr30-asm.c: Regenerate.
393 * frv-asm.c: Regenerate.
394 * iq2000-asm.c: Regenerate.
395 * m32r-asm.c: Regenerate.
396 * openrisc-asm.c: Regenerate.
397
6128c599
JB		 3982005-04-01 Jan Beulich <jbeulich@novell.com>
399
400 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
401 visible operands in Intel mode. The first operand of monitor is
402 %rax in 64-bit mode.
403
373ff435
JB		 4042005-04-01 Jan Beulich <jbeulich@novell.com>
405
406 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
407 easier future additions.
408
4bd60896
JG		 4092005-03-31 Jerome Guitton <guitton@gnat.com>
410
411 * configure.in: Check for basename.
412 * configure: Regenerate.
413 * config.in: Ditto.
414
4cc91dba
L		 4152005-03-29 H.J. Lu <hongjiu.lu@intel.com>
416
417 * i386-dis.c (SEG_Fixup): New.
418 (Sv): New.
419 (dis386): Use "Sv" for 0x8c and 0x8e.
420
ec72cfe5
NC		 4212005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
422 Nick Clifton <nickc@redhat.com>
c19d1205 423
ec72cfe5
NC		 424 * vax-dis.c: (entry_addr): New varible: An array of user supplied
425 function entry mask addresses.
426 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 427 elements in entry_addr.
ec72cfe5
NC		 428 (entry_addr_total_slots): New variable: The total number of
429 elements in entry_addr.
430 (parse_disassembler_options): New function. Fills in the entry_addr
431 array.
432 (free_entry_array): New function. Release the memory used by the
433 entry addr array. Suppressed because there is no way to call it.
434 (is_function_entry): Check if a given address is a function's
435 start address by looking at supplied entry mask addresses and
436 symbol information, if available.
437 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
438
85064c79
L		 4392005-03-23 H.J. Lu <hongjiu.lu@intel.com>
440
441 * cris-dis.c (print_with_operands): Use ~31L for long instead
442 of ~31.
443
de7141c7
L		 4442005-03-20 H.J. Lu <hongjiu.lu@intel.com>
445
446 * mmix-opc.c (O): Revert the last change.
447 (Z): Likewise.
448
e493ab45
L		 4492005-03-19 H.J. Lu <hongjiu.lu@intel.com>
450
451 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
452 (Z): Likewise.
453
d8d7c459
HPN		 4542005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
455
456 * mmix-opc.c (O, Z): Force expression as unsigned long.
457
ebdb0383
NC		 4582005-03-18 Nick Clifton <nickc@redhat.com>
459
460 * ip2k-asm.c: Regenerate.
461 * op/opcodes.pot: Regenerate.
462
1ad12f97
NC		 4632005-03-16 Nick Clifton <nickc@redhat.com>
464 Ben Elliston <bje@au.ibm.com>
465
569acd2c 466 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 467 compiler command line. Enabled by default. Disable via
569acd2c 468 --disable-werror.
1ad12f97
NC		 469 * configure: Regenerate.
470
4eb30afc
AM		 4712005-03-16 Alan Modra <amodra@bigpond.net.au>
472
473 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
474 BOOKE.
475
ea8409f7
AM		 4762005-03-15 Alan Modra <amodra@bigpond.net.au>
477
729ae8d2
AM		 478 * po/es.po: Commit new Spanish translation.
479
ea8409f7
AM		 480 * po/fr.po: Commit new French translation.
481
4f495e61
NC		 4822005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
483
484 * vax-dis.c: Fix spelling error
485 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
486 of just "Entry mask: < r1 ... >"
487
0a003adc
ZW		 4882005-03-12 Zack Weinberg <zack@codesourcery.com>
489
490 * arm-dis.c (arm_opcodes): Document %E and %V.
491 Add entries for v6T2 ARM instructions:
492 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
493 (print_insn_arm): Add support for %E and %V.
885fc257 494 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 495
da99ee72
AM		 4962005-03-10 Jeff Baker <jbaker@qnx.com>
497 Alan Modra <amodra@bigpond.net.au>
498
499 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
500 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
501 (SPRG_MASK): Delete.
502 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 503 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 504 mfsprg4..7 after msprg and consolidate.
505
220abb21
AM		 5062005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
507
508 * vax-dis.c (entry_mask_bit): New array.
509 (print_insn_vax): Decode function entry mask.
510
0e06657a
AH		 5112005-03-07 Aldy Hernandez <aldyh@redhat.com>
512
513 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
514
06647dfd
AM		 5152005-03-05 Alan Modra <amodra@bigpond.net.au>
516
517 * po/opcodes.pot: Regenerate.
518
82b829a7
RR		 5192005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
520
220abb21 521 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 522 (dsmOneArcInst): Use the enum values for the decoding class.
523 Remove redundant case in the switch for decodingClass value 11.
82b829a7 524
c4a530c5
JB		 5252005-03-02 Jan Beulich <jbeulich@novell.com>
526
527 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
528 accesses.
529 (OP_C): Consider lock prefix in non-64-bit modes.
530
47d8304e
AM		 5312005-02-24 Alan Modra <amodra@bigpond.net.au>
532
533 * cris-dis.c (format_hex): Remove ineffective warning fix.
534 * crx-dis.c (make_instruction): Warning fix.
535 * frv-asm.c: Regenerate.
536
ec36c4a4
NC		 5372005-02-23 Nick Clifton <nickc@redhat.com>
538
33b71eeb
NC		 539 * cgen-dis.in: Use bfd_byte for buffers that are passed to
540 read_memory.
06647dfd 541
33b71eeb 542 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 543
ec36c4a4
NC		 544 * crx-dis.c (make_instruction): Move argument structure into inner
545 scope and ensure that all of its fields are initialised before
546 they are used.
547
33b71eeb
NC		 548 * fr30-asm.c: Regenerate.
549 * fr30-dis.c: Regenerate.
550 * frv-asm.c: Regenerate.
551 * frv-dis.c: Regenerate.
552 * ip2k-asm.c: Regenerate.
553 * ip2k-dis.c: Regenerate.
554 * iq2000-asm.c: Regenerate.
555 * iq2000-dis.c: Regenerate.
556 * m32r-asm.c: Regenerate.
557 * m32r-dis.c: Regenerate.
558 * openrisc-asm.c: Regenerate.
559 * openrisc-dis.c: Regenerate.
560 * xstormy16-asm.c: Regenerate.
561 * xstormy16-dis.c: Regenerate.
562
53c9ebc5
AM		 5632005-02-22 Alan Modra <amodra@bigpond.net.au>
564
565 * arc-ext.c: Warning fixes.
566 * arc-ext.h: Likewise.
567 * cgen-opc.c: Likewise.
568 * ia64-gen.c: Likewise.
569 * maxq-dis.c: Likewise.
570 * ns32k-dis.c: Likewise.
571 * w65-dis.c: Likewise.
572 * ia64-asmtab.c: Regenerate.
573
610ad19b
AM		 5742005-02-22 Alan Modra <amodra@bigpond.net.au>
575
576 * fr30-desc.c: Regenerate.
577 * fr30-desc.h: Regenerate.
578 * fr30-opc.c: Regenerate.
579 * fr30-opc.h: Regenerate.
580 * frv-desc.c: Regenerate.
581 * frv-desc.h: Regenerate.
582 * frv-opc.c: Regenerate.
583 * frv-opc.h: Regenerate.
584 * ip2k-desc.c: Regenerate.
585 * ip2k-desc.h: Regenerate.
586 * ip2k-opc.c: Regenerate.
587 * ip2k-opc.h: Regenerate.
588 * iq2000-desc.c: Regenerate.
589 * iq2000-desc.h: Regenerate.
590 * iq2000-opc.c: Regenerate.
591 * iq2000-opc.h: Regenerate.
592 * m32r-desc.c: Regenerate.
593 * m32r-desc.h: Regenerate.
594 * m32r-opc.c: Regenerate.
595 * m32r-opc.h: Regenerate.
596 * m32r-opinst.c: Regenerate.
597 * openrisc-desc.c: Regenerate.
598 * openrisc-desc.h: Regenerate.
599 * openrisc-opc.c: Regenerate.
600 * openrisc-opc.h: Regenerate.
601 * xstormy16-desc.c: Regenerate.
602 * xstormy16-desc.h: Regenerate.
603 * xstormy16-opc.c: Regenerate.
604 * xstormy16-opc.h: Regenerate.
605
db9db6f2
AM		 6062005-02-21 Alan Modra <amodra@bigpond.net.au>
607
608 * Makefile.am: Run "make dep-am"
609 * Makefile.in: Regenerate.
610
bf143b25
NC		 6112005-02-15 Nick Clifton <nickc@redhat.com>
612
613 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
614 compile time warnings.
615 (print_keyword): Likewise.
616 (default_print_insn): Likewise.
617
618 * fr30-desc.c: Regenerated.
619 * fr30-desc.h: Regenerated.
620 * fr30-dis.c: Regenerated.
621 * fr30-opc.c: Regenerated.
622 * fr30-opc.h: Regenerated.
623 * frv-desc.c: Regenerated.
624 * frv-dis.c: Regenerated.
625 * frv-opc.c: Regenerated.
626 * ip2k-asm.c: Regenerated.
627 * ip2k-desc.c: Regenerated.
628 * ip2k-desc.h: Regenerated.
629 * ip2k-dis.c: Regenerated.
630 * ip2k-opc.c: Regenerated.
631 * ip2k-opc.h: Regenerated.
632 * iq2000-desc.c: Regenerated.
633 * iq2000-dis.c: Regenerated.
634 * iq2000-opc.c: Regenerated.
635 * m32r-asm.c: Regenerated.
636 * m32r-desc.c: Regenerated.
637 * m32r-desc.h: Regenerated.
638 * m32r-dis.c: Regenerated.
639 * m32r-opc.c: Regenerated.
640 * m32r-opc.h: Regenerated.
641 * m32r-opinst.c: Regenerated.
642 * openrisc-desc.c: Regenerated.
643 * openrisc-desc.h: Regenerated.
644 * openrisc-dis.c: Regenerated.
645 * openrisc-opc.c: Regenerated.
646 * openrisc-opc.h: Regenerated.
647 * xstormy16-desc.c: Regenerated.
648 * xstormy16-desc.h: Regenerated.
649 * xstormy16-dis.c: Regenerated.
650 * xstormy16-opc.c: Regenerated.
651 * xstormy16-opc.h: Regenerated.
652
d6098898
L		 6532005-02-14 H.J. Lu <hongjiu.lu@intel.com>
654
655 * dis-buf.c (perror_memory): Use sprintf_vma to print out
656 address.
657
5a84f3e0
NC		 6582005-02-11 Nick Clifton <nickc@redhat.com>
659
bc18c937
NC		 660 * iq2000-asm.c: Regenerate.
661
5a84f3e0
NC		 662 * frv-dis.c: Regenerate.
663
0a40490e
JB		 6642005-02-07 Jim Blandy <jimb@redhat.com>
665
666 * Makefile.am (CGEN): Load guile.scm before calling the main
667 application script.
668 * Makefile.in: Regenerated.
669 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
670 Simply pass the cgen-opc.scm path to ${cgen} as its first
671 argument; ${cgen} itself now contains the '-s', or whatever is
672 appropriate for the Scheme being used.
673
c46f8c51
AC		 6742005-01-31 Andrew Cagney <cagney@gnu.org>
675
676 * configure: Regenerate to track ../gettext.m4.
677
60b9a617
JB		 6782005-01-31 Jan Beulich <jbeulich@novell.com>
679
680 * ia64-gen.c (NELEMS): Define.
681 (shrink): Generate alias with missing second predicate register when
682 opcode has two outputs and these are both predicates.
683 * ia64-opc-i.c (FULL17): Define.
684 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
685 here to generate output template.
686 (TBITCM, TNATCM): Undefine after use.
687 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
688 first input. Add ld16 aliases without ar.csd as second output. Add
689 st16 aliases without ar.csd as second input. Add cmpxchg aliases
690 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
691 ar.ccv as third/fourth inputs. Consolidate through...
692 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
693 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
694 * ia64-asmtab.c: Regenerate.
695
a53bf506
AC		 6962005-01-27 Andrew Cagney <cagney@gnu.org>
697
698 * configure: Regenerate to track ../gettext.m4 change.
699
90219bd0
AO		 7002005-01-25 Alexandre Oliva <aoliva@redhat.com>
701
702 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
703 * frv-asm.c: Rebuilt.
704 * frv-desc.c: Rebuilt.
705 * frv-desc.h: Rebuilt.
706 * frv-dis.c: Rebuilt.
707 * frv-ibld.c: Rebuilt.
708 * frv-opc.c: Rebuilt.
709 * frv-opc.h: Rebuilt.
710
45181ed1
AC		 7112005-01-24 Andrew Cagney <cagney@gnu.org>
712
713 * configure: Regenerate, ../gettext.m4 was updated.
714
9e836e3d
FF		 7152005-01-21 Fred Fish <fnf@specifixinc.com>
716
717 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
718 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
719 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
720 * mips-dis.c: Ditto.
721
5e8cb021
AM		 7222005-01-20 Alan Modra <amodra@bigpond.net.au>
723
724 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
725
986e18a5
FF		 7262005-01-19 Fred Fish <fnf@specifixinc.com>
727
728 * mips-dis.c (no_aliases): New disassembly option flag.
729 (set_default_mips_dis_options): Init no_aliases to zero.
730 (parse_mips_dis_option): Handle no-aliases option.
731 (print_insn_mips): Ignore table entries that are aliases
732 if no_aliases is set.
733 (print_insn_mips16): Ditto.
734 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
735 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
736 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
737 * mips16-opc.c (mips16_opcodes): Ditto.
738
e38bc3b5
NC		 7392005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
740
741 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
742 (inheritance diagram): Add missing edge.
743 (arch_sh1_up): Rename arch_sh_up to match external name to make life
744 easier for the testsuite.
745 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
746 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 747 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 748 arch_sh2a_or_sh4_up child.
749 (sh_table): Do renaming as above.
750 Correct comment for ldc.l for gas testsuite to read.
751 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
752 Correct comments for movy.w and movy.l for gas testsuite to read.
753 Correct comments for fmov.d and fmov.s for gas testsuite to read.
754
9df48ba9
L		 7552005-01-12 H.J. Lu <hongjiu.lu@intel.com>
756
757 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
758
2033b4b9
L		 7592005-01-12 H.J. Lu <hongjiu.lu@intel.com>
760
761 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
762
0bcb06d2
AS		 7632005-01-10 Andreas Schwab <schwab@suse.de>
764
765 * disassemble.c (disassemble_init_for_target) <case
766 bfd_arch_ia64>: Set skip_zeroes to 16.
767 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
768
47add74d
TL		 7692004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
770
771 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
772
246f4c05
SS		 7732004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
774
775 * avr-dis.c: Prettyprint. Added printing of symbol names in all
776 memory references. Convert avr_operand() to C90 formatting.
777
0e1200e5
TL		 7782004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
779
780 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
781
89a649f7
TL		 7822004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
783
784 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
785 (no_op_insn): Initialize array with instructions that have no
786 operands.
787 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
788
6255809c
RE		 7892004-11-29 Richard Earnshaw <rearnsha@arm.com>
790
791 * arm-dis.c: Correct top-level comment.
792
2fbad815
RE		 7932004-11-27 Richard Earnshaw <rearnsha@arm.com>
794
795 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
796 architecuture defining the insn.
797 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 798 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
799 field.
2fbad815
RE		 800 Also include opcode/arm.h.
801 * Makefile.am (arm-dis.lo): Update dependency list.
802 * Makefile.in: Regenerate.
803
d81acc42
NC		 8042004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
805
806 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
807 reflect the change to the short immediate syntax.
808
ca4f2377
AM		 8092004-11-19 Alan Modra <amodra@bigpond.net.au>
810
5da8bf1b
AM		 811 * or32-opc.c (debug): Warning fix.
812 * po/POTFILES.in: Regenerate.
813
ca4f2377
AM		 814 * maxq-dis.c: Formatting.
815 (print_insn): Warning fix.
816
b7693d02
DJ		 8172004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
818
819 * arm-dis.c (WORD_ADDRESS): Define.
820 (print_insn): Use it. Correct big-endian end-of-section handling.
821
300dac7e
NC		 8222004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
823 Vineet Sharma <vineets@noida.hcltech.com>
824
825 * maxq-dis.c: New file.
826 * disassemble.c (ARCH_maxq): Define.
610ad19b 827 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 828 instructions..
829 * configure.in: Add case for bfd_maxq_arch.
830 * configure: Regenerate.
831 * Makefile.am: Add support for maxq-dis.c
832 * Makefile.in: Regenerate.
833 * aclocal.m4: Regenerate.
834
42048ee7
TL		 8352004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
836
837 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
838 mode.
839 * crx-dis.c: Likewise.
840
bd21e58e
HPN		 8412004-11-04 Hans-Peter Nilsson <hp@axis.com>
842
843 Generally, handle CRISv32.
844 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
845 (struct cris_disasm_data): New type.
846 (format_reg, format_hex, cris_constraint, print_flags)
847 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
848 callers changed.
849 (format_sup_reg, print_insn_crisv32_with_register_prefix)
850 (print_insn_crisv32_without_register_prefix)
851 (print_insn_crisv10_v32_with_register_prefix)
852 (print_insn_crisv10_v32_without_register_prefix)
853 (cris_parse_disassembler_options): New functions.
854 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
855 parameter. All callers changed.
856 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
857 failure.
858 (cris_constraint) <case 'Y', 'U'>: New cases.
859 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
860 for constraint 'n'.
861 (print_with_operands) <case 'Y'>: New case.
862 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
863 <case 'N', 'Y', 'Q'>: New cases.
864 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
865 (print_insn_cris_with_register_prefix)
866 (print_insn_cris_without_register_prefix): Call
867 cris_parse_disassembler_options.
868 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
869 for CRISv32 and the size of immediate operands. New v32-only
870 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
871 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
872 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
873 Change brp to be v3..v10.
874 (cris_support_regs): New vector.
875 (cris_opcodes): Update head comment. New format characters '[',
876 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
877 Add new opcodes for v32 and adjust existing opcodes to accommodate
878 differences to earlier variants.
879 (cris_cond15s): New vector.
880
9306ca4a
JB		 8812004-11-04 Jan Beulich <jbeulich@novell.com>
882
883 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
884 (indirEb): Remove.
885 (Mp): Use f_mode rather than none at all.
886 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
887 replaces what previously was x_mode; x_mode now means 128-bit SSE
888 operands.
889 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
890 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
891 pinsrw's second operand is Edqw.
892 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
893 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
894 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
895 mode when an operand size override is present or always suffixing.
896 More instructions will need to be added to this group.
897 (putop): Handle new macro chars 'C' (short/long suffix selector),
898 'I' (Intel mode override for following macro char), and 'J' (for
899 adding the 'l' prefix to far branches in AT&T mode). When an
900 alternative was specified in the template, honor macro character when
901 specified for Intel mode.
902 (OP_E): Handle new *_mode values. Correct pointer specifications for
903 memory operands. Consolidate output of index register.
904 (OP_G): Handle new *_mode values.
905 (OP_I): Handle const_1_mode.
906 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
907 respective opcode prefix bits have been consumed.
908 (OP_EM, OP_EX): Provide some default handling for generating pointer
909 specifications.
910
f39c96a9
TL		 9112004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
912
913 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
914 COP_INST macro.
915
812337be
TL		 9162004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
917
918 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
919 (getregliststring): Support HI/LO and user registers.
610ad19b 920 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 921 rearrangement done in CRX opcode header file.
922 (crx_regtab): Likewise.
923 (crx_optab): Likewise.
610ad19b 924 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 925 formats.
926 support new Co-Processor instruction 'cpi'.
927
4030fa5a
NC		 9282004-10-27 Nick Clifton <nickc@redhat.com>
929
930 * opcodes/iq2000-asm.c: Regenerate.
931 * opcodes/iq2000-desc.c: Regenerate.
932 * opcodes/iq2000-desc.h: Regenerate.
933 * opcodes/iq2000-dis.c: Regenerate.
934 * opcodes/iq2000-ibld.c: Regenerate.
935 * opcodes/iq2000-opc.c: Regenerate.
936 * opcodes/iq2000-opc.h: Regenerate.
937
fc3d45e8
TL		 9382004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
939
940 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
941 us4, us5 (respectively).
942 Remove unsupported 'popa' instruction.
943 Reverse operands order in store co-processor instructions.
944
3c55da70
AM		 9452004-10-15 Alan Modra <amodra@bigpond.net.au>
946
947 * Makefile.am: Run "make dep-am"
948 * Makefile.in: Regenerate.
949
7fa3d080
BW		 9502004-10-12 Bob Wilson <bob.wilson@acm.org>
951
952 * xtensa-dis.c: Use ISO C90 formatting.
953
e612bb4d
AM		 9542004-10-09 Alan Modra <amodra@bigpond.net.au>
955
956 * ppc-opc.c: Revert 2004-09-09 change.
957
43cd72b9
BW		 9582004-10-07 Bob Wilson <bob.wilson@acm.org>
959
960 * xtensa-dis.c (state_names): Delete.
961 (fetch_data): Use xtensa_isa_maxlength.
962 (print_xtensa_operand): Replace operand parameter with opcode/operand
963 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
964 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
965 instruction bundles. Use xmalloc instead of malloc.
966
bbac1f2a
NC		 9672004-10-07 David Gibson <david@gibson.dropbear.id.au>
968
969 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
970 initializers.
971
48c9f030
NC		 9722004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
973
974 * crx-opc.c (crx_instruction): Support Co-processor insns.
975 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
976 (getregliststring): Change function to use the above enum.
977 (print_arg): Handle CO-Processor insns.
978 (crx_cinvs): Add 'b' option to invalidate the branch-target
979 cache.
980
12c64a4e
AH		 9812004-10-06 Aldy Hernandez <aldyh@redhat.com>
982
983 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
984 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
985 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
986 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
987 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
988
14127cc4
NC		 9892004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
990
991 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
992 rather than add it.
993
0dd132b6
NC		 9942004-09-30 Paul Brook <paul@codesourcery.com>
995
996 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
997 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
998
3f85e526
L		 9992004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1000
1001 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1002 (CONFIG_STATUS_DEPENDENCIES): New.
1003 (Makefile): Removed.
1004 (config.status): Likewise.
1005 * Makefile.in: Regenerated.
1006
8ae85421
AM		 10072004-09-17 Alan Modra <amodra@bigpond.net.au>
1008
1009 * Makefile.am: Run "make dep-am".
1010 * Makefile.in: Regenerate.
1011 * aclocal.m4: Regenerate.
1012 * configure: Regenerate.
1013 * po/POTFILES.in: Regenerate.
1014 * po/opcodes.pot: Regenerate.
1015
24443139
AS		 10162004-09-11 Andreas Schwab <schwab@suse.de>
1017
1018 * configure: Rebuild.
1019
2a309db0
AM		 10202004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1021
1022 * ppc-opc.c (L): Make this field not optional.
1023
42851540
NC		 10242004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1025
1026 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1027 Fix parameter to 'm[t|f]csr' insns.
1028
979273e3
NN		 10292004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1030
1031 * configure.in: Autoupdate to autoconf 2.59.
1032 * aclocal.m4: Rebuild with aclocal 1.4p6.
1033 * configure: Rebuild with autoconf 2.59.
1034 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1035 bfd changes for autoconf 2.59 on the way).
1036 * config.in: Rebuild with autoheader 2.59.
1037
ac28a1cb
RS		 10382004-08-27 Richard Sandiford <rsandifo@redhat.com>
1039
1040 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1041
30d1c836
ML		 10422004-07-30 Michal Ludvig <mludvig@suse.cz>
1043
1044 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1045 (GRPPADLCK2): New define.
1046 (twobyte_has_modrm): True for 0xA6.
1047 (grps): GRPPADLCK2 for opcode 0xA6.
1048
0b0ac059
AO		 10492004-07-29 Alexandre Oliva <aoliva@redhat.com>
1050
1051 Introduce SH2a support.
1052 * sh-opc.h (arch_sh2a_base): Renumber.
1053 (arch_sh2a_nofpu_base): Remove.
1054 (arch_sh_base_mask): Adjust.
1055 (arch_opann_mask): New.
1056 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1057 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1058 (sh_table): Adjust whitespace.
1059 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1060 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1061 instruction list throughout.
1062 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1063 of arch_sh2a in instruction list throughout.
1064 (arch_sh2e_up): Accomodate above changes.
1065 (arch_sh2_up): Ditto.
1066 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1067 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1068 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1069 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1070 * sh-opc.h (arch_sh2a_nofpu): New.
1071 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1072 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1073 instruction.
1074 2004-01-20 DJ Delorie <dj@redhat.com>
1075 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1076 2003-12-29 DJ Delorie <dj@redhat.com>
1077 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1078 sh_opcode_info, sh_table): Add sh2a support.
1079 (arch_op32): New, to tag 32-bit opcodes.
1080 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1081 2003-12-02 Michael Snyder <msnyder@redhat.com>
1082 * sh-opc.h (arch_sh2a): Add.
1083 * sh-dis.c (arch_sh2a): Handle.
1084 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1085
670ec21d
NC		 10862004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1087
1088 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1089
ed049af3
NC		 10902004-07-22 Nick Clifton <nickc@redhat.com>
1091
1092 PR/280
1093 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1094 insns - this is done by objdump itself.
1095 * h8500-dis.c (print_insn_h8500): Likewise.
1096
20f0a1fc
NC		 10972004-07-21 Jan Beulich <jbeulich@novell.com>
1098
1099 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1100 regardless of address size prefix in effect.
1101 (ptr_reg): Size or address registers does not depend on rex64, but
1102 on the presence of an address size override.
1103 (OP_MMX): Use rex.x only for xmm registers.
1104 (OP_EM): Use rex.z only for xmm registers.
1105
6f14957b
MR		 11062004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1107
1108 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1109 move/branch operations to the bottom so that VR5400 multimedia
1110 instructions take precedence in disassembly.
1111
1586d91e
MR		 11122004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1113
1114 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1115 ISA-specific "break" encoding.
1116
982de27a
NC		 11172004-07-13 Elvis Chiang <elvisfb@gmail.com>
1118
1119 * arm-opc.h: Fix typo in comment.
1120
4300ab10
AS		 11212004-07-11 Andreas Schwab <schwab@suse.de>
1122
1123 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1124
8577e690
AS		 11252004-07-09 Andreas Schwab <schwab@suse.de>
1126
1127 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1128
1fe1f39c
NC		 11292004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1130
1131 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1132 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1133 (crx-dis.lo): New target.
1134 (crx-opc.lo): Likewise.
1135 * Makefile.in: Regenerate.
1136 * configure.in: Handle bfd_crx_arch.
1137 * configure: Regenerate.
1138 * crx-dis.c: New file.
1139 * crx-opc.c: New file.
1140 * disassemble.c (ARCH_crx): Define.
1141 (disassembler): Handle ARCH_crx.
1142
7a33b495
JW		 11432004-06-29 James E Wilson <wilson@specifixinc.com>
1144
1145 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1146 * ia64-asmtab.c: Regnerate.
1147
98e69875
AM		 11482004-06-28 Alan Modra <amodra@bigpond.net.au>
1149
1150 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1151 (extract_fxm): Don't test dialect.
1152 (XFXFXM_MASK): Include the power4 bit.
1153 (XFXM): Add p4 param.
1154 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1155
a53b85e2
AO		 11562004-06-27 Alexandre Oliva <aoliva@redhat.com>
1157
1158 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1159 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1160
d0618d1c
AM		 11612004-06-26 Alan Modra <amodra@bigpond.net.au>
1162
1163 * ppc-opc.c (BH, XLBH_MASK): Define.
1164 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1165
1d9f512f
AM		 11662004-06-24 Alan Modra <amodra@bigpond.net.au>
1167
1168 * i386-dis.c (x_mode): Comment.
1169 (two_source_ops): File scope.
1170 (float_mem): Correct fisttpll and fistpll.
1171 (float_mem_mode): New table.
1172 (dofloat): Use it.
1173 (OP_E): Correct intel mode PTR output.
1174 (ptr_reg): Use open_char and close_char.
1175 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1176 operands. Set two_source_ops.
1177
52886d70
AM		 11782004-06-15 Alan Modra <amodra@bigpond.net.au>
1179
1180 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1181 instead of _raw_size.
1182
bad9ceea
JJ		 11832004-06-08 Jakub Jelinek <jakub@redhat.com>
1184
1185 * ia64-gen.c (in_iclass): Handle more postinc st
1186 and ld variants.
1187 * ia64-asmtab.c: Rebuilt.
1188
0451f5df
MS		 11892004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1190
1191 * s390-opc.txt: Correct architecture mask for some opcodes.
1192 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1193 in the esa mode as well.
1194
f6f9408f
JR		 11952004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1196
1197 * sh-dis.c (target_arch): Make unsigned.
1198 (print_insn_sh): Replace (most of) switch with a call to
1199 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1200 * sh-opc.h: Redefine architecture flags values.
1201 Add sh3-nommu architecture.
1202 Reorganise <arch>_up macros so they make more visual sense.
1203 (SH_MERGE_ARCH_SET): Define new macro.
1204 (SH_VALID_BASE_ARCH_SET): Likewise.
1205 (SH_VALID_MMU_ARCH_SET): Likewise.
1206 (SH_VALID_CO_ARCH_SET): Likewise.
1207 (SH_VALID_ARCH_SET): Likewise.
1208 (SH_MERGE_ARCH_SET_VALID): Likewise.
1209 (SH_ARCH_SET_HAS_FPU): Likewise.
1210 (SH_ARCH_SET_HAS_DSP): Likewise.
1211 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1212 (sh_get_arch_from_bfd_mach): Add prototype.
1213 (sh_get_arch_up_from_bfd_mach): Likewise.
1214 (sh_get_bfd_mach_from_arch_set): Likewise.
1215 (sh_merge_bfd_arc): Likewise.
1216
be8c092b
NC		 12172004-05-24 Peter Barada <peter@the-baradas.com>
1218
1219 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1220 into new match_insn_m68k function. Loop over canidate
1221 matches and select first that completely matches.
be8c092b
NC		 1222 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1223 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1224 to verify addressing for MAC/EMAC.
be8c092b
NC		 1225 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1226 reigster halves since 'fpu' and 'spl' look misleading.
1227 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1228 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1229 first, tighten up match masks.
1230 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1231 'size' from special case code in print_insn_m68k to
1232 determine decode size of insns.
1233
a30e9cc4
AM		 12342004-05-19 Alan Modra <amodra@bigpond.net.au>
1235
1236 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1237 well as when -mpower4.
1238
9598fbe5
NC		 12392004-05-13 Nick Clifton <nickc@redhat.com>
1240
1241 * po/fr.po: Updated French translation.
1242
6b6e92f4
NC		 12432004-05-05 Peter Barada <peter@the-baradas.com>
1244
1245 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1246 variants in arch_mask. Only set m68881/68851 for 68k chips.
1247 * m68k-op.c: Switch from ColdFire chips to core variants.
1248
a404d431
AM		 12492004-05-05 Alan Modra <amodra@bigpond.net.au>
1250
a30e9cc4 1251 PR 147.
a404d431
AM		 1252 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1253
f3806e43
BE		 12542004-04-29 Ben Elliston <bje@au.ibm.com>
1255
520ceea4
BE		 1256 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1257 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1258
1f1799d5
KK		 12592004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1260
1261 * sh-dis.c (print_insn_sh): Print the value in constant pool
1262 as a symbol if it looks like a symbol.
1263
fd99574b
NC		 12642004-04-22 Peter Barada <peter@the-baradas.com>
1265
1266 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1267 appropriate ColdFire architectures.
1268 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1269 mask addressing.
1270 Add EMAC instructions, fix MAC instructions. Remove
1271 macmw/macml/msacmw/msacml instructions since mask addressing now
1272 supported.
1273
b4781d44
JJ		 12742004-04-20 Jakub Jelinek <jakub@redhat.com>
1275
1276 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1277 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1278 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1279 macro. Adjust all users.
1280
91809fda 12812004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1282
91809fda
NC		 1283 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1284 separately.
1285
f4453dfa
NC		 12862004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1287
1288 * m32r-asm.c: Regenerate.
1289
9b0de91a
SS		 12902004-03-29 Stan Shebs <shebs@apple.com>
1291
1292 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1293 used.
1294
e20c0b3d
AM		 12952004-03-19 Alan Modra <amodra@bigpond.net.au>
1296
1297 * aclocal.m4: Regenerate.
1298 * config.in: Regenerate.
1299 * configure: Regenerate.
1300 * po/POTFILES.in: Regenerate.
1301 * po/opcodes.pot: Regenerate.
1302
fdd12ef3
AM		 13032004-03-16 Alan Modra <amodra@bigpond.net.au>
1304
1305 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1306 PPC_OPERANDS_GPR_0.
1307 * ppc-opc.c (RA0): Define.
1308 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1309 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1310 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1311
2dc111b3 13122004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1313
1314 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1315
7bfeee7b
AM		 13162004-03-15 Alan Modra <amodra@bigpond.net.au>
1317
1318 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1319
7ffdda93
ML		 13202004-03-12 Michal Ludvig <mludvig@suse.cz>
1321
1322 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1323 (grps): Delete GRPPLOCK entry.
7ffdda93 1324
cc0ec051
AM		 13252004-03-12 Alan Modra <amodra@bigpond.net.au>
1326
1327 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1328 (M, Mp): Use OP_M.
1329 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1330 (GRPPADLCK): Define.
1331 (dis386): Use NOP_Fixup on "nop".
1332 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1333 (twobyte_has_modrm): Set for 0xa7.
1334 (padlock_table): Delete. Move to..
1335 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1336 and clflush.
1337 (print_insn): Revert PADLOCK_SPECIAL code.
1338 (OP_E): Delete sfence, lfence, mfence checks.
1339
4fd61dcb
JJ		 13402004-03-12 Jakub Jelinek <jakub@redhat.com>
1341
1342 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1343 (INVLPG_Fixup): New function.
1344 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1345
0f10071e
ML		 13462004-03-12 Michal Ludvig <mludvig@suse.cz>
1347
1348 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1349 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1350 (padlock_table): New struct with PadLock instructions.
1351 (print_insn): Handle PADLOCK_SPECIAL.
1352
c02908d2
AM		 13532004-03-12 Alan Modra <amodra@bigpond.net.au>
1354
1355 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1356 (OP_E): Twiddle clflush to sfence here.
1357
d5bb7600
NC		 13582004-03-08 Nick Clifton <nickc@redhat.com>
1359
1360 * po/de.po: Updated German translation.
1361
ae51a426
JR		 13622003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1363
1364 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1365 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1366 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1367 accordingly.
1368
676a64f4
RS		 13692004-03-01 Richard Sandiford <rsandifo@redhat.com>
1370
1371 * frv-asm.c: Regenerate.
1372 * frv-desc.c: Regenerate.
1373 * frv-desc.h: Regenerate.
1374 * frv-dis.c: Regenerate.
1375 * frv-ibld.c: Regenerate.
1376 * frv-opc.c: Regenerate.
1377 * frv-opc.h: Regenerate.
1378
c7a48b9a
RS		 13792004-03-01 Richard Sandiford <rsandifo@redhat.com>
1380
1381 * frv-desc.c, frv-opc.c: Regenerate.
1382
8ae0baa2
RS		 13832004-03-01 Richard Sandiford <rsandifo@redhat.com>
1384
1385 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1386
ce11586c
JR		 13872004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1388
1389 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1390 Also correct mistake in the comment.
1391
6a5709a5
JR		 13922004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1393
1394 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1395 ensure that double registers have even numbers.
1396 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1397 that reserved instruction 0xfffd does not decode the same
1398 as 0xfdfd (ftrv).
1399 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1400 REG_N refers to a double register.
1401 Add REG_N_B01 nibble type and use it instead of REG_NM
1402 in ftrv.
1403 Adjust the bit patterns in a few comments.
1404
e5d2b64f 14052004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1406
1407 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1408
1f04b05f
AH		 14092004-02-20 Aldy Hernandez <aldyh@redhat.com>
1410
1411 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1412
2f3b8700
AH		 14132004-02-20 Aldy Hernandez <aldyh@redhat.com>
1414
1415 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1416
f0b26da6 14172004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1418
1419 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1420 mtivor32, mtivor33, mtivor34.
f0b26da6 1421
23d59c56 14222004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1423
1424 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1425
34920d91
NC		 14262004-02-10 Petko Manolov <petkan@nucleusys.com>
1427
1428 * arm-opc.h Maverick accumulator register opcode fixes.
1429
44d86481
BE		 14302004-02-13 Ben Elliston <bje@wasabisystems.com>
1431
1432 * m32r-dis.c: Regenerate.
1433
17707c23
MS		 14342004-01-27 Michael Snyder <msnyder@redhat.com>
1435
1436 * sh-opc.h (sh_table): "fsrra", not "fssra".
1437
fe3a9bc4
NC		 14382004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1439
1440 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1441 contraints.
1442
ff24f124
JJ		 14432004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1444
1445 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1446
a02a862a
AM		 14472004-01-19 Alan Modra <amodra@bigpond.net.au>
1448
1449 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1450 1. Don't print scale factor on AT&T mode when index missing.
1451
d164ea7f
AO		 14522004-01-16 Alexandre Oliva <aoliva@redhat.com>
1453
1454 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1455 when loaded into XR registers.
1456
cb10e79a
RS		 14572004-01-14 Richard Sandiford <rsandifo@redhat.com>
1458
1459 * frv-desc.h: Regenerate.
1460 * frv-desc.c: Regenerate.
1461 * frv-opc.c: Regenerate.
1462
f532f3fa
MS		 14632004-01-13 Michael Snyder <msnyder@redhat.com>
1464
1465 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1466
e45d0630
PB		 14672004-01-09 Paul Brook <paul@codesourcery.com>
1468
1469 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1470 specific opcodes.
1471
3ba7a1aa
DJ		 14722004-01-07 Daniel Jacobowitz <drow@mvista.com>
1473
1474 * Makefile.am (libopcodes_la_DEPENDENCIES)
1475 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1476 comment about the problem.
1477 * Makefile.in: Regenerate.
1478
ba2d3f07
AO		 14792004-01-06 Alexandre Oliva <aoliva@redhat.com>
1480
1481 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1482 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1483 cut&paste errors in shifting/truncating numerical operands.
1484 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1485 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1486 (parse_uslo16): Likewise.
1487 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1488 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1489 (parse_s12): Likewise.
1490 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1491 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1492 (parse_uslo16): Likewise.
1493 (parse_uhi16): Parse gothi and gotfuncdeschi.
1494 (parse_d12): Parse got12 and gotfuncdesc12.
1495 (parse_s12): Likewise.
1496
3ab48931
NC		 14972004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1498
1499 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1500 instruction which looks similar to an 'rla' instruction.
a0bd404e 1501
c9e214e5 1502For older changes see ChangeLog-0203
252b5132
RH		 1503\f
1504Local Variables:
2f6d2f85
NC		 1505mode: change-log
1506left-margin: 8
1507fill-column: 74
252b5132
RH		 1508version-control: never
1509End:
GDB Binutils - Deliverables
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