[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>

	From  Robin Getz  <robin.getz@analog.com>
	* bfin-dis.c (bu32): Typedef.
	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	(constant_formats[]): Add uimm32 and huimm16.
	(fmtconst_val): New.
	(uimm32): Define.
	(huimm32): Define.
	(imm16_val): Define.
	(luimm16_val): Define.
	(struct saved_state): Define.
	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	(get_allreg): New.
	(decode_LDIMMhalf_0): Print out the whole register value.

	From Jie Zhang  <jie.zhang@analog.com>
	* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
	multiply and multiply-accumulate to data register instruction.

	* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
	c_imm32, c_huimm32e): Define.
	(constant_formats): Add flags for printing decimal, leading spaces, and
	exact symbols.
	(comment, parallel): Add global flags in all disassembly.
	(fmtconst): Take advantage of new flags, and print default in hex.
	(fmtconst_val): Likewise.
	(decode_macfunc): Be consistant with spaces, tabs, comments,
	capitalization in disassembly, fix minor coding style issues.
	(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
	(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
	decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
	decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
	decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
	decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
	decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
	decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
	decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
	_print_insn_bfin, print_insn_bfin): Likewise.

2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* aclocal.m4: Regenerate.
	* configure: Likewise.
	* Makefile.in: Likewise.

2008-03-13  Alan Modra  <amodra@bigpond.net.au>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

	* cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

	PR binutils/5524
	* configure.in (SHARED_LIBADD): Select the correct host specific
	file extension for shared libraries.
	* configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

	* mips-dis.c: Update copyright.
	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

	* ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	From Miod Vallat.

For older changes see ChangeLog-2007
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
b21c9cb4 BS	1	2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
	2
	3	From Robin Getz <robin.getz@analog.com>
	4	* bfin-dis.c (bu32): Typedef.
	5	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	6	(constant_formats[]): Add uimm32 and huimm16.
	7	(fmtconst_val): New.
	8	(uimm32): Define.
	9	(huimm32): Define.
	10	(imm16_val): Define.
	11	(luimm16_val): Define.
	12	(struct saved_state): Define.
	13	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	14	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	15	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	16	(get_allreg): New.
	17	(decode_LDIMMhalf_0): Print out the whole register value.
	18
ee171c8f BS	19	From Jie Zhang <jie.zhang@analog.com>
	20	* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
	21	multiply and multiply-accumulate to data register instruction.
	22
086134ec BS	23	* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
	24	c_imm32, c_huimm32e): Define.
	25	(constant_formats): Add flags for printing decimal, leading spaces, and
	26	exact symbols.
	27	(comment, parallel): Add global flags in all disassembly.
	28	(fmtconst): Take advantage of new flags, and print default in hex.
	29	(fmtconst_val): Likewise.
	30	(decode_macfunc): Be consistant with spaces, tabs, comments,
	31	capitalization in disassembly, fix minor coding style issues.
	32	(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
	33	(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
	34	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
	35	decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
	36	decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
	37	decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
	38	decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
	39	decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
	40	decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
	41	decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
	42	_print_insn_bfin, print_insn_bfin): Likewise.
	43
58c85be7 RW	44	2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	45
	46	* aclocal.m4: Regenerate.
	47	* configure: Likewise.
	48	* Makefile.in: Likewise.
	49
50e7d84b AM	50	2008-03-13 Alan Modra <amodra@bigpond.net.au>
	51
	52	* Makefile.am: Run "make dep-am".
	53	* Makefile.in: Regenerate.
	54	* configure: Regenerate.
	55
de866fcc AM	56	2008-03-07 Alan Modra <amodra@bigpond.net.au>
	57
	58	* ppc-opc.c (powerpc_opcodes): Order and format.
	59
28dbc079 L	60	2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
	61
	62	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	63	* i386-tbl.h: Regenerated.
	64
849830bd L	65	2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
	66
	67	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	68	x86-64.
	69	* i386-tbl.h: Regenerated.
	70
743ddb6b JB	71	2008-02-21 Jan Beulich <jbeulich@novell.com>
	72
	73	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	74	and Fword for far indirect jmp. Allow Reg16 and Word for near
	75	indirect jmp on x86-64. Disallow Fword for lcall.
	76	* i386-tbl.h: Re-generate.
	77
796d5313 NC	78	2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
	79
	80	* cr16-opc.c (cr16_num_optab): Defined
	81
65da13b5 L	82	2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
	83
	84	* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	85	* i386-init.h: Regenerated.
	86
0e336180 NC	87	2008-02-14 Nick Clifton <nickc@redhat.com>
	88
	89	PR binutils/5524
	90	* configure.in (SHARED_LIBADD): Select the correct host specific
	91	file extension for shared libraries.
	92	* configure: Regenerate.
	93
b7240065 JB	94	2008-02-13 Jan Beulich <jbeulich@novell.com>
	95
	96	* i386-opc.h (RegFlat): New.
	97	* i386-reg.tbl (flat): Add.
	98	* i386-tbl.h: Re-generate.
	99
34b772a6 JB	100	2008-02-13 Jan Beulich <jbeulich@novell.com>
	101
	102	* i386-dis.c (a_mode): New.
	103	(cond_jump_mode): Adjust.
	104	(Ma): Change to a_mode.
	105	(intel_operand_size): Handle a_mode.
	106	* i386-opc.tbl: Allow Dword and Qword for bound.
	107	* i386-tbl.h: Re-generate.
	108
a60de03c JB	109	2008-02-13 Jan Beulich <jbeulich@novell.com>
	110
	111	* i386-gen.c (process_i386_registers): Process new fields.
	112	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	113	unsigned char. Add dw2_regnum and Dw2Inval.
	114	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	115	register names.
	116	* i386-tbl.h: Re-generate.
	117
f03fe4c1 L	118	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
f03fe4c1 L	119
4b6bc8eb	120	* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
f03fe4c1 L	121	* i386-init.h: Updated.
f03fe4c1 L	122
475a2301 L	123	2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
	124
	125	* i386-gen.c (cpu_flags): Add CpuXsave.
	126
	127	* i386-opc.h (CpuXsave): New.
4b6bc8eb	128	(CpuLM): Updated.
475a2301 L	129	(i386_cpu_flags): Add cpuxsave.
	130
	131	* i386-dis.c (MOD_0FAE_REG_4): New.
	132	(RM_0F01_REG_2): Likewise.
	133	(MOD_0FAE_REG_5): Updated.
	134	(RM_0F01_REG_3): Likewise.
	135	(reg_table): Use MOD_0FAE_REG_4.
	136	(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
	137	for xrstor.
	138	(rm_table): Add RM_0F01_REG_2.
	139
	140	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	141	* i386-init.h: Regenerated.
	142	* i386-tbl.h: Likewise.
	143
595785c6	144	2008-02-11 Jan Beulich <jbeulich@novell.com>
041179fc	145
595785c6 JB	146	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	147	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	148	* i386-tbl.h: Re-generate.
	149
bb8541b9 L	150	2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
	151
	152	PR 5715
	153	* configure: Regenerated.
	154
57b592a3 AN	155	2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
	156
	157	* mips-dis.c: Update copyright.
	158	(mips_arch_choices): Add Octeon.
	159	* mips-opc.c: Update copyright.
	160	(IOCT): New macro.
	161	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
	162
930bb4cf AM	163	2008-01-29 Alan Modra <amodra@bigpond.net.au>
	164
	165	* ppc-opc.c: Support optional L form mtmsr.
	166
82c18208 L	167	2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
	168
	169	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
	170
599121aa L	171	2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
	172
	173	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	174	* i386-init.h: Regenerated.
	175
80098f51 TG	176	2008-01-23 Tristan Gingold <gingold@adacore.com>
	177
	178	* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
	179	ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
	180
115c7c25 L	181	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	182
	183	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	184	(cpu_flags): Likewise.
	185
	186	* i386-opc.h (CpuMMX2): Removed.
	187	(CpuSSE): Updated.
	188
	189	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE\|Cpu3dnowA.
	190	* i386-init.h: Regenerated.
	191	* i386-tbl.h: Likewise.
	192
6305a203 L	193	2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
	194
	195	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	196	CPU_SMX_FLAGS.
	197	* i386-init.h: Regenerated.
	198
fd07a1c8 L	199	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	200
	201	* i386-opc.tbl: Use Qword on movddup.
	202	* i386-tbl.h: Regenerated.
	203
321fd21e L	204	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	205
	206	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	207	* i386-tbl.h: Regenerated.
	208
4ee52178 L	209	2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
	210
	211	* i386-dis.c (Mx): New.
	212	(PREFIX_0FC3): Likewise.
	213	(PREFIX_0FC7_REG_6): Updated.
	214	(dis386_twobyte): Use PREFIX_0FC3.
	215	(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
	216	Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
	217	movntss.
	218
5c07affc L	219	2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
	220
	221	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	222	(operand_types): Add Mem.
	223
	224	* i386-opc.h (IntelSyntax): New.
	225	* i386-opc.h (Mem): New.
	226	(Byte): Updated.
	227	(Opcode_Modifier_Max): Updated.
	228	(i386_opcode_modifier): Add intelsyntax.
	229	(i386_operand_type): Add mem.
	230
	231	* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
	232	instructions.
	233
	234	* i386-reg.tbl: Add size for accumulator.
	235
	236	* i386-init.h: Regenerated.
	237	* i386-tbl.h: Likewise.
	238
0d6a2f58 L	239	2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
	240
	241	* i386-opc.h (Byte): Fix a typo.
	242
7d5e4556 L	243	2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
	244
	245	PR gas/5534
	246	* i386-gen.c (operand_type_init): Add Dword to
	247	OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
	248	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	249	Qword and Xmmword.
	250	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	251	Xmmword, Unspecified and Anysize.
	252	(set_bitfield): Make Mmword an alias of Qword. Make Oword
	253	an alias of Xmmword.
	254
	255	* i386-opc.h (CheckSize): Removed.
	256	(Byte): Updated.
	257	(Word): Likewise.
	258	(Dword): Likewise.
	259	(Qword): Likewise.
	260	(Xmmword): Likewise.
	261	(FWait): Updated.
	262	(OTMax): Likewise.
	263	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	264	qword and xmmword.
	265	(Fword): New.
	266	(TBYTE): Likewise.
	267	(Unspecified): Likewise.
	268	(Anysize): Likewise.
	269	(i386_operand_type): Add byte, word, dword, fword, qword,
	270	tbyte xmmword, unspecified and anysize.
	271
	272	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	273	Tbyte, Xmmword, Unspecified and Anysize.
	274
	275	* i386-reg.tbl: Add size for accumulator.
	276
	277	* i386-init.h: Regenerated.
	278	* i386-tbl.h: Likewise.
	279
b5b1fc4f L	280	2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
	281
	282	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	283	(REG_0F18): Updated.
	284	(reg_table): Updated.
	285	(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
	286	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
	287
50e8458f L	288	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	289
	290	* i386-gen.c (set_bitfield): Use fail () on error.
	291
3d4d5afa L	292	2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
	293
	294	* i386-gen.c (lineno): New.
	295	(filename): Likewise.
	296	(set_bitfield): Report filename and line numer on error.
	297	(process_i386_opcodes): Set filename and update lineno.
	298	(process_i386_registers): Likewise.
	299
e1d4d893 L	300	2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
	301
	302	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	303	ATTSyntax.
	304
	305	* i386-opc.h (IntelMnemonic): Renamed to ..
	306	(ATTSyntax): This
	307	(Opcode_Modifier_Max): Updated.
	308	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	309	and intelsyntax.
	310
	311	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	312	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	313	* i386-tbl.h: Regenerated.
	314
6f143e4d L	315	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	316
	317	* i386-gen.c: Update copyright to 2008.
	318	* i386-opc.h: Likewise.
	319	* i386-opc.tbl: Likewise.
	320
	321	* i386-init.h: Regenerated.
	322	* i386-tbl.h: Likewise.
	323
c6add537 L	324	2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
	325
	326	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	327	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	328	* i386-tbl.h: Regenerated.
	329
3629bb00 L	330	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	331
	332	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	333	CpuSSE4_2_Or_ABM.
	334	(cpu_flags): Likewise.
	335
	336	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	337	(CpuSSE4_2_Or_ABM): Likewise.
	338	(CpuLM): Updated.
	339	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
	340
	341	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	342	Cpu686\|CpuPadLock with CpuSSE4_1\|CpuSSE5, CpuABM\|CpuSSE4_2
	343	and CpuPadLock, respectively.
	344	* i386-init.h: Regenerated.
	345	* i386-tbl.h: Likewise.
	346
24995bd6 L	347	2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
	348
	349	* i386-gen.c (opcode_modifiers): Remove No_xSuf.
	350
	351	* i386-opc.h (No_xSuf): Removed.
	352	(CheckSize): Updated.
	353
	354	* i386-tbl.h: Regenerated.
	355
e0329a22 L	356	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	357
	358	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	359	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	360	CPU_SSE5_FLAGS.
	361	(cpu_flags): Add CpuSSE4_2_Or_ABM.
	362
	363	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	364	(CpuLM): Updated.
	365	(i386_cpu_flags): Add cpusse4_2_or_abm.
	366
	367	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	368	CpuABM\|CpuSSE4_2 on popcnt.
	369	* i386-init.h: Regenerated.
	370	* i386-tbl.h: Likewise.
	371
f2a9c676 L	372	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	373
	374	* i386-opc.h: Update comments.
	375
d978b5be L	376	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	377
	378	* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	379	* i386-opc.h: Likewise.
	380	* i386-opc.tbl: Likewise.
	381
582d5edd L	382	2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
	383
	384	PR gas/5534
	385	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	386	Byte, Word, Dword, QWord and Xmmword.
	387
	388	* i386-opc.h (No_xSuf): New.
	389	(CheckSize): Likewise.
	390	(Byte): Likewise.
	391	(Word): Likewise.
	392	(Dword): Likewise.
	393	(QWord): Likewise.
	394	(Xmmword): Likewise.
	395	(FWait): Updated.
	396	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	397	Dword, QWord and Xmmword.
	398
	399	* i386-opc.tbl: Add CheckSize\|QWord to movq if IgnoreSize is
	400	used.
	401	* i386-tbl.h: Regenerated.
	402
3fe15143 MK	403	2008-01-02 Mark Kettenis <kettenis@gnu.org>
	404
	405	* m88k-dis.c (instructions): Fix fcvt.* instructions.
	406	From Miod Vallat.
	407
6c7ac64e	408	For older changes see ChangeLog-2007
252b5132 RH	409	\f
252b5132 RH	410	Local Variables:
2f6d2f85 NC	411	mode: change-log
	412	left-margin: 8
	413	fill-column: 74
252b5132 RH	414	version-control: never
252b5132 RH	415	End: