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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
09a2c6cf
L		 12007-06-23 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR binutils/4667
4 * i386-dis.c (EX): Removed.
5 (EMd): New.
6 (EMq): Likewise.
7 (EXd): Likewise.
8 (EXq): Likewise.
9 (EXx): Likewise.
10 (PREGRP93...PREGRP97): Likewise.
11 (dis386_twobyte): Updated.
12 (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
13 (OP_EX): Remove Intel syntax handling.
14
ddefa7f5
KH		 152007-06-18 Nathan Sidwell <nathan@codesourcery.com>
16
17 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
18
79887925
L		 192007-06-14 H.J. Lu <hongjiu.lu@intel.com>
20
21 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
22
23 * acinclude.m4: Removed.
24
25 * Makefile.in: Regenerated.
26 * doc/Makefile.in: Likewise.
27 * aclocal.m4: Likewise.
28 * configure: Likewise.
29
79d49516
PB		 302007-06-05 Paul Brook <paul@codesourcery.com>
31
32 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
33
37ad9514
SE		 342007-05-24 Steve Ellcey <sje@cup.hp.com>
35
36 * Makefile.in: Regnerate.
37 * configure: Regenerate.
38 * aclocal.m4: Regenerate.
39
65b650b4
AM		 402007-05-18 Alan Modra <amodra@bigpond.net.au>
41
42 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
43 after setting skip_optional.
44
ea192fa3
PB		 452007-05-16 Peter Bergner <bergner@vnet.ibm.com>
46
47 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
48 (print_insn_powerpc): Use the new operand_value_powerpc and
49 skip_optional_operands functions to omit or print all optional
50 operands as a group.
51 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
52 (XFL_MASK): Delete L and W bits from the mask.
53 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
54 with XWRA_MASK. Use W.
55 (mtfsf, mtfsf.): Use XFL_L and W.
56
9beff690
L		 572007-05-14 H.J. Lu <hongjiu.lu@intel.com>
58
59 PR binutils/4502
60 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
61
4d67a4d3
L		 622007-05-10 H.J. Lu <hongjiu.lu@intel.com>
63
64 * i386-opc.h (ShortForm): Redefined.
65 (Jump): Likewise.
66 (JumpDword): Likewise.
67 (JumpByte): Likewise.
68 (JumpInterSegment): Likewise.
69 (FloatMF): Likewise.
70 (FloatR): Likewise.
71 (FloatD): Likewise.
72 (Size16): Likewise.
73 (Size32): Likewise.
74 (Size64): Likewise.
75 (IgnoreSize): Likewise.
76 (DefaultSize): Likewise.
77 (No_bSuf): Likewise.
78 (No_wSuf): Likewise.
79 (No_lSuf): Likewise.
80 (No_sSuf): Likewise.
81 (No_qSuf): Likewise.
82 (No_xSuf): Likewise.
83 (FWait): Likewise.
84 (IsString): Likewise.
85 (regKludge): Likewise.
86 (IsPrefix): Likewise.
87 (ImmExt): Likewise.
88 (NoRex64): Likewise.
89 (Rex64): Likewise.
90 (Ugh): Likewise.
91
8de28984
L		 922007-05-07 H.J. Lu <hongjiu.lu@intel.com>
93
94 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
95 for some SSE4 instructions.
96 (threebyte_0x3a_uses_DATA_prefix): Likewise.
97
20592a94
L		 982007-05-03 H.J. Lu <hongjiu.lu@intel.com>
99
100 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
101
102 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
103 type for crc32.
104
9344ff29
L		 1052007-05-01 H.J. Lu <hongjiu.lu@intel.com>
106
107 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
108 check data size prefix in 16bit mode.
109
110 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
111 support Intel mode.
112
53289dcd 1132007-04-30 Mark Salter <msalter@redhat.com>
65b650b4 114
53289dcd
MS		 115 * frv-desc.c: Regenerate.
116 * frv-desc.h: Regenerate.
65b650b4 117
eb42fac1
AM		 1182007-04-30 Alan Modra <amodra@bigpond.net.au>
119
120 PR 4436
121 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
122
484c222e
L		 1232007-04-27 H.J. Lu <hongjiu.lu@intel.com>
124
125 * i386-dis.c (modrm): Put reg before rm.
126
5d669648
L		 1272007-04-26 H.J. Lu <hongjiu.lu@intel.com>
128
129 PR binutils/4430
130 * i386-dis.c (print_displacement): New.
131 (OP_E): Call print_displacement instead of print_operand_value
132 to output displacement when either base or index exist. Print
133 the explicit zero displacement in 16bit mode.
134
185b1163
L		 1352007-04-26 H.J. Lu <hongjiu.lu@intel.com>
136
137 PR binutils/4429
138 * i386-dis.c (print_insn): Also swap the order of op_riprel
139 when swapping op_index. Break when the RIP relative address
140 is printed.
141 (OP_E): Properly handle RIP relative addressing and print the
142 explicit zero displacement for Intel mode.
143
eddc20ad
AM		 1442007-04-27 Alan Modra <amodra@bigpond.net.au>
145
146 * Makefile.am: Run "make dep-am".
147 * Makefile.in: Regenerate.
148 * ns32k-dis.c: Include sysdep.h first.
149
dacc8b01
MS		 1502007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
151
152 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
153 opcode.
eddc20ad
AM		 154 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
155
fbb92301
NC		 1562007-04-24 Nick Clifton <nickc@redhat.com>
157
158 * arm-dis.c (print_insn): Initialise type.
159
4c273957
AM		 1602007-04-24 Alan Modra <amodra@bigpond.net.au>
161
162 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
163 * Makefile.am: Run "make dep-am".
164 * Makefile.in: Regenerate.
165
9a2e615a
NS		 1662007-04-23 Nathan Sidwell <nathan@codesourcery.com>
167
168 * m68k-opc.c: Mark mcfisa_c instructions.
169
37b37b2d
RE		 1702007-04-21 Richard Earnshaw <rearnsha@arm.com>
171
172 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
173 (thumb_opcodes): Add missing white space in adr.
65b650b4 174 (arm_decode_shift): New parameter, print_shift. Only decode the
37b37b2d
RE		 175 shift parameter if set. Adjust callers.
176 (print_insn_arm): Support for operand type q with no shift decode.
177
717bbdf1
AM		 1782007-04-21 Alan Modra <amodra@bigpond.net.au>
179
db557034
AM		 180 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
181 Move contents to..
182 (i386_regtab): ..here.
183 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
184
717bbdf1
AM		 185 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
186 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
187 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
188 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
189
78336706
NS		 1902007-04-20 Nathan Sidwell <nathan@codesourcery.com>
191
192 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
193 rambar1.
194
b84bf58a
AM		 1952007-04-20 Alan Modra <amodra@bigpond.net.au>
196
197 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
198 change.
199 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
200 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
201 references to following deleted functions.
202 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
203 (insert_ds, extract_ds, insert_de, extract_de): Delete.
204 (insert_des, extract_des, insert_li, extract_li): Delete.
205 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
206 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
207 (num_powerpc_operands): New constant.
208 (XSPRG_MASK): Remove entire SPRG field.
209 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
210
0bbdef92
AM		 2112007-04-20 Alan Modra <amodra@bigpond.net.au>
212
213 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
214 (Z2_MASK): Define.
215 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
216
86ad2a13
RE		 2172007-04-20 Richard Earnshaw <rearnsha@arm.com>
218
219 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
220 being disassembled.
221
a33e055d
AM		 2222007-04-19 Alan Modra <amodra@bigpond.net.au>
223
224 * Makefile.am: Run "make dep-am".
225 * Makefile.in: Regenerate.
226 * po/POTFILES.in: Regenerate.
227
360b1600
AM		 2282007-04-19 Alan Modra <amodra@bigpond.net.au>
229
230 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
231 db10cyc, db12cyc, db16cyc.
232
b20ae55e
AM		 2332007-04-19 Nathan Froyd <froydnj@codesourcery.com>
234
235 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
236
381d071f
L		 2372007-04-18 H.J. Lu <hongjiu.lu@intel.com>
238
239 * i386-dis.c (CRC32_Fixup): New.
240 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
241 PREGRP91): New.
242 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
243 (threebyte_0x3a_uses_DATA_prefix): Likewise.
244 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
245 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
246 (three_byte_table): Likewise.
247
248 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
249
f6fdceb7 250 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 251 (CpuSSE4): Likewise.
252 (CpuUnknownFlags): Add CpuSSE4_2.
253
42903f7f
L		 2542007-04-18 H.J. Lu <hongjiu.lu@intel.com>
255
256 * i386-dis.c (XMM_Fixup): New.
257 (Edqb): New.
258 (Edqd): New.
259 (XMM0): New.
260 (dqb_mode): New.
261 (dqd_mode): New.
262 (PREGRP39 ... PREGRP85): New.
263 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
264 (threebyte_0x3a_uses_DATA_prefix): Likewise.
265 (prefix_user_table): Add PREGRP39 ... PREGRP85.
266 (three_byte_table): Likewise.
267 (putop): Handle 'K'.
268 (intel_operand_size): Handle dqb_mode, dqd_mode):
269 (OP_E): Likewise.
270 (OP_G): Likewise.
271
272 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
273
274 * i386-opc.h (CpuSSE4_1): New.
275 (CpuUnknownFlags): Add CpuSSE4_1.
276 (regKludge): Update comment.
277
ee5c21a0
DJ		 2782007-04-18 Matthias Klose <doko@ubuntu.com>
279
280 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
281 * Makefile.in: Regenerate.
282
b7d19ba6
SE		 2832007-04-14 Steve Ellcey <sje@cup.hp.com>
284
285 * Makefile.am: Add ACLOCAL_AMFLAGS.
286 * Makefile.in: Regenerate.
287
246c51aa
L		 2882007-04-13 H.J. Lu <hongjiu.lu@intel.com>
289
290 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 291 * i386-opc.c: Likewise.
292 * i386-opc.h: Likewise.
246c51aa 293
7967e09e
L		 2942007-04-11 H.J. Lu <hongjiu.lu@intel.com>
295
296 PR binutils/4333
297 * i386-dis.c (GRP1a): New.
298 (GRP1b ... GRPPADLCK2): Update index.
299 (dis386): Use GRP1a for entry 0x8f.
300 (mod, rm, reg): Removed. Replaced by ...
301 (modrm): This.
302 (grps): Add GRP1a.
303
56dc1f8a
KH		 3042007-04-09 Kazu Hirata <kazu@codesourcery.com>
305
306 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
307 info->print_address_func if longjmp is called.
308
144f4bc6
DD		 3092007-03-29 DJ Delorie <dj@redhat.com>
310
311 * m32c-desc.c: Regenerate.
312 * m32c-dis.c: Regenerate.
313 * m32c-opc.c: Regenerate.
314
e72cf3ec
L		 3152007-03-28 H.J. Lu <hongjiu.lu@intel.com>
316
317 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
318 movq. Remove InvMem from sldt, smsw and str.
319
320 * i386-opc.h (InvMem): Renamed to ...
321 (RegMem): Update comments.
322 (AnyMem): Remove InvMem.
323
831480e9 3242007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 325
b74ed8f5
PB		 326 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
327
4146fd53
PB		 3282007-03-24 Paul Brook <paul@codesourcery.com>
329
330 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
331 (print_insn_coprocessor): Handle %<bitfield>x.
332
b6702015 3332007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 334 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 335
336 * arm-dis.c (arm_opcodes): Print SRS base register.
337
831480e9 3382007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 339
340 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
341
342 * i386-opc.c (i386_optab): Add rex.wrxb.
343
831480e9 3442007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 345
346 * i386-dis.c (REX_MODE64): Remove definition.
347 (REX_EXTX): Likewise.
348 (REX_EXTY): Likewise.
349 (REX_EXTZ): Likewise.
350 (USED_REX): Use REX_OPCODE instead of 0x40.
351 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
352 REX_R, REX_X and REX_B respectively.
353
831480e9 3542007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 355
356 PR binutils/4218
357 * i386-dis.c (PREGRP38): New.
358 (dis386): Use PREGRP38 for 0x90.
359 (prefix_user_table): Add PREGRP38.
360 (print_insn): Set uses_REPZ_prefix to 1 for pause.
361 (NOP_Fixup1): Properly handle REX bits.
362 (NOP_Fixup2): Likewise.
363
364 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
365 Allow register with nop.
366
75b06e7b
DD		 3672007-03-20 DJ Delorie <dj@redhat.com>
368
369 * m32c-asm.c: Regenerate.
370 * m32c-desc.c: Regenerate.
371 * m32c-desc.h: Regenerate.
372 * m32c-dis.h: Regenerate.
373 * m32c-ibld.c: Regenerate.
374 * m32c-opc.c: Regenerate.
375 * m32c-opc.h: Regenerate.
376
c3fe08fa
L		 3772007-03-15 H.J. Lu <hongjiu.lu@intel.com>
378
379 * i386-opc.c: Include "libiberty.h".
380 (i386_regtab): Remove the last entry.
381 (i386_regtab_size): New.
382 (i386_float_regtab_size): Likewise.
383
384 * i386-opc.h (i386_regtab_size): New.
385 (i386_float_regtab_size): Likewise.
386
0b1cf022
L		 3872007-03-15 H.J. Lu <hongjiu.lu@intel.com>
388
389 * Makefile.am (CFILES): Add i386-opc.c.
390 (ALL_MACHINES): Add i386-opc.lo.
391 Run "make dep-am".
392 * Makefile.in: Regenerated.
393
394 * configure.in: Add i386-opc.lo for bfd_i386_arch.
395 * configure: Regenerated.
396
397 * i386-dis.c: Include "opcode/i386.h".
398 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
399 (FWAIT_OPCODE): Remove definition.
400 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
401 (MAX_OPERANDS): Remove definition.
402
403 * i386-opc.c: New file.
404 * i386-opc.h: Likewise.
405
56eced12
L		 4062007-03-15 H.J. Lu <hongjiu.lu@intel.com>
407
408 * Makefile.in: Regenerated.
409
6f74c397
L		 4102007-03-09 H.J. Lu <hongjiu.lu@intel.com>
411
412 * i386-dis.c (OP_Rd): Renamed to ...
413 (OP_R): This.
414 (Rd): Updated.
415 (Rm): Likewise.
416
a6d04ec4
AM		 4172007-03-08 Alan Modra <amodra@bigpond.net.au>
418
1620f33d
AM		 419 * fr30-asm.c: Regenerate.
420 * frv-asm.c: Regenerate.
421 * ip2k-asm.c: Regenerate.
422 * iq2000-asm.c: Regenerate.
423 * m32c-asm.c: Regenerate.
424 * m32r-asm.c: Regenerate.
425 * m32r-dis.c: Regenerate.
426 * mt-asm.c: Regenerate.
427 * mt-ibld.c: Regenerate.
428 * mt-opc.c: Regenerate.
429 * openrisc-asm.c: Regenerate.
430 * xc16x-asm.c: Regenerate.
431 * xstormy16-asm.c: Regenerate.
432
a6d04ec4
AM		 433 * Makefile.am: Run "make dep-am".
434 * Makefile.in: Regenerate.
435 * po/POTFILES.in: Regenerate.
436
b5639b37
MS		 4372007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
438
439 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
440 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
441 instruction formats added.
442 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
443 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
444 masks added.
445 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
446 instructions added.
447 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
448 (main): z9-ec cpu type option added.
449 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
450
b2e818b7
DD		 4512007-02-22 DJ Delorie <dj@redhat.com>
452
453 * s390-opc.c (INSTR_SS_L2RDRD): New.
454 (MASK_SS_L2RDRD): New.
455 * s390-opc.txt (pka): Use it.
456
8b082fb1
TS		 4572007-02-20 Thiemo Seufer <ths@mips.com>
458 Chao-Ying Fu <fu@mips.com>
459
460 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
461 (print_insn_args): Add support for balign instruction.
462 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
463 (mips_builtin_opcodes): Add DSP R2 instructions.
464
929e4d1a
MS		 4652007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
466
467 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
468 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
469 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
470 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
471
b8e55848
MS		 4722007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
473
474 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
475 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
476 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
477 and sfpc.
478
af692060
NC		 4792007-02-16 Nick Clifton <nickc@redhat.com>
480
481 PR binutils/4045
482 * avr-dis.c (comment_start): New variable, contains the prefix to
483 use when printing addresses in comments.
484 (print_insn_avr): Set comment_start to an empty space if there is
485 no symbol table available as the generic address printing code
486 will prefix the numeric value of the address with 0x.
487
ce518a5f
L		 4882007-02-13 H.J. Lu <hongjiu.lu@intel.com>
489
490 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
491 in struct dis386.
492
bd2f2e55 4932007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 494 Richard Sandiford <rsandifo@redhat.com>
495 DJ Delorie <dj@redhat.com>
496 Graydon Hoare <graydon@redhat.com>
497 Frank Ch. Eigler <fche@redhat.com>
498 Ben Elliston <bje@redhat.com>
499
500 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
501 (CFILES): Add mep-*.c
502 (ALL_MACHINES): Add mep-*.lo.
503 (CLEANFILES): Add stamp-mep.
504 (CGEN_CPUS): Add mep.
505 (MEP_DEPS): New variable.
506 (mep-*): New targets.
507 * configure.in: Handle bfd_mep_arch.
508 * disassemble.c (ARCH_mep): New macro.
509 (disassembler): Handle bfd_arch_mep.
510 (disassemble_init_for_target): Likewise.
511 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 512 * Makefile.in: Regenerated.
513 * configure: Regenerated.
514
eb7834a6 5152007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 516
517 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
518 wrap around within the same segment in 16bit mode.
519
eb7834a6 5202007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 521
522 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
523 prefix.
524
c4f5c3d7
L		 5252007-02-02 H.J. Lu <hongjiu.lu@intel.com>
526
527 * avr-dis.c (avr_operand): Correct PR number in comment.
528
fc523535 5292007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 530
531 * disassemble.c (disassembler_usage): Call
532 print_i386_disassembler_options for i386 disassembler.
533
534 * i386-dis.c (print_i386_disassembler_options): New.
535 (print_insn): Support the new addr64 option.
536
64a3a6fc
NC		 5372007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
538
539 * ppc-dis.c (powerpc_dialect): Handle ppc440.
540 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
541 be used.
542
ba4e851b
AM		 5432007-02-02 Alan Modra <amodra@bigpond.net.au>
544
545 * ppc-opc.c (insert_bdm): -Many comment.
546 (valid_bo): Add "extract" param. Accept both powerpc and power4
547 BO fields when disassembling with -Many.
548 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
549
3bdcfdf4
KH		 5502007-01-08 Kazu Hirata <kazu@codesourcery.com>
551
552 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
553 cpu32 | fido_a except on tbl instructions.
554
a028a6f5
PB		 5552007-01-04 Paul Brook <paul@codesourcery.com>
556
557 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
558
baee4c9e
AS		 5592007-01-04 Andreas Schwab <schwab@suse.de>
560
561 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
562
62ac925e
JB		 5632007-01-04 Julian Brown <julian@codesourcery.com>
564
565 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
566 vqrshl instructions.
567
10a2343e 568For older changes see ChangeLog-2006
252b5132
RH		 569\f
570Local Variables:
2f6d2f85
NC		 571mode: change-log
572left-margin: 8
573fill-column: 74
252b5132
RH		 574version-control: never
575End:
GDB Binutils - Deliverables
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