[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>

	* or1k-desc.c: Regenerated.
	* or1k-desc.h: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opc.h: Likewise.
	* or1k-opinst.c: Likewise.

2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
	(I34): New define.
	(I36): New define.
	(I66): New define.
	(I68): New define.
	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(parse_mips_dis_option): Update MSA and virtualization support to
	allow mips64r3 and mips64r5. 

2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-opc.c (G3): Remove I4.

2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/16893
	* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
	(end_codep): Likewise.
	(mandatory_prefix): Likewise.
	(active_seg_prefix): Likewise.
	(ckprefix): Set active_seg_prefix to the active segment register
	prefix.
	(seg_prefix): Removed.
	(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
	for prefix index.  Ignore the index if it is invalid and the
	mandatory prefix isn't required.
	(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
	mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
	in used_prefixes here.  Don't print unused prefixes.  Check
	active_seg_prefix for the active segment register prefix.
	Restore the DFLAG bit in sizeflag if the data size prefix is
	unused.  Check the unused mandatory PREFIX_XXX prefixes
	(append_seg): Only print the segment register which gets used.
	(OP_E_memory): Check active_seg_prefix for the segment register
	prefix.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.

2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/16886
	* config.in: Regenerated.
	* configure: Likewise.
	* configure.in: Check if sigsetjmp is available.
	* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
	* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
	* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
	* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
	(OPCODES_SIGSETJMP): Likewise.
	(OPCODES_SIGLONGJMP): Likewise.
	* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
	* xtensa-dis.c (dis_private): Replace jmp_buf with
	OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
	* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.

2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/16891
	* i386-dis.c (print_insn): Handle prefixes before fwait.

2014-04-26  Alan Modra  <amodra@gmail.com>

	* po/POTFILES.in: Regenerate.

2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
	to allow the MIPS XPA ASE.
	(parse_mips_dis_option): Process the -Mxpa option.
	* mips-opc.c (XPA): New define.
	(mips_builtin_opcodes): Add MIPS XPA instructions and move the
	locations of the ctc0 and cfc0 instructions.

2014-04-22  Christian Svensson  <blue@cmd.nu>

	* Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
	* configure.in: Likewise.
	* disassemble.c: Likewise.
	* or1k-asm.c: New file.
	* or1k-desc.c: New file.
	* or1k-desc.h: New file.
	* or1k-dis.c: New file.
	* or1k-ibld.c: New file.
	* or1k-opc.c: New file.
	* or1k-opc.h: New file.
	* or1k-opinst.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* openrisc-asm.c: Delete.
	* openrisc-desc.c: Delete.
	* openrisc-desc.h: Delete.
	* openrisc-dis.c: Delete.
	* openrisc-ibld.c: Delete.
	* openrisc-opc.c: Delete.
	* openrisc-opc.h: Delete.
	* or32-dis.c: Delete.
	* or32-opc.c: Delete.

2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-dis.c (rm_table): Add encls, enclu.
	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
	(cpu_flags): Add CpuSE1.
	* i386-opc.h (enum): Add CpuSE1.
	(i386_cpu_flags): Add cpuse1.
	* i386-opc.tbl: Add encls, enclu.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2014-04-02  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
	instructions, sex.b and sex.s.

2014-03-26  Jiong Wang  <jiong.wang@arm.com>

	* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
	instructions.

2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
	vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
	vscatterqps.
	* i386-tbl.h: Regenerate.

2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
	%hstick_enable added.

2014-03-19  Nick Clifton  <nickc@redhat.com>

	* rx-decode.opc (bwl): Allow for bogus instructions with a size
	field of 3.
	(sbwl, ubwl, SCALE): Likewise.
	* rx-decode.c: Regenerate.

2014-03-12  Alan Modra  <amodra@gmail.com>

	* Makefile.in: Regenerate.

2014-03-05  Alan Modra  <amodra@gmail.com>

	Update copyright years.

2014-03-04  Heiher  <r@hev.cc>

	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.

2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>

	* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
	so that they come after the Loongson extensions.

2014-03-03  Alan Modra  <amodra@gmail.com>

	* i386-gen.c (process_copyright): Emit copyright notice on one line.

2014-02-28  Alan Modra  <amodra@gmail.com>

	* msp430-decode.c: Regenerate.

2014-02-27  Jiong Wang  <jiong.wang@arm.com>

	* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
	FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.

2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-opc.c (print_register_offset_address): Call
	get_int_reg_name to prepare the register name.

2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-opc.tbl: Remove wrong variant of vcvtps2ph
	* i386-tbl.h: Regenerate.

2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
	(cpu_flags): Add CpuPREFETCHWT1.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuPREFETCHWT1): New.
	(i386_cpu_flags): Add cpuprefetchwt1.
	* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
	* i386-tbl.h: Regenerate.

2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
	to CpuAVX512F.
	* i386-tbl.h: Regenerate.

2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (output_cpu_flags): Don't output trailing space.
	(output_opcode_modifier): Likewise.
	(output_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
	MOD_0FC7_REG_5.
	(PREFIX enum): Add PREFIX_0FAE_REG_7.
	(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
	(prefix_table): Add clflusopt.
	(mod_table): Add xrstors, xsavec, xsaves.
	* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
	CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
	(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
	* i386-init.h: Regenerate.
	* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
	xsaves64, xsavec, xsavec64.
	* i386-tbl.h: Regenerate.

2014-02-10  Alan Modra  <amodra@gmail.com>

	* po/POTFILES.in: Regenerate.
	* po/opcodes.pot: Regenerate.

2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
	    Jan Beulich  <jbeulich@suse.com>

	PR binutils/16490
	* i386-dis.c (OP_E_memory): Fix shift computation for
	vex_vsib_q_w_dq_mode.

2014-01-09  Bradley Nelson  <bradnelson@google.com>
	    Roland McGrath  <mcgrathr@google.com>

	* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
	last_rex_prefix is -1.

2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_copyright): Update copyright year to 2014.

2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>

	* nds32-asm.c (parse_operand): Fix out-of-range integer constant.

For older changes see ChangeLog-2013
\f
Copyright (C) 2014 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
999b995d SK	1	2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
	2
	3	* or1k-desc.c: Regenerated.
	4	* or1k-desc.h: Likewise.
	5	* or1k-opc.c: Likewise.
	6	* or1k-opc.h: Likewise.
	7	* or1k-opinst.c: Likewise.
	8
ae52f483 AB	9	2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
	10
	11	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
	12	(I34): New define.
	13	(I36): New define.
	14	(I66): New define.
	15	(I68): New define.
	16	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
	17	mips64r5.
	18	(parse_mips_dis_option): Update MSA and virtualization support to
	19	allow mips64r3 and mips64r5.
	20
f7730599 AB	21	2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
	22
	23	* mips-opc.c (G3): Remove I4.
	24
285ca992 L	25	2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
	26
	27	PR binutils/16893
	28	* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
	29	(end_codep): Likewise.
	30	(mandatory_prefix): Likewise.
	31	(active_seg_prefix): Likewise.
	32	(ckprefix): Set active_seg_prefix to the active segment register
	33	prefix.
	34	(seg_prefix): Removed.
	35	(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
	36	for prefix index. Ignore the index if it is invalid and the
	37	mandatory prefix isn't required.
	38	(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
	39	mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
	40	in used_prefixes here. Don't print unused prefixes. Check
	41	active_seg_prefix for the active segment register prefix.
	42	Restore the DFLAG bit in sizeflag if the data size prefix is
	43	unused. Check the unused mandatory PREFIX_XXX prefixes
	44	(append_seg): Only print the segment register which gets used.
	45	(OP_E_memory): Check active_seg_prefix for the segment register
	46	prefix.
	47	(OP_OFF): Likewise.
	48	(OP_OFF64): Likewise.
	49	(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
	50
8df14d78 L	51	2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
	52
	53	PR binutils/16886
	54	* config.in: Regenerated.
	55	* configure: Likewise.
	56	* configure.in: Check if sigsetjmp is available.
	57	* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	58	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	59	(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
	60	* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	61	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	62	(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
	63	* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	64	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	65	(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
	66	* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
	67	(OPCODES_SIGSETJMP): Likewise.
	68	(OPCODES_SIGLONGJMP): Likewise.
	69	* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	70	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	71	(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
	72	* xtensa-dis.c (dis_private): Replace jmp_buf with
	73	OPCODES_SIGJMP_BUF.
	74	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	75	(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
	76	* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
	77	(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
	78	(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
	79
86a80a50 L	80	2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
	81
	82	PR binutils/16891
	83	* i386-dis.c (print_insn): Handle prefixes before fwait.
	84
a9e18c6a AM	85	2014-04-26 Alan Modra <amodra@gmail.com>
	86
	87	* po/POTFILES.in: Regenerate.
	88
7d64c587 AB	89	2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
	90
	91	* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
	92	to allow the MIPS XPA ASE.
	93	(parse_mips_dis_option): Process the -Mxpa option.
	94	* mips-opc.c (XPA): New define.
	95	(mips_builtin_opcodes): Add MIPS XPA instructions and move the
	96	locations of the ctc0 and cfc0 instructions.
	97
73589c9d CS	98	2014-04-22 Christian Svensson <blue@cmd.nu>
	99
	100	* Makefile.am: Remove openrisc and or32 support. Add support for or1k.
	101	* configure.in: Likewise.
	102	* disassemble.c: Likewise.
	103	* or1k-asm.c: New file.
	104	* or1k-desc.c: New file.
	105	* or1k-desc.h: New file.
	106	* or1k-dis.c: New file.
	107	* or1k-ibld.c: New file.
	108	* or1k-opc.c: New file.
	109	* or1k-opc.h: New file.
	110	* or1k-opinst.c: New file.
	111	* Makefile.in: Regenerate.
	112	* configure: Regenerate.
	113	* openrisc-asm.c: Delete.
	114	* openrisc-desc.c: Delete.
	115	* openrisc-desc.h: Delete.
	116	* openrisc-dis.c: Delete.
	117	* openrisc-ibld.c: Delete.
	118	* openrisc-opc.c: Delete.
	119	* openrisc-opc.h: Delete.
	120	* or32-dis.c: Delete.
	121	* or32-opc.c: Delete.
	122
2cf200a4 IT	123	2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
	124
	125	* i386-dis.c (rm_table): Add encls, enclu.
	126	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
	127	(cpu_flags): Add CpuSE1.
	128	* i386-opc.h (enum): Add CpuSE1.
	129	(i386_cpu_flags): Add cpuse1.
	130	* i386-opc.tbl: Add encls, enclu.
	131	* i386-init.h: Regenerated.
	132	* i386-tbl.h: Likewise.
	133
31c981bc AG	134	2014-04-02 Anthony Green <green@moxielogic.com>
	135
	136	* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
	137	instructions, sex.b and sex.s.
	138
76dfed02 YZ	139	2014-03-26 Jiong Wang <jiong.wang@arm.com>
	140
	141	* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
	142	instructions.
	143
5fc35d96 IT	144	2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
	145
	146	* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
	147	vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
	148	vscatterqps.
	149	* i386-tbl.h: Regenerate.
	150
ec92c392 JM	151	2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
	152
	153	* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
	154	%hstick_enable added.
	155
b8985e5c NC	156	2014-03-19 Nick Clifton <nickc@redhat.com>
	157
	158	* rx-decode.opc (bwl): Allow for bogus instructions with a size
	159	field of 3.
b41c812c	160	(sbwl, ubwl, SCALE): Likewise.
b8985e5c NC	161	* rx-decode.c: Regenerate.
b8985e5c NC	162
fa47fa92 AM	163	2014-03-12 Alan Modra <amodra@gmail.com>
	164
	165	* Makefile.in: Regenerate.
	166
4b95cf5c AM	167	2014-03-05 Alan Modra <amodra@gmail.com>
	168
	169	Update copyright years.
	170
cd0c81e9	171	2014-03-04 Heiher <r@hev.cc>
4ba154f5 RS	172
	173	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
	174
079b5aec RS	175	2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
	176
	177	* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
	178	so that they come after the Loongson extensions.
	179
2c80b753 AM	180	2014-03-03 Alan Modra <amodra@gmail.com>
	181
	182	* i386-gen.c (process_copyright): Emit copyright notice on one line.
	183
b721f1fa AM	184	2014-02-28 Alan Modra <amodra@gmail.com>
	185
	186	* msp430-decode.c: Regenerate.
	187
f17c8bfc YZ	188	2014-02-27 Jiong Wang <jiong.wang@arm.com>
	189
	190	* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
	191	FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
	192
a58549dd YZ	193	2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
	194
	195	* aarch64-opc.c (print_register_offset_address): Call
	196	get_int_reg_name to prepare the register name.
	197
d6e9dd78 IT	198	2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
	199
	200	* i386-opc.tbl: Remove wrong variant of vcvtps2ph
	201	* i386-tbl.h: Regenerate.
	202
	203	2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
dcf893b5 IT	204
	205	* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
	206	(cpu_flags): Add CpuPREFETCHWT1.
	207	* i386-init.h: Regenerate.
	208	* i386-opc.h (CpuPREFETCHWT1): New.
	209	(i386_cpu_flags): Add cpuprefetchwt1.
	210	* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
	211	* i386-tbl.h: Regenerate.
	212
957d0955 IT	213	2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
	214
	215	* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
	216	to CpuAVX512F.
	217	* i386-tbl.h: Regenerate.
	218
10632b79 L	219	2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
	220
	221	* i386-gen.c (output_cpu_flags): Don't output trailing space.
	222	(output_opcode_modifier): Likewise.
	223	(output_operand_type): Likewise.
	224	* i386-init.h: Regenerated.
	225	* i386-tbl.h: Likewise.
	226
963f3586 IT	227	2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
	228
	229	* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
	230	MOD_0FC7_REG_5.
	231	(PREFIX enum): Add PREFIX_0FAE_REG_7.
	232	(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
	233	(prefix_table): Add clflusopt.
	234	(mod_table): Add xrstors, xsavec, xsaves.
	235	* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
	236	CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
	237	(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
	238	* i386-init.h: Regenerate.
	239	* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
	240	xsaves64, xsavec, xsavec64.
	241	* i386-tbl.h: Regenerate.
	242
c1c69e83 AM	243	2014-02-10 Alan Modra <amodra@gmail.com>
	244
	245	* po/POTFILES.in: Regenerate.
	246	* po/opcodes.pot: Regenerate.
	247
eaa9d1ad MZ	248	2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
	249	Jan Beulich <jbeulich@suse.com>
	250
	251	PR binutils/16490
	252	* i386-dis.c (OP_E_memory): Fix shift computation for
	253	vex_vsib_q_w_dq_mode.
	254
e2e6193d RM	255	2014-01-09 Bradley Nelson <bradnelson@google.com>
	256	Roland McGrath <mcgrathr@google.com>
	257
	258	* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
	259	last_rex_prefix is -1.
	260
221fd5d5 L	261	2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
	262
	263	* i386-gen.c (process_copyright): Update copyright year to 2014.
	264
b0b0c9fc MR	265	2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
	266
	267	* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
	268
5fb776a6	269	For older changes see ChangeLog-2013
252b5132	270	\f
5fb776a6	271	Copyright (C) 2014 Free Software Foundation, Inc.
752937aa NC	272
	273	Copying and distribution of this file, with or without modification,
	274	are permitted in any medium without royalty provided the copyright
	275	notice and this notice are preserved.
	276
252b5132	277	Local Variables:
2f6d2f85 NC	278	mode: change-log
	279	left-margin: 8
	280	fill-column: 74
252b5132 RH	281	version-control: never
252b5132 RH	282	End: