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Fix the mask for the sqrdml(a|s)h instructions.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
10bba94b
TC		 12018-04-25 Tamar Christina <tamar.christina@arm.com>
2
3 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
4
c48935d7
IT		 52018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
6
7 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
8 PREFIX_0F1C.
9 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
10 (cpu_flags): Add CpuCLDEMOTE.
11 * i386-init.h: Regenerate.
12 * i386-opc.h (enum): Add CpuCLDEMOTE,
13 (i386_cpu_flags): Add cpucldemote.
14 * i386-opc.tbl: Add cldemote.
15 * i386-tbl.h: Regenerate.
16
211dc24b
AM		 172018-04-16 Alan Modra <amodra@gmail.com>
18
19 * Makefile.am: Remove sh5 and sh64 support.
20 * configure.ac: Likewise.
21 * disassemble.c: Likewise.
22 * disassemble.h: Likewise.
23 * sh-dis.c: Likewise.
24 * sh64-dis.c: Delete.
25 * sh64-opc.c: Delete.
26 * sh64-opc.h: Delete.
27 * Makefile.in: Regenerate.
28 * configure: Regenerate.
29 * po/POTFILES.in: Regenerate.
30
a9a4b302
AM		 312018-04-16 Alan Modra <amodra@gmail.com>
32
33 * Makefile.am: Remove w65 support.
34 * configure.ac: Likewise.
35 * disassemble.c: Likewise.
36 * disassemble.h: Likewise.
37 * w65-dis.c: Delete.
38 * w65-opc.h: Delete.
39 * Makefile.in: Regenerate.
40 * configure: Regenerate.
41 * po/POTFILES.in: Regenerate.
42
04cb01fd
AM		 432018-04-16 Alan Modra <amodra@gmail.com>
44
45 * configure.ac: Remove we32k support.
46 * configure: Regenerate.
47
c2bf1eec
AM		 482018-04-16 Alan Modra <amodra@gmail.com>
49
50 * Makefile.am: Remove m88k support.
51 * configure.ac: Likewise.
52 * disassemble.c: Likewise.
53 * disassemble.h: Likewise.
54 * m88k-dis.c: Delete.
55 * Makefile.in: Regenerate.
56 * configure: Regenerate.
57 * po/POTFILES.in: Regenerate.
58
6793974d
AM		 592018-04-16 Alan Modra <amodra@gmail.com>
60
61 * Makefile.am: Remove i370 support.
62 * configure.ac: Likewise.
63 * disassemble.c: Likewise.
64 * disassemble.h: Likewise.
65 * i370-dis.c: Delete.
66 * i370-opc.c: Delete.
67 * Makefile.in: Regenerate.
68 * configure: Regenerate.
69 * po/POTFILES.in: Regenerate.
70
e82aa794
AM		 712018-04-16 Alan Modra <amodra@gmail.com>
72
73 * Makefile.am: Remove h8500 support.
74 * configure.ac: Likewise.
75 * disassemble.c: Likewise.
76 * disassemble.h: Likewise.
77 * h8500-dis.c: Delete.
78 * h8500-opc.h: Delete.
79 * Makefile.in: Regenerate.
80 * configure: Regenerate.
81 * po/POTFILES.in: Regenerate.
82
fceadf09
AM		 832018-04-16 Alan Modra <amodra@gmail.com>
84
85 * configure.ac: Remove tahoe support.
86 * configure: Regenerate.
87
ae1d3843
L		 882018-04-15 H.J. Lu <hongjiu.lu@intel.com>
89
90 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
91 umwait.
92 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
93 64-bit mode.
94 * i386-tbl.h: Regenerated.
95
de89d0a3
IT		 962018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
97
98 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
99 PREFIX_MOD_1_0FAE_REG_6.
100 (va_mode): New.
101 (OP_E_register): Use va_mode.
102 * i386-dis-evex.h (prefix_table):
103 New instructions (see prefixes above).
104 * i386-gen.c (cpu_flag_init): Add WAITPKG.
105 (cpu_flags): Likewise.
106 * i386-opc.h (enum): Likewise.
107 (i386_cpu_flags): Likewise.
108 * i386-opc.tbl: Add umonitor, umwait, tpause.
109 * i386-init.h: Regenerate.
110 * i386-tbl.h: Likewise.
111
a8eb42a8
AM		 1122018-04-11 Alan Modra <amodra@gmail.com>
113
114 * opcodes/i860-dis.c: Delete.
115 * opcodes/i960-dis.c: Delete.
116 * Makefile.am: Remove i860 and i960 support.
117 * configure.ac: Likewise.
118 * disassemble.c: Likewise.
119 * disassemble.h: Likewise.
120 * Makefile.in: Regenerate.
121 * configure: Regenerate.
122 * po/POTFILES.in: Regenerate.
123
caf0678c
L		 1242018-04-04 H.J. Lu <hongjiu.lu@intel.com>
125
126 PR binutils/23025
127 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
128 to 0.
129 (print_insn): Clear vex instead of vex.evex.
130
4fb0d2b9
NC		 1312018-04-04 Nick Clifton <nickc@redhat.com>
132
133 * po/es.po: Updated Spanish translation.
134
c39e5b26
JB		 1352018-03-28 Jan Beulich <jbeulich@suse.com>
136
137 * i386-gen.c (opcode_modifiers): Delete VecESize.
138 * i386-opc.h (VecESize): Delete.
139 (struct i386_opcode_modifier): Delete vecesize.
140 * i386-opc.tbl: Drop VecESize.
141 * i386-tlb.h: Re-generate.
142
8e6e0792
JB		 1432018-03-28 Jan Beulich <jbeulich@suse.com>
144
145 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
146 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
147 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
148 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
149 * i386-tlb.h: Re-generate.
150
9f123b91
JB		 1512018-03-28 Jan Beulich <jbeulich@suse.com>
152
153 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
154 Fold AVX512 forms
155 * i386-tlb.h: Re-generate.
156
9646c87b
JB		 1572018-03-28 Jan Beulich <jbeulich@suse.com>
158
159 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
160 (vex_len_table): Drop Y for vcvt*2si.
161 (putop): Replace plain 'Y' handling by abort().
162
c8d59609
NC		 1632018-03-28 Nick Clifton <nickc@redhat.com>
164
165 PR 22988
166 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
167 instructions with only a base address register.
168 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
169 handle AARHC64_OPND_SVE_ADDR_R.
170 (aarch64_print_operand): Likewise.
171 * aarch64-asm-2.c: Regenerate.
172 * aarch64_dis-2.c: Regenerate.
173 * aarch64-opc-2.c: Regenerate.
174
b8c169f3
JB		 1752018-03-22 Jan Beulich <jbeulich@suse.com>
176
177 * i386-opc.tbl: Drop VecESize from register only insn forms and
178 memory forms not allowing broadcast.
179 * i386-tlb.h: Re-generate.
180
96bc132a
JB		 1812018-03-22 Jan Beulich <jbeulich@suse.com>
182
183 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
184 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
185 sha256*): Drop Disp<N>.
186
9f79e886
JB		 1872018-03-22 Jan Beulich <jbeulich@suse.com>
188
189 * i386-dis.c (EbndS, bnd_swap_mode): New.
190 (prefix_table): Use EbndS.
191 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
192 * i386-opc.tbl (bndmov): Move misplaced Load.
193 * i386-tlb.h: Re-generate.
194
d6793fa1
JB		 1952018-03-22 Jan Beulich <jbeulich@suse.com>
196
197 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
198 templates allowing memory operands and folded ones for register
199 only flavors.
200 * i386-tlb.h: Re-generate.
201
f7768225
JB		 2022018-03-22 Jan Beulich <jbeulich@suse.com>
203
204 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
205 256-bit templates. Drop redundant leftover Disp<N>.
206 * i386-tlb.h: Re-generate.
207
0e35537d
JW		 2082018-03-14 Kito Cheng <kito.cheng@gmail.com>
209
210 * riscv-opc.c (riscv_insn_types): New.
211
b4a3689a
NC		 2122018-03-13 Nick Clifton <nickc@redhat.com>
213
214 * po/pt_BR.po: Updated Brazilian Portuguese translation.
215
d3d50934
L		 2162018-03-08 H.J. Lu <hongjiu.lu@intel.com>
217
218 * i386-opc.tbl: Add Optimize to clr.
219 * i386-tbl.h: Regenerated.
220
bd5dea88
L		 2212018-03-08 H.J. Lu <hongjiu.lu@intel.com>
222
223 * i386-gen.c (opcode_modifiers): Remove OldGcc.
224 * i386-opc.h (OldGcc): Removed.
225 (i386_opcode_modifier): Remove oldgcc.
226 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
227 instructions for old (<= 2.8.1) versions of gcc.
228 * i386-tbl.h: Regenerated.
229
e771e7c9
JB		 2302018-03-08 Jan Beulich <jbeulich@suse.com>
231
232 * i386-opc.h (EVEXDYN): New.
233 * i386-opc.tbl: Fold various AVX512VL templates.
234 * i386-tlb.h: Re-generate.
235
ed438a93
JB		 2362018-03-08 Jan Beulich <jbeulich@suse.com>
237
238 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
239 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
240 vpexpandd, vpexpandq): Fold AFX512VF templates.
241 * i386-tlb.h: Re-generate.
242
454172a9
JB		 2432018-03-08 Jan Beulich <jbeulich@suse.com>
244
245 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
246 Fold 128- and 256-bit VEX-encoded templates.
247 * i386-tlb.h: Re-generate.
248
36824150
JB		 2492018-03-08 Jan Beulich <jbeulich@suse.com>
250
251 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
252 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
253 vpexpandd, vpexpandq): Fold AVX512F templates.
254 * i386-tlb.h: Re-generate.
255
e7f5c0a9
JB		 2562018-03-08 Jan Beulich <jbeulich@suse.com>
257
258 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
259 64-bit templates. Drop Disp<N>.
260 * i386-tlb.h: Re-generate.
261
25a4277f
JB		 2622018-03-08 Jan Beulich <jbeulich@suse.com>
263
264 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
265 and 256-bit templates.
266 * i386-tlb.h: Re-generate.
267
d2224064
JB		 2682018-03-08 Jan Beulich <jbeulich@suse.com>
269
270 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
271 * i386-tlb.h: Re-generate.
272
1b193f0b
JB		 2732018-03-08 Jan Beulich <jbeulich@suse.com>
274
275 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
276 Drop NoAVX.
277 * i386-tlb.h: Re-generate.
278
f2f6a710
JB		 2792018-03-08 Jan Beulich <jbeulich@suse.com>
280
281 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
282 * i386-tlb.h: Re-generate.
283
38e314eb
JB		 2842018-03-08 Jan Beulich <jbeulich@suse.com>
285
286 * i386-gen.c (opcode_modifiers): Delete FloatD.
287 * i386-opc.h (FloatD): Delete.
288 (struct i386_opcode_modifier): Delete floatd.
289 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
290 FloatD by D.
291 * i386-tlb.h: Re-generate.
292
d53e6b98
JB		 2932018-03-08 Jan Beulich <jbeulich@suse.com>
294
295 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
296
2907c2f5
JB		 2972018-03-08 Jan Beulich <jbeulich@suse.com>
298
299 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
300 * i386-tlb.h: Re-generate.
301
73053c1f
JB		 3022018-03-08 Jan Beulich <jbeulich@suse.com>
303
304 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
305 forms.
306 * i386-tlb.h: Re-generate.
307
52fe4420
AM		 3082018-03-07 Alan Modra <amodra@gmail.com>
309
310 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
311 bfd_arch_rs6000.
312 * disassemble.h (print_insn_rs6000): Delete.
313 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
314 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
315 (print_insn_rs6000): Delete.
316
a6743a54
AM		 3172018-03-03 Alan Modra <amodra@gmail.com>
318
319 * sysdep.h (opcodes_error_handler): Define.
320 (_bfd_error_handler): Declare.
321 * Makefile.am: Remove stray #.
322 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
323 EDIT" comment.
324 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
325 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
326 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
327 opcodes_error_handler to print errors. Standardize error messages.
328 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
329 and include opintl.h.
330 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
331 * i386-gen.c: Standardize error messages.
332 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
333 * Makefile.in: Regenerate.
334 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
335 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
336 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
337 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
338 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
339 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
340 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
341 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
342 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
343 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
344 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
345 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
346 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
347
8305403a
L		 3482018-03-01 H.J. Lu <hongjiu.lu@intel.com>
349
350 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
351 vpsub[bwdq] instructions.
352 * i386-tbl.h: Regenerated.
353
e184813f
AM		 3542018-03-01 Alan Modra <amodra@gmail.com>
355
356 * configure.ac (ALL_LINGUAS): Sort.
357 * configure: Regenerate.
358
5b616bef
TP		 3592018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
360
361 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
362 macro by assignements.
363
b6f8c7c4
L		 3642018-02-27 H.J. Lu <hongjiu.lu@intel.com>
365
366 PR gas/22871
367 * i386-gen.c (opcode_modifiers): Add Optimize.
368 * i386-opc.h (Optimize): New enum.
369 (i386_opcode_modifier): Add optimize.
370 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
371 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
372 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
373 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
374 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
375 vpxord and vpxorq.
376 * i386-tbl.h: Regenerated.
377
e95b887f
AM		 3782018-02-26 Alan Modra <amodra@gmail.com>
379
380 * crx-dis.c (getregliststring): Allocate a large enough buffer
381 to silence false positive gcc8 warning.
382
0bccfb29
JW		 3832018-02-22 Shea Levy <shea@shealevy.com>
384
385 * disassemble.c (ARCH_riscv): Define if ARCH_all.
386
6b6b6807
L		 3872018-02-22 H.J. Lu <hongjiu.lu@intel.com>
388
389 * i386-opc.tbl: Add {rex},
390 * i386-tbl.h: Regenerated.
391
75f31665
MR		 3922018-02-20 Maciej W. Rozycki <macro@mips.com>
393
394 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
395 (mips16_opcodes): Replace `M' with `m' for "restore".
396
e207bc53
TP		 3972018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
398
399 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
400
87993319
MR		 4012018-02-13 Maciej W. Rozycki <macro@mips.com>
402
403 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
404 variable to `function_index'.
405
68d20676
NC		 4062018-02-13 Nick Clifton <nickc@redhat.com>
407
408 PR 22823
409 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
410 about truncation of printing.
411
d2159fdc
HW		 4122018-02-12 Henry Wong <henry@stuffedcow.net>
413
414 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
415
f174ef9f
NC		 4162018-02-05 Nick Clifton <nickc@redhat.com>
417
418 * po/pt_BR.po: Updated Brazilian Portuguese translation.
419
be3a8dca
IT		 4202018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
421
422 * i386-dis.c (enum): Add pconfig.
423 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
424 (cpu_flags): Add CpuPCONFIG.
425 * i386-opc.h (enum): Add CpuPCONFIG.
426 (i386_cpu_flags): Add cpupconfig.
427 * i386-opc.tbl: Add PCONFIG instruction.
428 * i386-init.h: Regenerate.
429 * i386-tbl.h: Likewise.
430
3233d7d0
IT		 4312018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
432
433 * i386-dis.c (enum): Add PREFIX_0F09.
434 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
435 (cpu_flags): Add CpuWBNOINVD.
436 * i386-opc.h (enum): Add CpuWBNOINVD.
437 (i386_cpu_flags): Add cpuwbnoinvd.
438 * i386-opc.tbl: Add WBNOINVD instruction.
439 * i386-init.h: Regenerate.
440 * i386-tbl.h: Likewise.
441
e925c834
JW		 4422018-01-17 Jim Wilson <jimw@sifive.com>
443
444 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
445
d777820b
IT		 4462018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
447
448 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
449 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
450 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
451 (cpu_flags): Add CpuIBT, CpuSHSTK.
452 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
453 (i386_cpu_flags): Add cpuibt, cpushstk.
454 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
455 * i386-init.h: Regenerate.
456 * i386-tbl.h: Likewise.
457
f6efed01
NC		 4582018-01-16 Nick Clifton <nickc@redhat.com>
459
460 * po/pt_BR.po: Updated Brazilian Portugese translation.
461 * po/de.po: Updated German translation.
462
2721d702
JW		 4632018-01-15 Jim Wilson <jimw@sifive.com>
464
465 * riscv-opc.c (match_c_nop): New.
466 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
467
616dcb87
NC		 4682018-01-15 Nick Clifton <nickc@redhat.com>
469
470 * po/uk.po: Updated Ukranian translation.
471
3957a496
NC		 4722018-01-13 Nick Clifton <nickc@redhat.com>
473
474 * po/opcodes.pot: Regenerated.
475
769c7ea5
NC		 4762018-01-13 Nick Clifton <nickc@redhat.com>
477
478 * configure: Regenerate.
479
faf766e3
NC		 4802018-01-13 Nick Clifton <nickc@redhat.com>
481
482 2.30 branch created.
483
888a89da
IT		 4842018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
485
486 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
487 * i386-tbl.h: Regenerate.
488
cbda583a
JB		 4892018-01-10 Jan Beulich <jbeulich@suse.com>
490
491 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
492 * i386-tbl.h: Re-generate.
493
c9e92278
JB		 4942018-01-10 Jan Beulich <jbeulich@suse.com>
495
496 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
497 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
498 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
499 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
500 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
501 Disp8MemShift of AVX512VL forms.
502 * i386-tbl.h: Re-generate.
503
35fd2b2b
JW		 5042018-01-09 Jim Wilson <jimw@sifive.com>
505
506 * riscv-dis.c (maybe_print_address): If base_reg is zero,
507 then the hi_addr value is zero.
508
91d8b670
JG		 5092018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
510
511 * arm-dis.c (arm_opcodes): Add csdb.
512 (thumb32_opcodes): Add csdb.
513
be2e7d95
JG		 5142018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
515
516 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
517 * aarch64-asm-2.c: Regenerate.
518 * aarch64-dis-2.c: Regenerate.
519 * aarch64-opc-2.c: Regenerate.
520
704a705d
L		 5212018-01-08 H.J. Lu <hongjiu.lu@intel.com>
522
523 PR gas/22681
524 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
525 Remove AVX512 vmovd with 64-bit operands.
526 * i386-tbl.h: Regenerated.
527
35eeb78f
JW		 5282018-01-05 Jim Wilson <jimw@sifive.com>
529
530 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
531 jalr.
532
219d1afa
AM		 5332018-01-03 Alan Modra <amodra@gmail.com>
534
535 Update year range in copyright notice of all files.
536
1508bbf5
JB		 5372018-01-02 Jan Beulich <jbeulich@suse.com>
538
539 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
540 and OPERAND_TYPE_REGZMM entries.
541
1e563868 542For older changes see ChangeLog-2017
3499769a 543\f
1e563868 544Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 545
546Copying and distribution of this file, with or without modification,
547are permitted in any medium without royalty provided the copyright
548notice and this notice are preserved.
549
550Local Variables:
551mode: change-log
552left-margin: 8
553fill-column: 74
554version-control: never
555End:
GDB Binutils - Deliverables
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