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* gas/config/tc-arm.c (do_setend): Warn on deprecated SETEND.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
2c63854f
DM		 12012-08-21 David S. Miller <davem@davemloft.net>
2
3 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
4 F3F4 macro.
5
e67ed0e8
AM		 62012-08-20 Edmar Wienskoski <edmar@freescale.com>
7
8 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
9 vabsduh, vabsduw, mviwsplt.
10
7b458c12
L		 112012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
12
13 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
14 CPU_BTVER2_FLAGS.
15
e67ed0e8 16 * i386-opc.h: Update CpuPRFCHW comment.
7b458c12
L		 17
18 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
19 * i386-init.h: Regenerated.
20 * i386-tbl.h: Likewise.
21
eb80cb87
NC		 222012-08-17 Nick Clifton <nickc@redhat.com>
23
24 * po/uk.po: New Ukranian translation.
25 * configure.in (ALL_LINGUAS): Add uk.
26 * configure: Regenerate.
27
8baf7b78
PB		 282012-08-16 Peter Bergner <bergner@vnet.ibm.com>
29
30 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
31 RBX for the third operand.
32 <"lswi">: Use RAX for second and NBI for the third operand.
33
3d557b4c
DD		 342012-08-15 DJ Delorie <dj@redhat.com>
35
36 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
37 operands, so that data addresses can be corrected when not
38 ES-overridden.
39 * rl78-decode.c: Regenerate.
40 * rl78-dis.c (print_insn_rl78): Make order of modifiers
41 irrelevent. When the 'e' specifier is used on an operand and no
42 ES prefix is provided, adjust address to make it absolute.
43
588925d0
PB		 442012-08-15 Peter Bergner <bergner@vnet.ibm.com>
45
46 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
47
9f6a6cc0
PB		 482012-08-15 Peter Bergner <bergner@vnet.ibm.com>
49
50 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
51
fc8c4fd1
MR		 522012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
53
54 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
55 macros, use local variables for info struct member accesses,
56 update the type of the variable used to hold the instruction
57 word.
58 (print_insn_mips, print_mips16_insn_arg): Likewise.
59 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
60 local variables for info struct member accesses.
61 (print_insn_micromips): Add GET_OP_S local macro.
62 (_print_insn_mips): Update the type of the variable used to hold
63 the instruction word.
64
a06ea964 652012-08-13 Ian Bolton <ian.bolton@arm.com>
e67ed0e8
AM		 66 Laurent Desnogues <laurent.desnogues@arm.com>
67 Jim MacArthur <jim.macarthur@arm.com>
68 Marcus Shawcroft <marcus.shawcroft@arm.com>
69 Nigel Stephens <nigel.stephens@arm.com>
70 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
71 Richard Earnshaw <rearnsha@arm.com>
72 Sofiane Naci <sofiane.naci@arm.com>
73 Tejas Belagod <tejas.belagod@arm.com>
74 Yufeng Zhang <yufeng.zhang@arm.com>
a06ea964
NC		 75
76 * Makefile.am: Add AArch64.
77 * Makefile.in: Regenerate.
78 * aarch64-asm.c: New file.
79 * aarch64-asm.h: New file.
80 * aarch64-dis.c: New file.
81 * aarch64-dis.h: New file.
82 * aarch64-gen.c: New file.
83 * aarch64-opc.c: New file.
84 * aarch64-opc.h: New file.
85 * aarch64-tbl.h: New file.
86 * configure.in: Add AArch64.
87 * configure: Regenerate.
88 * disassemble.c: Add AArch64.
89 * aarch64-asm-2.c: New file (automatically generated).
90 * aarch64-dis-2.c: New file (automatically generated).
91 * aarch64-opc-2.c: New file (automatically generated).
92 * po/POTFILES.in: Regenerate.
93
35d0a169
MR		 942012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
95
96 * micromips-opc.c (micromips_opcodes): Update comment.
97 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
98 instructions for IOCT as appropriate.
99 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
100 opcode_is_member.
101 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
102 the result of a check for the -Wno-missing-field-initializers
103 GCC option.
104 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
105 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
106 compilation.
107 (mips16-opc.lo): Likewise.
108 (micromips-opc.lo): Likewise.
109 * aclocal.m4: Regenerate.
110 * configure: Regenerate.
111 * Makefile.in: Regenerate.
112
5c5acbbd
L		 1132012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
114
115 PR gas/14423
116 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
117 * i386-init.h: Regenerated.
118
3c892704
NC		 1192012-08-09 Nick Clifton <nickc@redhat.com>
120
121 * po/vi.po: Updated Vietnamese translation.
122
d7189fa5
RM		 1232012-08-07 Roland McGrath <mcgrathr@google.com>
124
125 * i386-dis.c (reg_table): Fill out REG_0F0D table with
126 AMD-reserved cases as "prefetch".
127 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
128 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
129 (reg_table): Use those under REG_0F18.
130 (mod_table): Add those cases as "nop/reserved".
131
4c692bc7
JB		 1322012-08-07 Jan Beulich <jbeulich@suse.com>
133
134 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
135
de882298
RM		 1362012-08-06 Roland McGrath <mcgrathr@google.com>
137
138 * i386-dis.c (print_insn): Print spaces between multiple excess
139 prefixes. Return actual number of excess prefixes consumed,
140 not always one.
141
142 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
143
7bb15c6f
RM		 1442012-08-06 Roland McGrath <mcgrathr@google.com>
145 Victor Khimenko <khim@google.com>
146 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
149 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
150 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
151 (OP_E_register): Likewise.
152 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
153
3843081d
JBG		 1542012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
155
156 * configure.in: Formatting.
157 * configure: Regenerate.
158
48891606
AM		 1592012-08-01 Alan Modra <amodra@gmail.com>
160
161 * h8300-dis.c: Fix printf arg warnings.
162 * i960-dis.c: Likewise.
163 * mips-dis.c: Likewise.
164 * pdp11-dis.c: Likewise.
165 * sh-dis.c: Likewise.
166 * v850-dis.c: Likewise.
167 * configure.in: Formatting.
168 * configure: Regenerate.
169 * rl78-decode.c: Regenerate.
170 * po/POTFILES.in: Regenerate.
171
03f66e8a 1722012-07-31 Chao-Ying Fu <fu@mips.com>
e67ed0e8
AM		 173 Catherine Moore <clm@codesourcery.com>
174 Maciej W. Rozycki <macro@codesourcery.com>
03f66e8a
MR		 175
176 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
177 (DSP_VOLA): Likewise.
178 (D32, D33): Likewise.
179 (micromips_opcodes): Add DSP ASE instructions.
48891606 180 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
03f66e8a
MR		 181 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
182
94948e64
JB		 1832012-07-31 Jan Beulich <jbeulich@suse.com>
184
185 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
186 instruction group. Mark as requiring AVX2.
187 * i386-tbl.h: Re-generate.
188
a6dc81d2
NC		 1892012-07-30 Nick Clifton <nickc@redhat.com>
190
191 * po/opcodes.pot: Updated template.
192 * po/es.po: Updated Spanish translation.
193 * po/fi.po: Updated Finnish translation.
194
c4dd807e
MF		 1952012-07-27 Mike Frysinger <vapier@gentoo.org>
196
197 * configure.in (BFD_VERSION): Run bfd/configure --version and
198 parse the output of that.
199 * configure: Regenerate.
200
03edbe3b
JL		 2012012-07-25 James Lemke <jwlemke@codesourcery.com>
202
203 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
204
63d08c68
NC		 2052012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
206 Dr David Alan Gilbert <dave@treblig.org>
d908c8af
NC		 207
208 PR binutils/13135
209 * arm-dis.c: Add necessary casts for printing integer values.
210 Use %s when printing string values.
211 * hppa-dis.c: Likewise.
212 * m68k-dis.c: Likewise.
213 * microblaze-dis.c: Likewise.
214 * mips-dis.c: Likewise.
215 * sparc-dis.c: Likewise.
216
ff688e1f
L		 2172012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
218
219 PR binutils/14355
220 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
221 (VEX_LEN_0FXOP_08_CD): Likewise.
222 (VEX_LEN_0FXOP_08_CE): Likewise.
223 (VEX_LEN_0FXOP_08_CF): Likewise.
224 (VEX_LEN_0FXOP_08_EC): Likewise.
225 (VEX_LEN_0FXOP_08_ED): Likewise.
226 (VEX_LEN_0FXOP_08_EE): Likewise.
227 (VEX_LEN_0FXOP_08_EF): Likewise.
228 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
229 vpcomub, vpcomuw, vpcomud, vpcomuq.
230 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
231 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
232 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
233 VEX_LEN_0FXOP_08_EF.
234
e2e1fcde
L		 2352012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
236
237 * i386-dis.c (PREFIX_0F38F6): New.
238 (prefix_table): Add adcx, adox instructions.
239 (three_byte_table): Use PREFIX_0F38F6.
240 (mod_table): Add rdseed instruction.
241 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
242 (cpu_flags): Likewise.
243 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
244 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
245 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
246 prefetchw.
247 * i386-tbl.h: Regenerate.
248 * i386-init.h: Likewise.
249
8b99bf0b
TS		 2502012-07-05 Thomas Schwinge <thomas@codesourcery.com>
251
f4263ca2 252 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 253
416cf80a
SK		 2542012-07-05 Sean Keys <skeys@ipdatasys.com>
255
256 * xgate-dis.c: Removed an IF statement that will
e67ed0e8
AM		 257 always be false due to overlapping operand masks.
258 * xgate-opc.c: Corrected 'com' opcode entry and
259 fixed spacing.
416cf80a 260
9fa0f14a
RM		 2612012-07-02 Roland McGrath <mcgrathr@google.com>
262
263 * i386-opc.tbl: Add RepPrefixOk to nop.
264 * i386-tbl.h: Regenerate.
265
4c6a93d3
NC		 2662012-06-28 Nick Clifton <nickc@redhat.com>
267
268 * po/vi.po: Updated Vietnamese translation.
269
29c048b6
RM		 2702012-06-22 Roland McGrath <mcgrathr@google.com>
271
fe13e45b
RM		 272 * i386-opc.tbl: Add RepPrefixOk to ret.
273 * i386-tbl.h: Regenerate.
274
29c048b6
RM		 275 * i386-opc.h (RepPrefixOk): New enum constant.
276 (i386_opcode_modifier): New bitfield 'repprefixok'.
277 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
278 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
279 instructions that have IsString.
280 * i386-tbl.h: Regenerate.
281
c7a8dbf9
AS		 2822012-06-11 Andreas Schwab <schwab@linux-m68k.org>
283
284 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
285 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
286 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
287 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
288 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
289 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
290 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
291 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
292 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
293
94caa966
AM		 2942012-05-19 Alan Modra <amodra@gmail.com>
295
296 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
297 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
298
5eb3690e
AM		 2992012-05-18 Alan Modra <amodra@gmail.com>
300
71fe7bab
AM		 301 * ia64-opc.c: Remove #include "ansidecl.h".
302 * z8kgen.c: Include sysdep.h first.
303
5eb3690e
AM		 304 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
305 * bfin-dis.c: Likewise.
306 * i860-dis.c: Likewise.
307 * ia64-dis.c: Likewise.
308 * ia64-gen.c: Likewise.
309 * m68hc11-dis.c: Likewise.
310 * mmix-dis.c: Likewise.
311 * msp430-dis.c: Likewise.
312 * or32-dis.c: Likewise.
313 * rl78-dis.c: Likewise.
314 * rx-dis.c: Likewise.
315 * tic4x-dis.c: Likewise.
316 * tilegx-opc.c: Likewise.
317 * tilepro-opc.c: Likewise.
318 * rx-decode.c: Regenerate.
319
a4ebc835
AM		 3202012-05-17 James Lemke <jwlemke@codesourcery.com>
321
322 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
323
98c76446
AM		 3242012-05-17 James Lemke <jwlemke@codesourcery.com>
325
326 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
327
df7b86aa
NC		 3282012-05-17 Daniel Richard G. <skunk@iskunk.org>
329 Nick Clifton <nickc@redhat.com>
330
331 PR 14072
332 * configure.in: Add check that sysdep.h has been included before
333 any system header files.
334 * configure: Regenerate.
335 * config.in: Regenerate.
336 * sysdep.h: Generate an error if included before config.h.
337 * alpha-opc.c: Include sysdep.h before any other header file.
338 * alpha-dis.c: Likewise.
339 * avr-dis.c: Likewise.
340 * cgen-opc.c: Likewise.
341 * cr16-dis.c: Likewise.
342 * cris-dis.c: Likewise.
343 * crx-dis.c: Likewise.
344 * d10v-dis.c: Likewise.
345 * d10v-opc.c: Likewise.
346 * d30v-dis.c: Likewise.
347 * d30v-opc.c: Likewise.
348 * h8500-dis.c: Likewise.
349 * i370-dis.c: Likewise.
350 * i370-opc.c: Likewise.
351 * m10200-dis.c: Likewise.
352 * m10300-dis.c: Likewise.
353 * micromips-opc.c: Likewise.
354 * mips-opc.c: Likewise.
355 * mips61-opc.c: Likewise.
356 * moxie-dis.c: Likewise.
357 * or32-opc.c: Likewise.
358 * pj-dis.c: Likewise.
359 * ppc-dis.c: Likewise.
360 * ppc-opc.c: Likewise.
361 * s390-dis.c: Likewise.
362 * sh-dis.c: Likewise.
363 * sh64-dis.c: Likewise.
364 * sparc-dis.c: Likewise.
365 * sparc-opc.c: Likewise.
366 * spu-dis.c: Likewise.
367 * tic30-dis.c: Likewise.
368 * tic54x-dis.c: Likewise.
369 * tic80-dis.c: Likewise.
370 * tic80-opc.c: Likewise.
371 * tilegx-dis.c: Likewise.
372 * tilepro-dis.c: Likewise.
373 * v850-dis.c: Likewise.
374 * v850-opc.c: Likewise.
375 * vax-dis.c: Likewise.
376 * w65-dis.c: Likewise.
377 * xgate-dis.c: Likewise.
378 * xtensa-dis.c: Likewise.
379 * rl78-decode.opc: Likewise.
380 * rl78-decode.c: Regenerate.
381 * rx-decode.opc: Likewise.
382 * rx-decode.c: Regenerate.
383
e1dad58d
AM		 3842012-05-17 Alan Modra <amodra@gmail.com>
385
386 * ppc_dis.c: Don't include elf/ppc.h.
387
101af531
NC		 3882012-05-16 Meador Inge <meadori@codesourcery.com>
389
390 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
391 to PUSH/POP {reg}.
392
6927f982
NC		 3932012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
394 Stephane Carrez <stcarrez@nerim.fr>
395
396 * configure.in: Add S12X and XGATE co-processor support to m68hc11
397 target.
398 * disassemble.c: Likewise.
399 * configure: Regenerate.
400 * m68hc11-dis.c: Make objdump output more consistent, use hex
401 instead of decimal and use 0x prefix for hex.
402 * m68hc11-opc.c: Add S12X and XGATE opcodes.
403
b9c361e0
JL		 4042012-05-14 James Lemke <jwlemke@codesourcery.com>
405
406 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
407 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
408 (vle_opcd_indices): New array.
409 (lookup_vle): New function.
410 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
411 (print_insn_powerpc): Likewise.
412 * ppc-opc.c: Likewise.
413
4142012-05-14 Catherine Moore <clm@codesourcery.com>
415 Maciej W. Rozycki <macro@codesourcery.com>
416 Rhonda Wittels <rhonda@codesourcery.com>
417 Nathan Froyd <froydnj@codesourcery.com>
418
419 * ppc-opc.c (insert_arx, extract_arx): New functions.
420 (insert_ary, extract_ary): New functions.
421 (insert_li20, extract_li20): New functions.
422 (insert_rx, extract_rx): New functions.
423 (insert_ry, extract_ry): New functions.
424 (insert_sci8, extract_sci8): New functions.
425 (insert_sci8n, extract_sci8n): New functions.
426 (insert_sd4h, extract_sd4h): New functions.
427 (insert_sd4w, extract_sd4w): New functions.
428 (insert_vlesi, extract_vlesi): New functions.
429 (insert_vlensi, extract_vlensi): New functions.
430 (insert_vleui, extract_vleui): New functions.
431 (insert_vleil, extract_vleil): New functions.
432 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
433 (BI16, BI32, BO32, B8): New.
434 (B15, B24, CRD32, CRS): New.
435 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
436 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
437 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
438 (SH6_MASK): Use PPC_OPSHIFT_INV.
439 (SI8, UI5, OIMM5, UI7, BO16): New.
440 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
441 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
442 (ALLOW8_SPRG): New.
443 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
444 (OPVUP, OPVUP_MASK OPVUP): New
445 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
446 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
447 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
448 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
449 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
450 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
451 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
452 (SE_IM5, SE_IM5_MASK): New.
453 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
454 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
455 (BO32DNZ, BO32DZ): New.
456 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
457 (PPCVLE): New.
458 (powerpc_opcodes): Add new VLE instructions. Update existing
459 instruction to include PPCVLE if supported.
460 * ppc-dis.c (ppc_opts): Add vle entry.
461 (get_powerpc_dialect): New function.
462 (powerpc_init_dialect): VLE support.
463 (print_insn_big_powerpc): Call get_powerpc_dialect.
464 (print_insn_little_powerpc): Likewise.
465 (operand_value_powerpc): Handle negative shift counts.
466 (print_insn_powerpc): Handle 2-byte instruction lengths.
467
208a4923
NC		 4682012-05-11 Daniel Richard G. <skunk@iskunk.org>
469
470 PR binutils/14028
471 * configure.in: Invoke ACX_HEADER_STRING.
472 * configure: Regenerate.
473 * config.in: Regenerate.
474 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
475 string.h and strings.h.
476
6750a3a7
NC		 4772012-05-11 Nick Clifton <nickc@redhat.com>
478
479 PR binutils/14006
480 * arm-dis.c (print_insn): Fix detection of instruction mode in
481 files containing multiple executable sections.
482
f6c1a2d5
NC		 4832012-05-03 Sean Keys <skeys@ipdatasys.com>
484
485 * Makefile.in, configure: regenerate
486 * disassemble.c (disassembler): Recognize ARCH_XGATE.
487 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
488 New functions.
489 * configure.in: Recognize xgate.
490 * xgate-dis.c, xgate-opc.c: New files for support of xgate
491 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
492 and opcode generation for xgate.
493
78e98aab
DD		 4942012-04-30 DJ Delorie <dj@redhat.com>
495
496 * rx-decode.opc (MOV): Do not sign-extend immediates which are
497 already the maximum bit size.
498 * rx-decode.c: Regenerate.
499
ec668d69
DM		 5002012-04-27 David S. Miller <davem@davemloft.net>
501
2e52845b
DM		 502 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
503 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
504
58004e23
DM		 505 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
506 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
507
698544e1
DM		 508 * sparc-opc.c (CBCOND): New define.
509 (CBCOND_XCC): Likewise.
510 (cbcond): New helper macro.
511 (sparc_opcodes): Add compare-and-branch instructions.
512
6cda1326
DM		 513 * sparc-dis.c (print_insn_sparc): Handle ')'.
514 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
515
ec668d69
DM		 516 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
517 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
518
2615994e
DM		 5192012-04-12 David S. Miller <davem@davemloft.net>
520
521 * sparc-dis.c (X_DISP10): Define.
522 (print_insn_sparc): Handle '='.
523
5de10af0
MF		 5242012-04-01 Mike Frysinger <vapier@gentoo.org>
525
526 * bfin-dis.c (fmtconst): Replace decimal handling with a single
527 sprintf call and the '*' field width.
528
55a36193
MK		 5292012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
530
531 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
532
d6688282
AM		 5332012-03-16 Alan Modra <amodra@gmail.com>
534
535 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
536 (powerpc_opcd_indices): Bump array size.
537 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
538 corresponding to unused opcodes to following entry.
539 (lookup_powerpc): New function, extracted and optimised from..
540 (print_insn_powerpc): ..here.
541
b240011a
AM		 5422012-03-15 Alan Modra <amodra@gmail.com>
543 James Lemke <jwlemke@codesourcery.com>
544
545 * disassemble.c (disassemble_init_for_target): Handle ppc init.
546 * ppc-dis.c (private): New var.
547 (powerpc_init_dialect): Don't return calloc failure, instead use
548 private.
549 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
550 (powerpc_opcd_indices): New array.
551 (disassemble_init_powerpc): New function.
552 (print_insn_big_powerpc): Don't init dialect here.
553 (print_insn_little_powerpc): Likewise.
554 (print_insn_powerpc): Start search using powerpc_opcd_indices.
555
aea77599
AM		 5562012-03-10 Edmar Wienskoski <edmar@freescale.com>
557
558 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
559 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
560 (PPCVEC2, PPCTMR, E6500): New short names.
561 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
562 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
563 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
564 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
565 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
566 optional operands on sync instruction for E6500 target.
567
5333187a
AK		 5682012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
569
570 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
571
a597d2d3
AM		 5722012-02-27 Alan Modra <amodra@gmail.com>
573
574 * mt-dis.c: Regenerate.
575
3f26eb3a
AM		 5762012-02-27 Alan Modra <amodra@gmail.com>
577
578 * v850-opc.c (extract_v8): Rearrange to make it obvious this
579 is the inverse of corresponding insert function.
580 (extract_d22, extract_u9, extract_r4): Likewise.
581 (extract_d9): Correct sign extension.
582 (extract_d16_15): Don't assume "long" is 32 bits, and don't
583 rely on implementation defined behaviour for shift right of
584 signed types.
585 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
586 (extract_d23): Likewise, and correct mask.
587
1f42f8b3
AM		 5882012-02-27 Alan Modra <amodra@gmail.com>
589
590 * crx-dis.c (print_arg): Mask constant to 32 bits.
591 * crx-opc.c (cst4_map): Use int array.
592
cdb06235
AM		 5932012-02-27 Alan Modra <amodra@gmail.com>
594
595 * arc-dis.c (BITS): Don't use shifts to mask off bits.
596 (FIELDD): Sign extend with xor,sub.
597
6f7be959
WL		 5982012-02-25 Walter Lee <walt@tilera.com>
599
600 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
601 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
602 TILEPRO_OPC_LW_TLS_SN.
603
82c2def5
L		 6042012-02-21 H.J. Lu <hongjiu.lu@intel.com>
605
606 * i386-opc.h (HLEPrefixNone): New.
607 (HLEPrefixLock): Likewise.
608 (HLEPrefixAny): Likewise.
609 (HLEPrefixRelease): Likewise.
610
42164a71
L		 6112012-02-08 H.J. Lu <hongjiu.lu@intel.com>
612
613 * i386-dis.c (HLE_Fixup1): New.
614 (HLE_Fixup2): Likewise.
615 (HLE_Fixup3): Likewise.
616 (Ebh1): Likewise.
617 (Evh1): Likewise.
618 (Ebh2): Likewise.
619 (Evh2): Likewise.
620 (Ebh3): Likewise.
621 (Evh3): Likewise.
622 (MOD_C6_REG_7): Likewise.
623 (MOD_C7_REG_7): Likewise.
624 (RM_C6_REG_7): Likewise.
625 (RM_C7_REG_7): Likewise.
626 (XACQUIRE_PREFIX): Likewise.
627 (XRELEASE_PREFIX): Likewise.
628 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
629 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
630 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
631 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
632 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
633 MOD_C6_REG_7 and MOD_C7_REG_7.
634 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
635 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
636 xtest.
637 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
638 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
639
640 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
641 CPU_RTM_FLAGS.
642 (cpu_flags): Add CpuHLE and CpuRTM.
643 (opcode_modifiers): Add HLEPrefixOk.
644
645 * i386-opc.h (CpuHLE): New.
646 (CpuRTM): Likewise.
647 (HLEPrefixOk): Likewise.
648 (i386_cpu_flags): Add cpuhle and cpurtm.
649 (i386_opcode_modifier): Add hleprefixok.
650
651 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
652 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
653 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
654 operand. Add xacquire, xrelease, xabort, xbegin, xend and
655 xtest.
656 * i386-init.h: Regenerated.
657 * i386-tbl.h: Likewise.
658
21abe33a
DD		 6592012-01-24 DJ Delorie <dj@redhat.com>
660
661 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
662 * rl78-decode.c: Regenerate.
663
e20cc039
AM		 6642012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
665
666 PR binutils/10173
667 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
668
e143d25c
AS		 6692012-01-17 Andreas Schwab <schwab@linux-m68k.org>
670
671 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
672 register and move them after pmove with PSR/PCSR register.
673
8729a6f6
L		 6742012-01-13 H.J. Lu <hongjiu.lu@intel.com>
675
676 * i386-dis.c (mod_table): Add vmfunc.
677
678 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
679 (cpu_flags): CpuVMFUNC.
680
681 * i386-opc.h (CpuVMFUNC): New.
682 (i386_cpu_flags): Add cpuvmfunc.
683
684 * i386-opc.tbl: Add vmfunc.
685 * i386-init.h: Regenerated.
686 * i386-tbl.h: Likewise.
5011093d 687
23e1d329 688For older changes see ChangeLog-2011
252b5132
RH		 689\f
690Local Variables:
2f6d2f85
NC		 691mode: change-log
692left-margin: 8
693fill-column: 74
252b5132
RH		 694version-control: never
695End:
GDB Binutils - Deliverables
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