Add blurb about linker changes for Cygwin and Mingw targets.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
4fb0d2b9
NC
12018-04-04 Nick Clifton <nickc@redhat.com>
2
3 * po/es.po: Updated Spanish translation.
4
c39e5b26
JB
52018-03-28 Jan Beulich <jbeulich@suse.com>
6
7 * i386-gen.c (opcode_modifiers): Delete VecESize.
8 * i386-opc.h (VecESize): Delete.
9 (struct i386_opcode_modifier): Delete vecesize.
10 * i386-opc.tbl: Drop VecESize.
11 * i386-tlb.h: Re-generate.
12
8e6e0792
JB
132018-03-28 Jan Beulich <jbeulich@suse.com>
14
15 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
16 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
17 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
18 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
19 * i386-tlb.h: Re-generate.
20
9f123b91
JB
212018-03-28 Jan Beulich <jbeulich@suse.com>
22
23 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
24 Fold AVX512 forms
25 * i386-tlb.h: Re-generate.
26
9646c87b
JB
272018-03-28 Jan Beulich <jbeulich@suse.com>
28
29 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
30 (vex_len_table): Drop Y for vcvt*2si.
31 (putop): Replace plain 'Y' handling by abort().
32
c8d59609
NC
332018-03-28 Nick Clifton <nickc@redhat.com>
34
35 PR 22988
36 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
37 instructions with only a base address register.
38 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
39 handle AARHC64_OPND_SVE_ADDR_R.
40 (aarch64_print_operand): Likewise.
41 * aarch64-asm-2.c: Regenerate.
42 * aarch64_dis-2.c: Regenerate.
43 * aarch64-opc-2.c: Regenerate.
44
b8c169f3
JB
452018-03-22 Jan Beulich <jbeulich@suse.com>
46
47 * i386-opc.tbl: Drop VecESize from register only insn forms and
48 memory forms not allowing broadcast.
49 * i386-tlb.h: Re-generate.
50
96bc132a
JB
512018-03-22 Jan Beulich <jbeulich@suse.com>
52
53 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
54 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
55 sha256*): Drop Disp<N>.
56
9f79e886
JB
572018-03-22 Jan Beulich <jbeulich@suse.com>
58
59 * i386-dis.c (EbndS, bnd_swap_mode): New.
60 (prefix_table): Use EbndS.
61 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
62 * i386-opc.tbl (bndmov): Move misplaced Load.
63 * i386-tlb.h: Re-generate.
64
d6793fa1
JB
652018-03-22 Jan Beulich <jbeulich@suse.com>
66
67 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
68 templates allowing memory operands and folded ones for register
69 only flavors.
70 * i386-tlb.h: Re-generate.
71
f7768225
JB
722018-03-22 Jan Beulich <jbeulich@suse.com>
73
74 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
75 256-bit templates. Drop redundant leftover Disp<N>.
76 * i386-tlb.h: Re-generate.
77
0e35537d
JW
782018-03-14 Kito Cheng <kito.cheng@gmail.com>
79
80 * riscv-opc.c (riscv_insn_types): New.
81
b4a3689a
NC
822018-03-13 Nick Clifton <nickc@redhat.com>
83
84 * po/pt_BR.po: Updated Brazilian Portuguese translation.
85
d3d50934
L
862018-03-08 H.J. Lu <hongjiu.lu@intel.com>
87
88 * i386-opc.tbl: Add Optimize to clr.
89 * i386-tbl.h: Regenerated.
90
bd5dea88
L
912018-03-08 H.J. Lu <hongjiu.lu@intel.com>
92
93 * i386-gen.c (opcode_modifiers): Remove OldGcc.
94 * i386-opc.h (OldGcc): Removed.
95 (i386_opcode_modifier): Remove oldgcc.
96 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
97 instructions for old (<= 2.8.1) versions of gcc.
98 * i386-tbl.h: Regenerated.
99
e771e7c9
JB
1002018-03-08 Jan Beulich <jbeulich@suse.com>
101
102 * i386-opc.h (EVEXDYN): New.
103 * i386-opc.tbl: Fold various AVX512VL templates.
104 * i386-tlb.h: Re-generate.
105
ed438a93
JB
1062018-03-08 Jan Beulich <jbeulich@suse.com>
107
108 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
109 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
110 vpexpandd, vpexpandq): Fold AFX512VF templates.
111 * i386-tlb.h: Re-generate.
112
454172a9
JB
1132018-03-08 Jan Beulich <jbeulich@suse.com>
114
115 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
116 Fold 128- and 256-bit VEX-encoded templates.
117 * i386-tlb.h: Re-generate.
118
36824150
JB
1192018-03-08 Jan Beulich <jbeulich@suse.com>
120
121 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
122 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
123 vpexpandd, vpexpandq): Fold AVX512F templates.
124 * i386-tlb.h: Re-generate.
125
e7f5c0a9
JB
1262018-03-08 Jan Beulich <jbeulich@suse.com>
127
128 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
129 64-bit templates. Drop Disp<N>.
130 * i386-tlb.h: Re-generate.
131
25a4277f
JB
1322018-03-08 Jan Beulich <jbeulich@suse.com>
133
134 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
135 and 256-bit templates.
136 * i386-tlb.h: Re-generate.
137
d2224064
JB
1382018-03-08 Jan Beulich <jbeulich@suse.com>
139
140 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
141 * i386-tlb.h: Re-generate.
142
1b193f0b
JB
1432018-03-08 Jan Beulich <jbeulich@suse.com>
144
145 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
146 Drop NoAVX.
147 * i386-tlb.h: Re-generate.
148
f2f6a710
JB
1492018-03-08 Jan Beulich <jbeulich@suse.com>
150
151 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
152 * i386-tlb.h: Re-generate.
153
38e314eb
JB
1542018-03-08 Jan Beulich <jbeulich@suse.com>
155
156 * i386-gen.c (opcode_modifiers): Delete FloatD.
157 * i386-opc.h (FloatD): Delete.
158 (struct i386_opcode_modifier): Delete floatd.
159 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
160 FloatD by D.
161 * i386-tlb.h: Re-generate.
162
d53e6b98
JB
1632018-03-08 Jan Beulich <jbeulich@suse.com>
164
165 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
166
2907c2f5
JB
1672018-03-08 Jan Beulich <jbeulich@suse.com>
168
169 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
170 * i386-tlb.h: Re-generate.
171
73053c1f
JB
1722018-03-08 Jan Beulich <jbeulich@suse.com>
173
174 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
175 forms.
176 * i386-tlb.h: Re-generate.
177
52fe4420
AM
1782018-03-07 Alan Modra <amodra@gmail.com>
179
180 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
181 bfd_arch_rs6000.
182 * disassemble.h (print_insn_rs6000): Delete.
183 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
184 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
185 (print_insn_rs6000): Delete.
186
a6743a54
AM
1872018-03-03 Alan Modra <amodra@gmail.com>
188
189 * sysdep.h (opcodes_error_handler): Define.
190 (_bfd_error_handler): Declare.
191 * Makefile.am: Remove stray #.
192 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
193 EDIT" comment.
194 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
195 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
196 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
197 opcodes_error_handler to print errors. Standardize error messages.
198 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
199 and include opintl.h.
200 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
201 * i386-gen.c: Standardize error messages.
202 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
203 * Makefile.in: Regenerate.
204 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
205 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
206 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
207 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
208 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
209 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
210 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
211 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
212 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
213 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
214 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
215 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
216 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
217
8305403a
L
2182018-03-01 H.J. Lu <hongjiu.lu@intel.com>
219
220 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
221 vpsub[bwdq] instructions.
222 * i386-tbl.h: Regenerated.
223
e184813f
AM
2242018-03-01 Alan Modra <amodra@gmail.com>
225
226 * configure.ac (ALL_LINGUAS): Sort.
227 * configure: Regenerate.
228
5b616bef
TP
2292018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
230
231 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
232 macro by assignements.
233
b6f8c7c4
L
2342018-02-27 H.J. Lu <hongjiu.lu@intel.com>
235
236 PR gas/22871
237 * i386-gen.c (opcode_modifiers): Add Optimize.
238 * i386-opc.h (Optimize): New enum.
239 (i386_opcode_modifier): Add optimize.
240 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
241 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
242 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
243 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
244 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
245 vpxord and vpxorq.
246 * i386-tbl.h: Regenerated.
247
e95b887f
AM
2482018-02-26 Alan Modra <amodra@gmail.com>
249
250 * crx-dis.c (getregliststring): Allocate a large enough buffer
251 to silence false positive gcc8 warning.
252
0bccfb29
JW
2532018-02-22 Shea Levy <shea@shealevy.com>
254
255 * disassemble.c (ARCH_riscv): Define if ARCH_all.
256
6b6b6807
L
2572018-02-22 H.J. Lu <hongjiu.lu@intel.com>
258
259 * i386-opc.tbl: Add {rex},
260 * i386-tbl.h: Regenerated.
261
75f31665
MR
2622018-02-20 Maciej W. Rozycki <macro@mips.com>
263
264 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
265 (mips16_opcodes): Replace `M' with `m' for "restore".
266
e207bc53
TP
2672018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
268
269 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
270
87993319
MR
2712018-02-13 Maciej W. Rozycki <macro@mips.com>
272
273 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
274 variable to `function_index'.
275
68d20676
NC
2762018-02-13 Nick Clifton <nickc@redhat.com>
277
278 PR 22823
279 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
280 about truncation of printing.
281
d2159fdc
HW
2822018-02-12 Henry Wong <henry@stuffedcow.net>
283
284 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
285
f174ef9f
NC
2862018-02-05 Nick Clifton <nickc@redhat.com>
287
288 * po/pt_BR.po: Updated Brazilian Portuguese translation.
289
be3a8dca
IT
2902018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
291
292 * i386-dis.c (enum): Add pconfig.
293 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
294 (cpu_flags): Add CpuPCONFIG.
295 * i386-opc.h (enum): Add CpuPCONFIG.
296 (i386_cpu_flags): Add cpupconfig.
297 * i386-opc.tbl: Add PCONFIG instruction.
298 * i386-init.h: Regenerate.
299 * i386-tbl.h: Likewise.
300
3233d7d0
IT
3012018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
302
303 * i386-dis.c (enum): Add PREFIX_0F09.
304 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
305 (cpu_flags): Add CpuWBNOINVD.
306 * i386-opc.h (enum): Add CpuWBNOINVD.
307 (i386_cpu_flags): Add cpuwbnoinvd.
308 * i386-opc.tbl: Add WBNOINVD instruction.
309 * i386-init.h: Regenerate.
310 * i386-tbl.h: Likewise.
311
e925c834
JW
3122018-01-17 Jim Wilson <jimw@sifive.com>
313
314 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
315
d777820b
IT
3162018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
317
318 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
319 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
320 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
321 (cpu_flags): Add CpuIBT, CpuSHSTK.
322 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
323 (i386_cpu_flags): Add cpuibt, cpushstk.
324 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
325 * i386-init.h: Regenerate.
326 * i386-tbl.h: Likewise.
327
f6efed01
NC
3282018-01-16 Nick Clifton <nickc@redhat.com>
329
330 * po/pt_BR.po: Updated Brazilian Portugese translation.
331 * po/de.po: Updated German translation.
332
2721d702
JW
3332018-01-15 Jim Wilson <jimw@sifive.com>
334
335 * riscv-opc.c (match_c_nop): New.
336 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
337
616dcb87
NC
3382018-01-15 Nick Clifton <nickc@redhat.com>
339
340 * po/uk.po: Updated Ukranian translation.
341
3957a496
NC
3422018-01-13 Nick Clifton <nickc@redhat.com>
343
344 * po/opcodes.pot: Regenerated.
345
769c7ea5
NC
3462018-01-13 Nick Clifton <nickc@redhat.com>
347
348 * configure: Regenerate.
349
faf766e3
NC
3502018-01-13 Nick Clifton <nickc@redhat.com>
351
352 2.30 branch created.
353
888a89da
IT
3542018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
355
356 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
357 * i386-tbl.h: Regenerate.
358
cbda583a
JB
3592018-01-10 Jan Beulich <jbeulich@suse.com>
360
361 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
362 * i386-tbl.h: Re-generate.
363
c9e92278
JB
3642018-01-10 Jan Beulich <jbeulich@suse.com>
365
366 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
367 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
368 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
369 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
370 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
371 Disp8MemShift of AVX512VL forms.
372 * i386-tbl.h: Re-generate.
373
35fd2b2b
JW
3742018-01-09 Jim Wilson <jimw@sifive.com>
375
376 * riscv-dis.c (maybe_print_address): If base_reg is zero,
377 then the hi_addr value is zero.
378
91d8b670
JG
3792018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
380
381 * arm-dis.c (arm_opcodes): Add csdb.
382 (thumb32_opcodes): Add csdb.
383
be2e7d95
JG
3842018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
385
386 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
387 * aarch64-asm-2.c: Regenerate.
388 * aarch64-dis-2.c: Regenerate.
389 * aarch64-opc-2.c: Regenerate.
390
704a705d
L
3912018-01-08 H.J. Lu <hongjiu.lu@intel.com>
392
393 PR gas/22681
394 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
395 Remove AVX512 vmovd with 64-bit operands.
396 * i386-tbl.h: Regenerated.
397
35eeb78f
JW
3982018-01-05 Jim Wilson <jimw@sifive.com>
399
400 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
401 jalr.
402
219d1afa
AM
4032018-01-03 Alan Modra <amodra@gmail.com>
404
405 Update year range in copyright notice of all files.
406
1508bbf5
JB
4072018-01-02 Jan Beulich <jbeulich@suse.com>
408
409 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
410 and OPERAND_TYPE_REGZMM entries.
411
1e563868 412For older changes see ChangeLog-2017
3499769a 413\f
1e563868 414Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM
415
416Copying and distribution of this file, with or without modification,
417are permitted in any medium without royalty provided the copyright
418notice and this notice are preserved.
419
420Local Variables:
421mode: change-log
422left-margin: 8
423fill-column: 74
424version-control: never
425End:
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