[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>

	* arm-dis.c (print_insn_neon):  Ensure disassembly of Neon 
	constants is the same on 32-bit and 64-bit hosts.

2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>

	* m68k-dis.c (print_insn_m68k): Emit undefined instructions as
	.short directives so that they can be reassembled.

2010-05-26  Catherine Moore <clm@codesourcery.com>
	    David Ung  <davidu@mips.com>

	* mips-opc.c: Change membership to I1 for instructions ssnop and
	ehb.

2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (sib): New.
	(get_sib): Likewise.
	(print_insn): Call get_sib.
	OP_E_memory): Use sib.

2010-05-26  Catherine Moore  <clm@codesoourcery.com>

	* mips-dis.c (mips_arch): Remove INSN_MIPS16.
	* mips-opc.c (I16): Remove.
	(mips_builtin_op): Reclassify jalx.

2010-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
	divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.

2010-05-13  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.

2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>

	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	format.
	(print_insn_thumb16): Add support for new %W format.

2010-05-07  Tristan Gingold  <gingold@adacore.com>

	* Makefile.in: Regenerate with automake 1.11.1.
	* aclocal.m4: Ditto.

2010-05-05  Nick Clifton  <nickc@redhat.com>

	* po/es.po: Updated Spanish translation.

2010-04-22  Nick Clifton  <nickc@redhat.com>

	* po/opcodes.pot: Updated by the Translation project.
	* po/vi.po: Updated Vietnamese translation.

2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	bits in opcode.

2010-04-09  Nick Clifton  <nickc@redhat.com>

	* i386-dis.c (print_insn): Remove unused variable op.
	(OP_sI): Remove unused variable mask.

2010-04-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (RBOPT): New define.
	("dccci"): Enable for PPCA2.  Make operands optional.
	("iccci"): Likewise.  Do not deprecate for PPC476.

2010-04-02  Masaki Muranaka  <monaka@monami-software.com>

	* cr16-opc.c (cr16_instruction): Fix typo in comment.

2010-03-25  Joseph Myers  <joseph@codesourcery.com>

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

2010-03-24  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.

2010-03-23  Joseph Myers  <joseph@codesourcery.com>

	* dis-buf.c (buffer_read_memory): Give error for reading just
	before the start of memory.

2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill <quentin.neill@amd.com>

	* i386-dis.c (OP_LWP_I): Removed.
	(reg_table): Do not use OP_LWP_I, use Iq.
	(OP_LWPCB_E): Remove use of names16.
	(OP_LWP_E): Same.
	* i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
	should not set the Vex.length bit.
	* i386-tbl.h: Regenerated.

2010-02-25  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".

2010-02-24  Nick Clifton  <nickc@redhat.com>

	PR binutils/6773
	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
	(thumb32_opcodes): Likewise.

2010-02-15  Nick Clifton  <nickc@redhat.com>

	* po/vi.po: Updated Vietnamese translation.

2010-02-12  Doug Evans  <dje@sebabeach.org>

	* lm32-opinst.c: Regenerate.

2010-02-11  Doug Evans  <dje@sebabeach.org>

	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	(print_address): Delete CGEN_PRINT_ADDRESS.
	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.

	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2010-02-10  Quentin Neill  <quentin.neill@amd.com>
	    Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	function to handle 5th imm8 operand.
	(PREFIX_VEX_3A48): Added.
	(PREFIX_VEX_3A49): Added.
	(VEX_W_3A48_P_2): Added.
	(VEX_W_3A49_P_2): Added.
	(prefix table): Added entries for PREFIX_VEX_3A48
	and PREFIX_VEX_3A49.
	(vex table): Added entries for VEX_W_3A48_P_2 and
	and VEX_W_3A49_P_2.
	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	for Vec_Imm4 operands.
	* i386-opc.h (enum): Added Vec_Imm4.
	(i386_operand_type): Added vec_imm4.
	* i386-opc.tbl: Add entries for vpermilp[ds].
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>

	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.

2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>

	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).

2010-02-03  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

2010-02-03  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	0x0f, and make 0x00 an illegal instruction.

2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Bad_Opcode): New.
	(bad_opcode): Likewise.
	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(float_reg): Likewise.
	(reg_table): Remove trailing "(bad)" entries.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Handle bytemode 0.

2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEXScalar): New.

	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	instructions.
	* i386-tbl.h: Regenerated.

2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.

2010-01-20  Nick Clifton  <nickc@redhat.com>

	PR 11170
	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	based post-indexed addressing.

2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	comments.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (names_mm): New.
	(intel_names_mm): Likewise.
	(att_names_mm): Likewise.
	(names_xmm): Likewise.
	(intel_names_xmm): Likewise.
	(att_names_xmm): Likewise.
	(names_ymm): Likewise.
	(intel_names_ymm): Likewise.
	(att_names_ymm): Likewise.
	(print_insn): Set names_mm, names_xmm and names_ymm.
	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_EMC): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_VexReg): Likewise.
	(OP_Vex_2src): Likewise.
	(OP_Vex_2src_1): Likewise.
	(OP_Vex_2src_2): Likewise.
	(OP_REG_VexI4): Likewise.

2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Update comments.

2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (rex_original): Removed.
	(ckprefix): Remove rex_original.
	(print_insn): Update comments.

2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in: Regenerate.
	* configure: Regenerate.

2010-01-07  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-06  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	* i386-init.h: Regenerated.

2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>

	* arm-dis.c (print_insn): Fixed search for next symbol and data
	dumping condition, and the initial mapping symbol state.

2010-01-05  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-04  Nick Clifton  <nickc@redhat.com>

	PR 11123
	* arm-dis.c (print_insn_coprocessor): Initialise value.

2010-01-04  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".

2010-01-02  Doug Evans  <dje@sebabeach.org>

	* cgen-asm.in: Update copyright year.
	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

For older changes see ChangeLog-2009
\f
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Commit	Line	Data
9d82ec38 MGD	1	2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
	2
	3	* arm-dis.c (print_insn_neon): Ensure disassembly of Neon
	4	constants is the same on 32-bit and 64-bit hosts.
	5
c3a6ea62	6	2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
d8b24b95 NC	7
	8	* m68k-dis.c (print_insn_m68k): Emit undefined instructions as
	9	.short directives so that they can be reassembled.
	10
9db8dccb CM	11	2010-05-26 Catherine Moore <clm@codesourcery.com>
	12	David Ung <davidu@mips.com>
	13
	14	* mips-opc.c: Change membership to I1 for instructions ssnop and
	15	ehb.
	16
dfc8cf43 L	17	2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
	18
	19	* i386-dis.c (sib): New.
	20	(get_sib): Likewise.
	21	(print_insn): Call get_sib.
	22	OP_E_memory): Use sib.
	23
f79e2745 CM	24	2010-05-26 Catherine Moore <clm@codesoourcery.com>
	25
	26	* mips-dis.c (mips_arch): Remove INSN_MIPS16.
	27	* mips-opc.c (I16): Remove.
	28	(mips_builtin_op): Reclassify jalx.
	29
51b5d4a8 AM	30	2010-05-19 Alan Modra <amodra@gmail.com>
	31
	32	* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
	33	divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
	34
85d4ac0b AM	35	2010-05-13 Alan Modra <amodra@gmail.com>
	36
	37	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
	38
4547cb56 NC	39	2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
	40
	41	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	42	format.
	43	(print_insn_thumb16): Add support for new %W format.
	44
6540b386 TG	45	2010-05-07 Tristan Gingold <gingold@adacore.com>
	46
	47	* Makefile.in: Regenerate with automake 1.11.1.
	48	* aclocal.m4: Ditto.
	49
3e01a7fd NC	50	2010-05-05 Nick Clifton <nickc@redhat.com>
	51
	52	* po/es.po: Updated Spanish translation.
	53
9c9c98a5 NC	54	2010-04-22 Nick Clifton <nickc@redhat.com>
	55
	56	* po/opcodes.pot: Updated by the Translation project.
	57	* po/vi.po: Updated Vietnamese translation.
	58
f07af43e L	59	2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
	60
	61	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	62	bits in opcode.
	63
3d540e93 NC	64	2010-04-09 Nick Clifton <nickc@redhat.com>
	65
	66	* i386-dis.c (print_insn): Remove unused variable op.
	67	(OP_sI): Remove unused variable mask.
	68
397841b5 AM	69	2010-04-07 Alan Modra <amodra@gmail.com>
	70
	71	* configure: Regenerate.
	72
cee62821 PB	73	2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
	74
	75	* ppc-opc.c (RBOPT): New define.
	76	("dccci"): Enable for PPCA2. Make operands optional.
	77	("iccci"): Likewise. Do not deprecate for PPC476.
	78
accf4463 NC	79	2010-04-02 Masaki Muranaka <monaka@monami-software.com>
	80
	81	* cr16-opc.c (cr16_instruction): Fix typo in comment.
	82
40b36596 JM	83	2010-03-25 Joseph Myers <joseph@codesourcery.com>
	84
	85	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	86	* Makefile.in: Regenerate.
	87	* configure.in (bfd_tic6x_arch): New.
	88	* configure: Regenerate.
	89	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	90	(disassembler): Handle TI C6X.
	91	* tic6x-dis.c: New.
	92
1985c81c MF	93	2010-03-24 Mike Frysinger <vapier@gentoo.org>
	94
	95	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
	96
f66187fd JM	97	2010-03-23 Joseph Myers <joseph@codesourcery.com>
	98
	99	* dis-buf.c (buffer_read_memory): Give error for reading just
	100	before the start of memory.
	101
ce7d077e SP	102	2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
	103	Quentin Neill <quentin.neill@amd.com>
	104
	105	* i386-dis.c (OP_LWP_I): Removed.
	106	(reg_table): Do not use OP_LWP_I, use Iq.
	107	(OP_LWPCB_E): Remove use of names16.
	108	(OP_LWP_E): Same.
	109	* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
	110	should not set the Vex.length bit.
	111	* i386-tbl.h: Regenerated.
	112
63d0fa4e AM	113	2010-02-25 Edmar Wienskoski <edmar@freescale.com>
	114
	115	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
	116
c060226a NC	117	2010-02-24 Nick Clifton <nickc@redhat.com>
	118
	119	PR binutils/6773
	120	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	121	<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
	122	(thumb32_opcodes): Likewise.
	123
ab7875de NC	124	2010-02-15 Nick Clifton <nickc@redhat.com>
	125
	126	* po/vi.po: Updated Vietnamese translation.
	127
fee1d3e8 DE	128	2010-02-12 Doug Evans <dje@sebabeach.org>
	129
	130	* lm32-opinst.c: Regenerate.
	131
37ec9240 DE	132	2010-02-11 Doug Evans <dje@sebabeach.org>
37ec9240 DE	133
9468ae89 DE	134	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	135	(print_address): Delete CGEN_PRINT_ADDRESS.
	136	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	137	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	138	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	139	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
	140
37ec9240 DE	141	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	142	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	143	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	144	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	145	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	146	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	147	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	148	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	149	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	150	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	151	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	152	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
	153
c75ef631 L	154	2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
	155
	156	* i386-dis.c: Update copyright.
	157	* i386-gen.c: Likewise.
	158	* i386-opc.h: Likewise.
	159	* i386-opc.tbl: Likewise.
	160
a683cc34 SP	161	2010-02-10 Quentin Neill <quentin.neill@amd.com>
	162	Sebastian Pop <sebastian.pop@amd.com>
	163
	164	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	165	function to handle 5th imm8 operand.
	166	(PREFIX_VEX_3A48): Added.
	167	(PREFIX_VEX_3A49): Added.
	168	(VEX_W_3A48_P_2): Added.
	169	(VEX_W_3A49_P_2): Added.
	170	(prefix table): Added entries for PREFIX_VEX_3A48
	171	and PREFIX_VEX_3A49.
	172	(vex table): Added entries for VEX_W_3A48_P_2 and
	173	and VEX_W_3A49_P_2.
	174	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	175	for Vec_Imm4 operands.
	176	* i386-opc.h (enum): Added Vec_Imm4.
	177	(i386_operand_type): Added vec_imm4.
	178	* i386-opc.tbl: Add entries for vpermilp[ds].
	179	* i386-init.h: Regenerated.
	180	* i386-tbl.h: Regenerated.
	181
cdc51b07 RS	182	2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
	183
	184	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	185	and "pwr7". Move "a2" into alphabetical order.
	186
ce3d2015 AM	187	2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
	188
	189	* ppc-dis.c (ppc_opts): Add titan entry.
	190	* ppc-opc.c (TITAN, MULHW): Define.
	191	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
	192
68339fdf SP	193	2010-02-03 Quentin Neill <quentin.neill@amd.com>
	194
	195	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	196	to CPU_BDVER1_FLAGS
	197	* i386-init.h: Regenerated.
	198
f3d55a94 AG	199	2010-02-03 Anthony Green <green@moxielogic.com>
	200
	201	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	202	0x0f, and make 0x00 an illegal instruction.
	203
b0e28b39 DJ	204	2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
	205
	206	* opcodes/arm-dis.c (struct arm_private_data): New.
	207	(print_insn_coprocessor, print_insn_arm): Update to use struct
	208	arm_private_data.
	209	(is_mapping_symbol, get_map_sym_type): New functions.
	210	(get_sym_code_type): Check the symbol's section. Do not check
	211	mapping symbols.
	212	(print_insn): Default to disassembling ARM mode code. Check
	213	for mapping symbols separately from other symbols. Use
	214	struct arm_private_data.
	215
1c480963 L	216	2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
	217
	218	* i386-dis.c (EXVexWdqScalar): New.
	219	(vex_scalar_w_dq_mode): Likewise.
	220	(prefix_table): Update entries for PREFIX_VEX_3899,
	221	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	222	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	223	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	224	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	225	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	226	(OP_EX): Likewise.
	227
539f890d L	228	2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
	229
	230	* i386-dis.c (XMScalar): New.
	231	(EXdScalar): Likewise.
	232	(EXqScalar): Likewise.
	233	(EXqScalarS): Likewise.
	234	(VexScalar): Likewise.
	235	(EXdVexScalarS): Likewise.
	236	(EXqVexScalarS): Likewise.
	237	(XMVexScalar): Likewise.
	238	(scalar_mode): Likewise.
	239	(d_scalar_mode): Likewise.
	240	(d_scalar_swap_mode): Likewise.
	241	(q_scalar_mode): Likewise.
	242	(q_scalar_swap_mode): Likewise.
	243	(vex_scalar_mode): Likewise.
	244	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	245	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	246	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	247	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	248	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	249	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	250	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	251	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	252	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	253	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	254	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	255	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	256	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	257	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	258	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	259	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	260	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	261	VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
	262	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	263	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	264	q_scalar_mode, q_scalar_swap_mode.
	265	(OP_XMM): Handle scalar_mode.
	266	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	267	and q_scalar_swap_mode.
	268	(OP_VEX): Handle vex_scalar_mode.
	269
208b4d78 L	270	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	271
	272	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	273
448b213a L	274	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	275
	276	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
	277
47cf8fa0 L	278	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	279
	280	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	281
592d1631 L	282	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	283
	284	* i386-dis.c (Bad_Opcode): New.
	285	(bad_opcode): Likewise.
	286	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	287	(dis386_twobyte): Likewise.
	288	(reg_table): Likewise.
	289	(prefix_table): Likewise.
	290	(x86_64_table): Likewise.
	291	(vex_len_table): Likewise.
	292	(vex_w_table): Likewise.
	293	(mod_table): Likewise.
	294	(rm_table): Likewise.
	295	(float_reg): Likewise.
	296	(reg_table): Remove trailing "(bad)" entries.
	297	(prefix_table): Likewise.
	298	(x86_64_table): Likewise.
	299	(vex_len_table): Likewise.
	300	(vex_w_table): Likewise.
	301	(mod_table): Likewise.
	302	(rm_table): Likewise.
	303	(get_valid_dis386): Handle bytemode 0.
	304
712366da L	305	2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
	306
	307	* i386-opc.h (VEXScalar): New.
	308
	309	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	310	instructions.
	311	* i386-tbl.h: Regenerated.
	312
706e8205	313	2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729 L	314
	315	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
	316
	317	* i386-opc.tbl: Add xsave64 and xrstor64.
	318	* i386-tbl.h: Regenerated.
	319
99ea83aa NC	320	2010-01-20 Nick Clifton <nickc@redhat.com>
	321
	322	PR 11170
	323	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	324	based post-indexed addressing.
	325
a6461c02 SP	326	2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
	327
	328	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	329	* i386-tbl.h: Regenerated.
	330
a2a7d12c L	331	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	332
	333	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	334	comments.
	335
b9733481 L	336	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	337
	338	* i386-dis.c (names_mm): New.
	339	(intel_names_mm): Likewise.
	340	(att_names_mm): Likewise.
	341	(names_xmm): Likewise.
	342	(intel_names_xmm): Likewise.
	343	(att_names_xmm): Likewise.
	344	(names_ymm): Likewise.
	345	(intel_names_ymm): Likewise.
	346	(att_names_ymm): Likewise.
	347	(print_insn): Set names_mm, names_xmm and names_ymm.
	348	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	349	(OP_XMM): Likewise.
	350	(OP_EM): Likewise.
	351	(OP_EMC): Likewise.
	352	(OP_MXC): Likewise.
	353	(OP_EX): Likewise.
	354	(XMM_Fixup): Likewise.
	355	(OP_VEX): Likewise.
	356	(OP_EX_VexReg): Likewise.
	357	(OP_Vex_2src): Likewise.
	358	(OP_Vex_2src_1): Likewise.
	359	(OP_Vex_2src_2): Likewise.
	360	(OP_REG_VexI4): Likewise.
	361
5e6718e4 L	362	2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
	363
	364	* i386-dis.c (print_insn): Update comments.
	365
d869730d L	366	2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
	367
	368	* i386-dis.c (rex_original): Removed.
	369	(ckprefix): Remove rex_original.
	370	(print_insn): Update comments.
	371
3725885a RW	372	2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	373
	374	* Makefile.in: Regenerate.
	375	* configure: Regenerate.
	376
b7cd1872 DE	377	2010-01-07 Doug Evans <dje@sebabeach.org>
	378
	379	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	380	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	381	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	382	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	383	* xstormy16-ibld.c: Regenerate.
	384
69dd9865 SP	385	2010-01-06 Quentin Neill <quentin.neill@amd.com>
	386
	387	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	388	* i386-init.h: Regenerated.
	389
e3e535bc NC	390	2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
	391
	392	* arm-dis.c (print_insn): Fixed search for next symbol and data
	393	dumping condition, and the initial mapping symbol state.
	394
fe8afbc4 DE	395	2010-01-05 Doug Evans <dje@sebabeach.org>
	396
	397	* cgen-ibld.in: #include "cgen/basic-modes.h".
	398	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	399	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	400	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	401	* xstormy16-ibld.c: Regenerate.
	402
2edcd244 NC	403	2010-01-04 Nick Clifton <nickc@redhat.com>
	404
	405	PR 11123
	406	* arm-dis.c (print_insn_coprocessor): Initialise value.
	407
0dc93057 AM	408	2010-01-04 Edmar Wienskoski <edmar@freescale.com>
	409
	410	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
	411
05994f45 DE	412	2010-01-02 Doug Evans <dje@sebabeach.org>
	413
	414	* cgen-asm.in: Update copyright year.
	415	* cgen-dis.in: Update copyright year.
	416	* cgen-ibld.in: Update copyright year.
	417	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	418	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	419	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	420	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	421	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	422	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	423	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	424	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	425	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	426	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	427	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	428	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	429	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	430	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	431	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	432	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	433	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	434	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	435	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	436	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	437	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f	438
43ecc30f	439	For older changes see ChangeLog-2009
252b5132 RH	440	\f
252b5132 RH	441	Local Variables:
2f6d2f85 NC	442	mode: change-log
	443	left-margin: 8
	444	fill-column: 74
252b5132 RH	445	version-control: never
252b5132 RH	446	End: