Commit | Line | Data |
---|---|---|
17d3c7ec JB |
1 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
2 | ||
3 | * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D, | |
4 | PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete. | |
5 | (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si, | |
6 | vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries. | |
7 | Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for | |
8 | the latter two. | |
9 | * i386-dis-evex.h (evex_table): Reference VEX table for opcodes | |
10 | 0F2C, 0F2D, 0F2E, and 0F2F. | |
11 | * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and | |
12 | 0F2F table entries. | |
13 | ||
41f5efc6 JB |
14 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
15 | ||
16 | * i386-dis.c (OP_VexR, VexScalarR): New. | |
17 | (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS, | |
18 | XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode, | |
19 | need_vex_reg): Delete. | |
20 | (prefix_table): Replace VexScalar by VexScalarR and | |
21 | XMVexScalar by XMScalar for vmovss and vmovsd. Replace | |
22 | EXdVexScalarS by EXdS and EXqVexScalarS by EXqS. | |
23 | (vex_len_table): Replace EXqVexScalarS by EXqS. | |
24 | (get_valid_dis386): Don't set need_vex_reg. | |
25 | (print_insn): Don't initialize need_vex_reg. | |
26 | (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and | |
27 | q_scalar_swap_mode cases. | |
28 | (OP_EX): Don't check for d_scalar_swap_mode and | |
29 | q_scalar_swap_mode. | |
30 | (OP_VEX): Done check need_vex_reg. | |
31 | * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and | |
32 | XMVexScalar by XMScalar for vmovss and vmovsd. Replace | |
33 | EXdVexScalarS by EXdS and EXqVexScalarS by EXqS. | |
34 | ||
89e65d17 JB |
35 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
36 | ||
37 | * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete. | |
38 | (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2, | |
39 | VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2, | |
40 | VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ... | |
41 | (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0, | |
42 | VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0, | |
43 | VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0, | |
44 | VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively. | |
45 | (vex_table): Replace Vex128 by Vex. | |
46 | (vex_len_table): Likewise. Adjust referenced enum names. | |
47 | (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust | |
48 | referenced enum names. | |
49 | (OP_VEX): Drop vex128_mode and vex256_mode cases. | |
50 | * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex. | |
51 | ||
492a76aa JB |
52 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
53 | ||
54 | * i386-dis.c (dis386): "LW" description now applies to "DQ". | |
55 | (putop): Handle "DQ". Don't handle "LW" anymore. | |
56 | (prefix_table, mod_table): Replace %LW by %DQ. | |
57 | * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise. | |
58 | ||
059edf8b JB |
59 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
60 | ||
61 | * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode, | |
62 | dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and | |
63 | d_scalar_swap_mode case handling. Move shift adjsutment into | |
64 | the case its applicable to. | |
65 | ||
4726e9a4 JB |
66 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
67 | ||
68 | * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete. | |
69 | (EXbScalar, EXwScalar): Fold to ... | |
70 | (EXbwUnit): ... this. | |
71 | (b_scalar_mode, w_scalar_mode): Fold to ... | |
72 | (bw_unit_mode): ... this. | |
73 | (intel_operand_size, OP_E_memory): Replace b_scalar_mode / | |
74 | w_scalar_mode handling by bw_unit_mode one. | |
75 | * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863 | |
76 | ... | |
77 | * i386-dis-evex-prefix.h: ... here. | |
78 | ||
b24d668c JB |
79 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
80 | ||
81 | * i386-dis.c (PCMPESTR_Fixup): Delete. | |
82 | (dis386): Adjust "LQ" description. | |
83 | (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss, | |
84 | cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of | |
85 | PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri, | |
86 | vpcmpestrm, and vpcmpestri. | |
87 | (putop): Honor "cond" when handling LQ. | |
88 | * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for | |
89 | vcvtsi2ss and vcvtusi2ss. | |
90 | * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for | |
91 | vcvtsi2sd and vcvtusi2sd. | |
92 | ||
c4de7606 JB |
93 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
94 | ||
95 | * i386-dis.c (VCMP_Fixup, VCMP): Delete. | |
96 | (simd_cmp_op): Add const. | |
97 | (vex_cmp_op): Move up and drop initial 8 entries. Add const. | |
98 | (CMP_Fixup): Handle VEX case. | |
99 | (prefix_table): Replace VCMP by CMP. | |
100 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise. | |
101 | ||
9ab00b61 JB |
102 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
103 | ||
104 | * i386-dis.c (MOVBE_Fixup): Delete. | |
105 | (Mv): Define. | |
106 | (prefix_table): Use Mv for movbe entries. | |
107 | ||
2875b28a JB |
108 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
109 | ||
110 | * i386-dis.c (CRC32_Fixup): Delete. | |
111 | (prefix_table): Use Eb/Ev for crc32 entries. | |
112 | ||
e184e611 JB |
113 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
114 | ||
115 | * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup): | |
116 | Conditionalize invocations of "USED_REX (0)". | |
117 | ||
e8b5d5f9 JB |
118 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
119 | ||
120 | * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH, | |
121 | CH, DH, BH, AX, DX): Delete. | |
122 | (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg, | |
123 | eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg, | |
124 | dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left. | |
125 | ||
260cd341 LC |
126 | 2020-07-10 Lili Cui <lili.cui@intel.com> |
127 | ||
128 | * i386-dis.c (TMM): New. | |
129 | (EXtmm): Likewise. | |
130 | (VexTmm): Likewise. | |
131 | (MVexSIBMEM): Likewise. | |
132 | (tmm_mode): Likewise. | |
133 | (vex_sibmem_mode): Likewise. | |
134 | (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise. | |
135 | (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise. | |
136 | (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise. | |
137 | (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise. | |
138 | (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise. | |
139 | (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise. | |
140 | (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise. | |
141 | (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise. | |
142 | (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise. | |
143 | (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise. | |
144 | (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise. | |
145 | (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise. | |
146 | (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise. | |
147 | (PREFIX_VEX_0F3849_X86_64): Likewise. | |
148 | (PREFIX_VEX_0F384B_X86_64): Likewise. | |
149 | (PREFIX_VEX_0F385C_X86_64): Likewise. | |
150 | (PREFIX_VEX_0F385E_X86_64): Likewise. | |
151 | (X86_64_VEX_0F3849): Likewise. | |
152 | (X86_64_VEX_0F384B): Likewise. | |
153 | (X86_64_VEX_0F385C): Likewise. | |
154 | (X86_64_VEX_0F385E): Likewise. | |
155 | (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise. | |
156 | (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise. | |
157 | (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise. | |
158 | (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise. | |
159 | (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise. | |
160 | (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise. | |
161 | (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise. | |
162 | (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise. | |
163 | (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise. | |
164 | (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise. | |
165 | (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise. | |
166 | (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise. | |
167 | (VEX_W_0F3849_X86_64_P_0): Likewise. | |
168 | (VEX_W_0F3849_X86_64_P_2): Likewise. | |
169 | (VEX_W_0F3849_X86_64_P_3): Likewise. | |
170 | (VEX_W_0F384B_X86_64_P_1): Likewise. | |
171 | (VEX_W_0F384B_X86_64_P_2): Likewise. | |
172 | (VEX_W_0F384B_X86_64_P_3): Likewise. | |
173 | (VEX_W_0F385C_X86_64_P_1): Likewise. | |
174 | (VEX_W_0F385E_X86_64_P_0): Likewise. | |
175 | (VEX_W_0F385E_X86_64_P_1): Likewise. | |
176 | (VEX_W_0F385E_X86_64_P_2): Likewise. | |
177 | (VEX_W_0F385E_X86_64_P_3): Likewise. | |
178 | (names_tmm): Likewise. | |
179 | (att_names_tmm): Likewise. | |
180 | (intel_operand_size): Handle void_mode. | |
181 | (OP_XMM): Handle tmm_mode. | |
182 | (OP_EX): Likewise. | |
183 | (OP_VEX): Likewise. | |
184 | * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8, | |
185 | CpuAMX_BF16 and CpuAMX_TILE. | |
186 | (operand_type_shorthands): Add RegTMM. | |
187 | (operand_type_init): Likewise. | |
188 | (operand_types): Add Tmmword. | |
189 | (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. | |
190 | (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. | |
191 | * i386-opc.h (CpuAMX_INT8): New. | |
192 | (CpuAMX_BF16): Likewise. | |
193 | (CpuAMX_TILE): Likewise. | |
194 | (SIBMEM): Likewise. | |
195 | (Tmmword): Likewise. | |
196 | (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile. | |
197 | (i386_opcode_modifier): Extend width of fields vexvvvv and sib. | |
198 | (i386_operand_type): Add tmmword. | |
199 | * i386-opc.tbl: Add AMX instructions. | |
200 | * i386-reg.tbl: Add AMX registers. | |
201 | * i386-init.h: Regenerated. | |
202 | * i386-tbl.h: Likewise. | |
203 | ||
467bbef0 JB |
204 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
205 | ||
206 | * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete. | |
207 | (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02): | |
208 | Rename to ... | |
209 | (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0, | |
210 | REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these | |
211 | respectively. | |
212 | (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86, | |
213 | VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F, | |
214 | VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97, | |
215 | VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3, | |
216 | VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0, | |
217 | VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3, | |
218 | VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1, | |
219 | VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92, | |
220 | VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95, | |
221 | VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98, | |
222 | VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B, | |
223 | VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3, | |
224 | VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB, | |
225 | VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3, | |
226 | VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB, | |
227 | VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3, | |
228 | VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0, | |
229 | VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0, | |
230 | VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0, | |
231 | VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0, | |
232 | VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0, | |
233 | VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0, | |
234 | VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0, | |
235 | VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0, | |
236 | VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0, | |
237 | VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0, | |
238 | VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0, | |
239 | VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0, | |
240 | VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0, | |
241 | VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0, | |
242 | VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0, | |
243 | VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0, | |
244 | VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0, | |
245 | VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0, | |
246 | VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0, | |
247 | VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators. | |
248 | (reg_table): Re-order XOP entries. Adjust their operands. | |
249 | (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95, | |
250 | 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1, | |
251 | 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93, | |
252 | 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1, | |
253 | 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6, | |
254 | 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12 | |
255 | entries by references ... | |
256 | (vex_len_table): ... to resepctive new entries here. For several | |
257 | new and existing entries reference ... | |
258 | (vex_w_table): ... new entries here. | |
259 | (mod_table): New MOD_VEX_0FXOP_09_12 entry. | |
260 | ||
6384fd9e JB |
261 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
262 | ||
263 | * i386-dis.c (XMVexScalarI4): Define. | |
264 | (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2, | |
265 | VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2, | |
266 | VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete. | |
267 | (vex_len_table): Move scalar FMA4 entries ... | |
268 | (prefix_table): ... here. | |
269 | (OP_REG_VexI4): Handle scalar_mode. | |
270 | * i386-opc.tbl: Use VexLIG for scalar FMA4 insns. | |
271 | * i386-tbl.h: Re-generate. | |
272 | ||
e6123d0c JB |
273 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
274 | ||
275 | * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1, | |
276 | Vex_2src_2): Delete. | |
277 | (OP_VexW, VexW): New. | |
278 | (xop_table): Use EXx for rotates by immediate. Use EXx and VexW | |
279 | for shifts and rotates by register. | |
280 | ||
93abb146 JB |
281 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
282 | ||
283 | * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW, | |
284 | VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8, | |
285 | OP_EX_VexReg): Delete. | |
286 | (OP_VexI4, VexI4): New. | |
287 | (vex_w_table): Move vpermil2ps and vpermil2pd entries ... | |
288 | (prefix_table): ... here. | |
289 | (print_insn): Drop setting of vex_w_done. | |
290 | ||
b13b1bc0 JB |
291 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
292 | ||
293 | * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete. | |
294 | (prefix_table, vex_len_table): Replace operands for FMA4 insns. | |
295 | (xop_table): Replace operands of 4-operand insns. | |
296 | (OP_REG_VexI4): Move VEX.W based operand swaping here. | |
297 | ||
f337259f CZ |
298 | 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com> |
299 | ||
300 | * arc-opc.c (insert_rbd): New function. | |
301 | (RBD): Define. | |
302 | (RBDdup): Likewise. | |
303 | * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update | |
304 | instructions. | |
305 | ||
931452b6 JB |
306 | 2020-07-07 Jan Beulich <jbeulich@suse.com> |
307 | ||
308 | * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, | |
309 | EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2, | |
310 | EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2, | |
311 | EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2): | |
312 | Delete. | |
313 | (putop): Handle "BW". | |
314 | * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826, | |
315 | 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E, | |
316 | and 0F3A3F ... | |
317 | * i386-dis-evex-prefix.h: ... here. | |
318 | ||
b5b098c2 JB |
319 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
320 | ||
321 | * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete. | |
322 | (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0, | |
323 | VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82, | |
324 | VEX_W_0FXOP_09_83): New enumerators. | |
325 | (xop_table): Reference the above. | |
326 | (vex_len_table): Replace vfrczp* entries by vfrczs* ones. | |
327 | (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, | |
328 | VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries. | |
329 | (get_valid_dis386): Return bad_opcode for XOP.PP != 0. | |
330 | ||
21a3faeb JB |
331 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
332 | ||
333 | * i386-dis.c (EVEX_W_0F3838_P_1, | |
334 | EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2, | |
335 | EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2, | |
336 | EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, | |
337 | EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2, | |
338 | EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete. | |
339 | (putop): Centralize management of last[]. Delete SAVE_LAST. | |
340 | * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839, | |
341 | 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56, | |
342 | 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ... | |
343 | * i386-dis-evex-prefix.h: here. | |
344 | ||
bc152a17 JB |
345 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
346 | ||
347 | * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1, | |
348 | MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1, | |
349 | MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1, | |
350 | MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New | |
351 | enumerators. | |
352 | (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1, | |
353 | EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1, | |
354 | EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1, | |
355 | EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ... | |
356 | (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0, | |
357 | EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0, | |
358 | EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0, | |
359 | EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ... | |
360 | these, respectively. | |
361 | * i386-dis-evex-len.h: Adjust comments. | |
362 | * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0, | |
363 | MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0, | |
364 | MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0, | |
365 | MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and | |
366 | MOD_EVEX_0F385B_P_2_W_1 table entries. | |
367 | * i386-dis-evex-w.h: Reference mod_table[] for | |
368 | EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and | |
369 | EVEX_W_0F385B_P_2. | |
370 | ||
c82a99a0 JB |
371 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
372 | ||
373 | * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8, | |
374 | vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use | |
375 | EXymm. | |
376 | (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4): | |
377 | Likewise. Mark 256-bit entries invalid. | |
378 | ||
fedfb81e JB |
379 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
380 | ||
381 | * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A, | |
382 | PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D, | |
383 | PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4, | |
384 | PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, | |
385 | PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE, | |
386 | PREFIX_EVEX_0F382B): Delete. | |
387 | (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2, | |
388 | EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2, | |
389 | EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2, | |
390 | EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2, | |
391 | EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename | |
392 | to ... | |
393 | (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C, | |
394 | EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4, | |
395 | EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA, | |
396 | EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these | |
397 | respectively. | |
398 | * i386-dis-evex.h (evex_table): Reference VEX_W table entries | |
399 | for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, | |
400 | 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B. | |
401 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A, | |
402 | PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D, | |
403 | PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4, | |
404 | PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, | |
405 | PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE, | |
406 | PREFIX_EVEX_0F382B): Remove table entries. | |
407 | * i386-dis-evex-w.h: Reference VEX table entries for opcodes | |
408 | 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3, | |
409 | 0FF4, 0FFA, 0FFB, 0FFE, 0F382B. | |
410 | ||
3a57774c JB |
411 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
412 | ||
413 | * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2, | |
414 | EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New | |
415 | enumerators. | |
416 | * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2, | |
417 | EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and | |
418 | EVEX_LEN_0F3A01_P_2_W_1 table entries. | |
419 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above | |
420 | entries. | |
421 | ||
e74d9fa9 JB |
422 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
423 | ||
424 | * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, | |
425 | EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2, | |
426 | EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2, | |
427 | EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators. | |
428 | * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2, | |
429 | EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, | |
430 | EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2, | |
431 | EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries. | |
432 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above | |
433 | entries. | |
434 | ||
6431c801 JB |
435 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
436 | ||
437 | * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete. | |
438 | (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators. | |
439 | (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 | |
440 | respectively. | |
441 | (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table | |
442 | entries. | |
443 | * i386-dis-evex.h (evex_table): Reference VEX table entry for | |
444 | opcode 0F3A1D. | |
445 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table | |
446 | entry. | |
447 | * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise. | |
448 | ||
6df22cf6 JB |
449 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
450 | ||
451 | * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, | |
452 | PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, | |
453 | PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, | |
454 | PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, | |
455 | PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, | |
456 | PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, | |
457 | PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, | |
458 | PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, | |
459 | PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, | |
460 | PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, | |
461 | PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, | |
462 | PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, | |
463 | PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C, | |
464 | PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, | |
465 | PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, | |
466 | PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, | |
467 | PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D, | |
468 | PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6, | |
469 | PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, | |
470 | PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE, | |
471 | PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7, | |
472 | PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA, | |
473 | PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD, | |
474 | PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF, | |
475 | PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, | |
476 | PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F, | |
477 | PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF, | |
478 | EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2, | |
479 | EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2, | |
480 | EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete. | |
481 | (prefix_table): Add EXxEVexR to FMA table entries. | |
482 | (OP_Rounding): Move abort() invocation. | |
483 | * i386-dis-evex.h (evex_table): Reference VEX table for opcodes | |
484 | 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9, | |
485 | 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8, | |
486 | 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9, | |
487 | 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C, | |
488 | 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897, | |
489 | 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7, | |
490 | 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7, | |
491 | 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF, | |
492 | 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44, | |
493 | 0F3ACE, 0F3ACF. | |
494 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, | |
495 | PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, | |
496 | PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, | |
497 | PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, | |
498 | PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, | |
499 | PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, | |
500 | PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, | |
501 | PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, | |
502 | PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, | |
503 | PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, | |
504 | PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, | |
505 | PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, | |
506 | PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C, | |
507 | PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, | |
508 | PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, | |
509 | PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, | |
510 | PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D, | |
511 | PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6, | |
512 | PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, | |
513 | PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE, | |
514 | PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7, | |
515 | PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA, | |
516 | PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD, | |
517 | PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF, | |
518 | PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, | |
519 | PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F, | |
520 | PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF): | |
521 | Delete table entries. | |
522 | * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, | |
523 | EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, | |
524 | EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): | |
525 | Likewise. | |
526 | ||
39e0f456 JB |
527 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
528 | ||
529 | * i386-dis.c (EXqScalarS): Delete. | |
530 | (vex_len_table): Replace EXqScalarS by EXqVexScalarS. | |
531 | * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS. | |
532 | ||
5b872f7d JB |
533 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
534 | ||
535 | * i386-dis.c (safe-ctype.h): Include. | |
536 | (EXdScalar, EXqScalar): Delete. | |
537 | (d_scalar_mode, q_scalar_mode): Delete. | |
538 | (prefix_table, vex_len_table): Use EXxmm_md in place of | |
539 | EXdScalar and EXxmm_mq in place of EXqScalar. | |
540 | (intel_operand_size, OP_E_memory, OP_EX): Remove uses of | |
541 | d_scalar_mode and q_scalar_mode. | |
542 | * i386-dis-evex-w.h (vmovss): Use EXxmm_md. | |
543 | (vmovsd): Use EXxmm_mq. | |
544 | ||
ddc73fa9 NC |
545 | 2020-07-06 Yuri Chornoivan <yurchor@ukr.net> |
546 | ||
547 | PR 26204 | |
548 | * arc-dis.c: Fix spelling mistake. | |
549 | * po/opcodes.pot: Regenerate. | |
550 | ||
17550be7 NC |
551 | 2020-07-06 Nick Clifton <nickc@redhat.com> |
552 | ||
553 | * po/pt_BR.po: Updated Brazilian Portugugese translation. | |
554 | * po/uk.po: Updated Ukranian translation. | |
555 | ||
b19d852d NC |
556 | 2020-07-04 Nick Clifton <nickc@redhat.com> |
557 | ||
558 | * configure: Regenerate. | |
559 | * po/opcodes.pot: Regenerate. | |
560 | ||
b115b9fd NC |
561 | 2020-07-04 Nick Clifton <nickc@redhat.com> |
562 | ||
563 | Binutils 2.35 branch created. | |
564 | ||
c2ecccb3 L |
565 | 2020-07-02 H.J. Lu <hongjiu.lu@intel.com> |
566 | ||
567 | * i386-gen.c (opcode_modifiers): Add VexSwapSources. | |
568 | * i386-opc.h (VexSwapSources): New. | |
569 | (i386_opcode_modifier): Add vexswapsources. | |
570 | * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions | |
571 | with two source operands swapped. | |
572 | * i386-tbl.h: Regenerated. | |
573 | ||
08ccfccf NC |
574 | 2020-06-30 Nelson Chu <nelson.chu@sifive.com> |
575 | ||
576 | * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the | |
577 | unprivileged CSR can also be initialized. | |
578 | ||
279edac5 AM |
579 | 2020-06-29 Alan Modra <amodra@gmail.com> |
580 | ||
581 | * arm-dis.c: Use C style comments. | |
582 | * cr16-opc.c: Likewise. | |
583 | * ft32-dis.c: Likewise. | |
584 | * moxie-opc.c: Likewise. | |
585 | * tic54x-dis.c: Likewise. | |
586 | * s12z-opc.c: Remove useless comment. | |
587 | * xgate-dis.c: Likewise. | |
588 | ||
e978ad62 L |
589 | 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> |
590 | ||
591 | * i386-opc.tbl: Add a blank line. | |
592 | ||
63112cd6 L |
593 | 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> |
594 | ||
595 | * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB. | |
596 | (VecSIB128): Renamed to ... | |
597 | (VECSIB128): This. | |
598 | (VecSIB256): Renamed to ... | |
599 | (VECSIB256): This. | |
600 | (VecSIB512): Renamed to ... | |
601 | (VECSIB512): This. | |
602 | (VecSIB): Renamed to ... | |
603 | (SIB): This. | |
604 | (i386_opcode_modifier): Replace vecsib with sib. | |
79b32e73 | 605 | * i386-opc.tbl (VecSIB128): New. |
63112cd6 L |
606 | (VecSIB256): Likewise. |
607 | (VecSIB512): Likewise. | |
79b32e73 | 608 | Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256 |
63112cd6 L |
609 | and VecSIB512, respectively. |
610 | ||
d1c36125 JB |
611 | 2020-06-26 Jan Beulich <jbeulich@suse.com> |
612 | ||
613 | * i386-dis.c: Adjust description of I macro. | |
614 | (x86_64_table): Drop use of I. | |
615 | (float_mem): Replace use of I. | |
616 | (putop): Remove handling of I. Adjust setting/clearing of "alt". | |
617 | ||
2a1bb84c JB |
618 | 2020-06-26 Jan Beulich <jbeulich@suse.com> |
619 | ||
620 | * i386-dis.c: (print_insn): Avoid straight assignment to | |
621 | priv.orig_sizeflag when processing -M sub-options. | |
622 | ||
8f570d62 JB |
623 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
624 | ||
625 | * i386-dis.c: Adjust description of J macro. | |
626 | (dis386, x86_64_table, mod_table): Replace J. | |
627 | (putop): Remove handling of J. | |
628 | ||
464dc4af JB |
629 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
630 | ||
631 | * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt. | |
632 | ||
589958d6 JB |
633 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
634 | ||
635 | * i386-dis.c: Adjust description of "LQ" macro. | |
636 | (dis386_twobyte): Use LQ for sysret. | |
637 | (putop): Adjust handling of LQ. | |
638 | ||
39ff0b81 NC |
639 | 2020-06-22 Nelson Chu <nelson.chu@sifive.com> |
640 | ||
641 | * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c. | |
642 | * riscv-dis.c: Include elfxx-riscv.h. | |
643 | ||
d27c357a JB |
644 | 2020-06-18 H.J. Lu <hongjiu.lu@intel.com> |
645 | ||
646 | * i386-dis.c (prefix_table): Revert the last vmgexit change. | |
647 | ||
6fde587f CL |
648 | 2020-06-17 Lili Cui <lili.cui@intel.com> |
649 | ||
650 | * i386-dis.c (prefix_table): Delete the incorrect vmgexit. | |
651 | ||
efe30057 L |
652 | 2020-06-14 H.J. Lu <hongjiu.lu@intel.com> |
653 | ||
654 | PR gas/26115 | |
655 | * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk. | |
656 | * i386-opc.tbl: Likewise. | |
657 | * i386-tbl.h: Regenerated. | |
658 | ||
d8af286f NC |
659 | 2020-06-12 Nelson Chu <nelson.chu@sifive.com> |
660 | ||
661 | * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9. | |
662 | ||
14962256 AC |
663 | 2020-06-11 Alex Coplan <alex.coplan@arm.com> |
664 | ||
665 | * aarch64-opc.c (SYSREG): New macro for describing system registers. | |
666 | (SR_CORE): Likewise. | |
667 | (SR_FEAT): Likewise. | |
668 | (SR_RNG): Likewise. | |
669 | (SR_V8_1): Likewise. | |
670 | (SR_V8_2): Likewise. | |
671 | (SR_V8_3): Likewise. | |
672 | (SR_V8_4): Likewise. | |
673 | (SR_PAN): Likewise. | |
674 | (SR_RAS): Likewise. | |
675 | (SR_SSBS): Likewise. | |
676 | (SR_SVE): Likewise. | |
677 | (SR_ID_PFR2): Likewise. | |
678 | (SR_PROFILE): Likewise. | |
679 | (SR_MEMTAG): Likewise. | |
680 | (SR_SCXTNUM): Likewise. | |
681 | (aarch64_sys_regs): Refactor to store feature information in the table. | |
682 | (aarch64_sys_reg_supported_p): Collapse logic for system registers | |
683 | that now describe their own features. | |
684 | (aarch64_pstatefield_supported_p): Likewise. | |
685 | ||
f9630fa6 L |
686 | 2020-06-09 H.J. Lu <hongjiu.lu@intel.com> |
687 | ||
688 | * i386-dis.c (prefix_table): Fix a typo in comments. | |
689 | ||
73239888 JB |
690 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
691 | ||
692 | * i386-dis.c (rex_ignored): Delete. | |
693 | (ckprefix): Drop rex_ignored initialization. | |
694 | (get_valid_dis386): Drop setting of rex_ignored. | |
695 | (print_insn): Drop checking of rex_ignored. Don't record data | |
696 | size prefix as used with VEX-and-alike encodings. | |
697 | ||
18897deb JB |
698 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
699 | ||
700 | * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2, | |
701 | MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators. | |
702 | (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete. | |
703 | (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define. | |
704 | (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16, | |
705 | VEX_0F12, and VEX_0F16. | |
706 | (vex_len_table): Use X for vmovlp* and vmovh*s. Drop | |
707 | VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries. | |
708 | (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE | |
709 | from movlps and movhlps. New MOD_0F12_PREFIX_2, | |
710 | MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and | |
711 | MOD_VEX_0F16_PREFIX_2 entries. | |
712 | ||
97e6786a JB |
713 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
714 | ||
715 | * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13, | |
716 | MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators. | |
717 | (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15, | |
718 | PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29, | |
719 | PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, | |
720 | PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6, | |
721 | EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0, | |
722 | EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2, | |
723 | EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, | |
724 | EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, | |
725 | EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, | |
726 | EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, | |
727 | EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, | |
728 | EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, | |
729 | EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, | |
730 | EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, | |
731 | EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, | |
732 | EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, | |
733 | EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, | |
734 | EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, | |
735 | EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, | |
736 | EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, | |
737 | EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, | |
738 | EVEX_W_0FC6_P_2): Delete. | |
739 | (print_insn): Add EVEX.W vs embedded prefix consistency check | |
740 | to prefix validation. | |
741 | * i386-dis-evex.h (evex_table): Don't further descend for | |
742 | vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX, | |
743 | and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17, | |
744 | and 0F2B. | |
745 | * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries. | |
746 | * i386-dis-evex-prefix.h: Don't further descend for vmovupX, | |
747 | vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX, | |
748 | vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases | |
749 | 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29. | |
750 | Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15, | |
751 | PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B, | |
752 | PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56, | |
753 | PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries. | |
754 | * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, | |
755 | EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, | |
756 | EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0, | |
757 | EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2, | |
758 | EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0, | |
759 | EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2, | |
760 | EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, | |
761 | EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2, | |
762 | EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0, | |
763 | EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2, | |
764 | EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0, | |
765 | EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, | |
766 | EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0, | |
767 | EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2, | |
768 | EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0, | |
769 | EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2, | |
770 | EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0, | |
771 | EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries. | |
772 | ||
bf926894 JB |
773 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
774 | ||
775 | * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX, | |
776 | vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX. | |
777 | (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and | |
778 | vmovmskpX. | |
779 | (print_insn): Drop pointless check against bad_opcode. Split | |
780 | prefix validation into legacy and VEX-and-alike parts. | |
781 | (putop): Re-work 'X' macro handling. | |
782 | ||
a5aaedb9 JB |
783 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
784 | ||
785 | * i386-dis.c (MOD_0F51): Rename to ... | |
786 | (MOD_0F50): ... this. | |
787 | ||
26417f19 AC |
788 | 2020-06-08 Alex Coplan <alex.coplan@arm.com> |
789 | ||
790 | * arm-dis.c (arm_opcodes): Add dfb. | |
791 | (thumb32_opcodes): Add dfb. | |
792 | ||
8a6fb3f9 JB |
793 | 2020-06-08 Jan Beulich <jbeulich@suse.com> |
794 | ||
795 | * i386-opc.h (reg_entry): Const-qualify reg_name field. | |
796 | ||
1424c35d AM |
797 | 2020-06-06 Alan Modra <amodra@gmail.com> |
798 | ||
799 | * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10. | |
800 | ||
d3d1cc7b AM |
801 | 2020-06-05 Alan Modra <amodra@gmail.com> |
802 | ||
803 | * cgen-dis.c (hash_insn_array): Increase size of buf. Assert | |
804 | size is large enough. | |
805 | ||
d8740be1 JM |
806 | 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> |
807 | ||
808 | * disassemble.c (disassemble_init_for_target): Set endian_code for | |
809 | bpf targets. | |
810 | * bpf-desc.c: Regenerate. | |
811 | * bpf-opc.c: Likewise. | |
812 | * bpf-dis.c: Likewise. | |
813 | ||
e9bffec9 JM |
814 | 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com> |
815 | ||
816 | * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument. | |
817 | (cgen_put_insn_value): Likewise. | |
818 | (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value. | |
819 | * cgen-dis.in (print_insn): Likewise. | |
820 | * cgen-ibld.in (insert_1): Likewise. | |
821 | (insert_1): Likewise. | |
822 | (insert_insn_normal): Likewise. | |
823 | (extract_1): Likewise. | |
824 | * bpf-dis.c: Regenerate. | |
825 | * bpf-ibld.c: Likewise. | |
826 | * bpf-ibld.c: Likewise. | |
827 | * cgen-dis.in: Likewise. | |
828 | * cgen-ibld.in: Likewise. | |
829 | * cgen-opc.c: Likewise. | |
830 | * epiphany-dis.c: Likewise. | |
831 | * epiphany-ibld.c: Likewise. | |
832 | * fr30-dis.c: Likewise. | |
833 | * fr30-ibld.c: Likewise. | |
834 | * frv-dis.c: Likewise. | |
835 | * frv-ibld.c: Likewise. | |
836 | * ip2k-dis.c: Likewise. | |
837 | * ip2k-ibld.c: Likewise. | |
838 | * iq2000-dis.c: Likewise. | |
839 | * iq2000-ibld.c: Likewise. | |
840 | * lm32-dis.c: Likewise. | |
841 | * lm32-ibld.c: Likewise. | |
842 | * m32c-dis.c: Likewise. | |
843 | * m32c-ibld.c: Likewise. | |
844 | * m32r-dis.c: Likewise. | |
845 | * m32r-ibld.c: Likewise. | |
846 | * mep-dis.c: Likewise. | |
847 | * mep-ibld.c: Likewise. | |
848 | * mt-dis.c: Likewise. | |
849 | * mt-ibld.c: Likewise. | |
850 | * or1k-dis.c: Likewise. | |
851 | * or1k-ibld.c: Likewise. | |
852 | * xc16x-dis.c: Likewise. | |
853 | * xc16x-ibld.c: Likewise. | |
854 | * xstormy16-dis.c: Likewise. | |
855 | * xstormy16-ibld.c: Likewise. | |
856 | ||
b3db6d07 JM |
857 | 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> |
858 | ||
859 | * cgen-dis.in (cpu_desc_list): New field `insn_endian'. | |
860 | (print_insn_): Handle instruction endian. | |
861 | * bpf-dis.c: Regenerate. | |
862 | * bpf-desc.c: Regenerate. | |
863 | * epiphany-dis.c: Likewise. | |
864 | * epiphany-desc.c: Likewise. | |
865 | * fr30-dis.c: Likewise. | |
866 | * fr30-desc.c: Likewise. | |
867 | * frv-dis.c: Likewise. | |
868 | * frv-desc.c: Likewise. | |
869 | * ip2k-dis.c: Likewise. | |
870 | * ip2k-desc.c: Likewise. | |
871 | * iq2000-dis.c: Likewise. | |
872 | * iq2000-desc.c: Likewise. | |
873 | * lm32-dis.c: Likewise. | |
874 | * lm32-desc.c: Likewise. | |
875 | * m32c-dis.c: Likewise. | |
876 | * m32c-desc.c: Likewise. | |
877 | * m32r-dis.c: Likewise. | |
878 | * m32r-desc.c: Likewise. | |
879 | * mep-dis.c: Likewise. | |
880 | * mep-desc.c: Likewise. | |
881 | * mt-dis.c: Likewise. | |
882 | * mt-desc.c: Likewise. | |
883 | * or1k-dis.c: Likewise. | |
884 | * or1k-desc.c: Likewise. | |
885 | * xc16x-dis.c: Likewise. | |
886 | * xc16x-desc.c: Likewise. | |
887 | * xstormy16-dis.c: Likewise. | |
888 | * xstormy16-desc.c: Likewise. | |
889 | ||
4ee4189f NC |
890 | 2020-06-03 Nick Clifton <nickc@redhat.com> |
891 | ||
892 | * po/sr.po: Updated Serbian translation. | |
893 | ||
44730156 NC |
894 | 2020-06-03 Nelson Chu <nelson.chu@sifive.com> |
895 | ||
896 | * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int. | |
897 | (riscv_get_priv_spec_class): Likewise. | |
898 | ||
3c3d0376 AM |
899 | 2020-06-01 Alan Modra <amodra@gmail.com> |
900 | ||
901 | * bpf-desc.c: Regenerate. | |
902 | ||
78c1c354 JM |
903 | 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> |
904 | David Faust <david.faust@oracle.com> | |
905 | ||
906 | * bpf-desc.c: Regenerate. | |
907 | * bpf-opc.h: Likewise. | |
908 | * bpf-opc.c: Likewise. | |
909 | * bpf-dis.c: Likewise. | |
910 | ||
efcf5fb5 AM |
911 | 2020-05-28 Alan Modra <amodra@gmail.com> |
912 | ||
913 | * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative | |
914 | values. | |
915 | ||
ab382d64 AM |
916 | 2020-05-28 Alan Modra <amodra@gmail.com> |
917 | ||
918 | * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for | |
919 | immediates. | |
920 | (print_insn_ns32k): Revert last change. | |
921 | ||
151f5de4 NC |
922 | 2020-05-28 Nick Clifton <nickc@redhat.com> |
923 | ||
924 | * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to | |
925 | static. | |
926 | ||
25e1eca8 SL |
927 | 2020-05-26 Sandra Loosemore <sandra@codesourcery.com> |
928 | ||
929 | Fix extraction of signed constants in nios2 disassembler (again). | |
930 | ||
931 | * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to | |
932 | extractions of signed fields. | |
933 | ||
57b17940 SSF |
934 | 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
935 | ||
936 | * s390-opc.txt: Relocate vector load/store instructions with | |
937 | additional alignment parameter and change architecture level | |
938 | constraint from z14 to z13. | |
939 | ||
d96bf37b AM |
940 | 2020-05-21 Alan Modra <amodra@gmail.com> |
941 | ||
942 | * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout. | |
943 | * sparc-dis.c: Likewise. | |
944 | * tic4x-dis.c: Likewise. | |
945 | * xtensa-dis.c: Likewise. | |
946 | * bpf-desc.c: Regenerate. | |
947 | * epiphany-desc.c: Regenerate. | |
948 | * fr30-desc.c: Regenerate. | |
949 | * frv-desc.c: Regenerate. | |
950 | * ip2k-desc.c: Regenerate. | |
951 | * iq2000-desc.c: Regenerate. | |
952 | * lm32-desc.c: Regenerate. | |
953 | * m32c-desc.c: Regenerate. | |
954 | * m32r-desc.c: Regenerate. | |
955 | * mep-asm.c: Regenerate. | |
956 | * mep-desc.c: Regenerate. | |
957 | * mt-desc.c: Regenerate. | |
958 | * or1k-desc.c: Regenerate. | |
959 | * xc16x-desc.c: Regenerate. | |
960 | * xstormy16-desc.c: Regenerate. | |
961 | ||
8f595e9b NC |
962 | 2020-05-20 Nelson Chu <nelson.chu@sifive.com> |
963 | ||
964 | * riscv-opc.c (riscv_ext_version_table): The table used to store | |
965 | all information about the supported spec and the corresponding ISA | |
966 | versions. Currently, only Zicsr is supported to verify the | |
967 | correctness of Z sub extension settings. Others will be supported | |
968 | in the future patches. | |
969 | (struct isa_spec_t, isa_specs): List for all supported ISA spec | |
970 | classes and the corresponding strings. | |
971 | (riscv_get_isa_spec_class): New function. Get the corresponding ISA | |
972 | spec class by giving a ISA spec string. | |
973 | * riscv-opc.c (struct priv_spec_t): New structure. | |
974 | (struct priv_spec_t priv_specs): List for all supported privilege spec | |
975 | classes and the corresponding strings. | |
976 | (riscv_get_priv_spec_class): New function. Get the corresponding | |
977 | privilege spec class by giving a spec string. | |
978 | (riscv_get_priv_spec_name): New function. Get the corresponding | |
979 | privilege spec string by giving a CSR version class. | |
980 | * riscv-dis.c: Updated since DECLARE_CSR is changed. | |
981 | * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR | |
982 | according to the chosen version. Build a hash table riscv_csr_hash to | |
983 | store the valid CSR for the chosen pirv verison. Dump the direct | |
984 | CSR address rather than it's name if it is invalid. | |
985 | (parse_riscv_dis_option_without_args): New function. Parse the options | |
986 | without arguments. | |
987 | (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to | |
988 | parse the options without arguments first, and then handle the options | |
989 | with arguments. Add the new option -Mpriv-spec, which has argument. | |
990 | * riscv-dis.c (print_riscv_disassembler_options): Add description | |
991 | about the new OBJDUMP option. | |
992 | ||
3d205eb4 PB |
993 | 2020-05-19 Peter Bergner <bergner@linux.ibm.com> |
994 | ||
995 | * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new | |
996 | WC values on POWER10 sync, dcbf and wait instructions. | |
997 | (insert_pl, extract_pl): New functions. | |
998 | (L2OPT, LS, WC): Use insert_ls and extract_ls. | |
999 | (LS3): New , 3-bit L for sync. | |
1000 | (LS3, L3OPT): New, 3-bit L for sync and dcbf. | |
1001 | (SC2, PL): New, 2-bit SC and PL for sync and wait. | |
1002 | (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks. | |
1003 | (XOPL3, XWCPL, XSYNCLS): New opcode macros. | |
1004 | (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync, | |
1005 | plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics. | |
1006 | <wait>: Enable PL operand on POWER10. | |
1007 | <dcbf>: Enable L3OPT operand on POWER10. | |
1008 | <sync>: Enable SC2 operand on POWER10. | |
1009 | ||
a501eb44 SH |
1010 | 2020-05-19 Stafford Horne <shorne@gmail.com> |
1011 | ||
1012 | PR 25184 | |
1013 | * or1k-asm.c: Regenerate. | |
1014 | * or1k-desc.c: Regenerate. | |
1015 | * or1k-desc.h: Regenerate. | |
1016 | * or1k-dis.c: Regenerate. | |
1017 | * or1k-ibld.c: Regenerate. | |
1018 | * or1k-opc.c: Regenerate. | |
1019 | * or1k-opc.h: Regenerate. | |
1020 | * or1k-opinst.c: Regenerate. | |
1021 | ||
3b646889 AM |
1022 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1023 | ||
1024 | * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp, | |
1025 | xsmaxcqp, xsmincqp. | |
1026 | ||
9cc4ce88 AM |
1027 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1028 | ||
1029 | * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx, | |
1030 | stxvrbx, stxvrhx, stxvrwx, stxvrdx. | |
1031 | ||
5d57bc3f AM |
1032 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1033 | ||
1034 | * ppc-opc.c (powerpc_opcodes): Add xvtlsbb. | |
1035 | ||
66ef5847 AM |
1036 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1037 | ||
1038 | * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr, | |
1039 | vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr.. | |
1040 | ||
4f3e9537 PB |
1041 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
1042 | ||
1043 | * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New | |
1044 | mnemonics. | |
1045 | ||
ec40e91c AM |
1046 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1047 | ||
1048 | * ppc-opc.c (UIM8, P_U8XX4_MASK): Define. | |
1049 | (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm, | |
1050 | vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm. | |
1051 | (prefix_opcodes): Add xxeval. | |
1052 | ||
d7e97a76 AM |
1053 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1054 | ||
1055 | * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm, | |
1056 | xxgenpcvwm, xxgenpcvdm. | |
1057 | ||
fdefed7c AM |
1058 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1059 | ||
1060 | * ppc-opc.c (MP, VXVAM_MASK): Define. | |
1061 | (VXVAPS_MASK): Use VXVA_MASK. | |
1062 | (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm, | |
1063 | vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm, | |
1064 | vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm, | |
1065 | vcntmbb, vcntmbh, vcntmbw, vcntmbd. | |
1066 | ||
aa3c112f AM |
1067 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1068 | Peter Bergner <bergner@linux.ibm.com> | |
1069 | ||
1070 | * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a): | |
1071 | New functions. | |
1072 | (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK, | |
1073 | YMSK2, XA6a, XA6ap, XB6a entries. | |
1074 | (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define | |
1075 | (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define. | |
1076 | (PPCVSX4): Define. | |
1077 | (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz, | |
1078 | xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, | |
1079 | xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, | |
1080 | xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np, | |
1081 | xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp, | |
1082 | xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn, | |
1083 | xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16. | |
1084 | (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp, | |
1085 | pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8, | |
1086 | pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2, | |
1087 | pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp, | |
1088 | pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp, | |
1089 | pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn, | |
1090 | pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn. | |
1091 | ||
6edbfd3b AM |
1092 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1093 | ||
1094 | * ppc-opc.c (insert_imm32, extract_imm32): New functions. | |
1095 | (insert_xts, extract_xts): New functions. | |
1096 | (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define. | |
1097 | (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define. | |
1098 | (VXRC_MASK, VXSH_MASK): Define. | |
1099 | (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx, | |
1100 | vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx, | |
1101 | vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx, | |
1102 | vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx, | |
1103 | vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq. | |
1104 | (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb, | |
1105 | xxblendvh, xxblendvw, xxblendvd, xxpermx. | |
1106 | ||
c7d7aea2 AM |
1107 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1108 | ||
1109 | * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi, | |
1110 | vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd, | |
1111 | vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd, | |
1112 | vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz, | |
1113 | xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq. | |
1114 | ||
94ba9882 AM |
1115 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1116 | ||
1117 | * ppc-opc.c (insert_xtp, extract_xtp): New functions. | |
1118 | (XTP, DQXP, DQXP_MASK): Define. | |
1119 | (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx. | |
1120 | (prefix_opcodes): Add plxvp and pstxvp. | |
1121 | ||
f4791f1a AM |
1122 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1123 | ||
1124 | * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld, | |
1125 | vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw, | |
1126 | vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd. | |
1127 | ||
3ff0a5ba PB |
1128 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
1129 | ||
1130 | * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics. | |
1131 | ||
afef4fe9 PB |
1132 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
1133 | ||
1134 | * ppc-opc.c (insert_l1opt, extract_l1opt): New functions. | |
1135 | (L1OPT): Define. | |
1136 | (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10. | |
1137 | ||
1224c05d PB |
1138 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
1139 | ||
1140 | * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand. | |
1141 | ||
6bbb0c05 AM |
1142 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1143 | ||
1144 | * ppc-dis.c (powerpc_init_dialect): Default to "power10". | |
1145 | ||
7c1f4227 AM |
1146 | 2020-05-11 Alan Modra <amodra@gmail.com> |
1147 | ||
1148 | * ppc-dis.c (ppc_opts): Add "power10" entry. | |
1149 | (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. | |
1150 | * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses. | |
1151 | ||
73199c2b NC |
1152 | 2020-05-11 Nick Clifton <nickc@redhat.com> |
1153 | ||
1154 | * po/fr.po: Updated French translation. | |
1155 | ||
09c1e68a AC |
1156 | 2020-04-30 Alex Coplan <alex.coplan@arm.com> |
1157 | ||
1158 | * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2. | |
1159 | * aarch64-opc.c (fields): Add entry for FLD_imm16_2. | |
1160 | (operand_general_constraint_met_p): validate | |
1161 | AARCH64_OPND_UNDEFINED. | |
1162 | * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry | |
1163 | for FLD_imm16_2. | |
1164 | * aarch64-asm-2.c: Regenerated. | |
1165 | * aarch64-dis-2.c: Regenerated. | |
1166 | * aarch64-opc-2.c: Regenerated. | |
1167 | ||
9654d51a NC |
1168 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
1169 | ||
1170 | PR 22699 | |
1171 | * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC | |
1172 | and SETRC insns. | |
1173 | ||
c2e71e57 NC |
1174 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
1175 | ||
1176 | * po/sv.po: Updated Swedish translation. | |
1177 | ||
5c936ef5 NC |
1178 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
1179 | ||
1180 | PR 22699 | |
1181 | * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use | |
1182 | IMM0_8S for arithmetic insns and IMM0_8U for logical insns. | |
1183 | * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add | |
1184 | IMM0_8U case. | |
1185 | ||
bb2a1453 AS |
1186 | 2020-04-21 Andreas Schwab <schwab@linux-m68k.org> |
1187 | ||
1188 | PR 25848 | |
1189 | * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of | |
1190 | cmpi only on m68020up and cpu32. | |
1191 | ||
c2e5c986 SD |
1192 | 2020-04-20 Sudakshina Das <sudi.das@arm.com> |
1193 | ||
1194 | * aarch64-asm.c (aarch64_ins_none): New. | |
1195 | * aarch64-asm.h (ins_none): New declaration. | |
1196 | * aarch64-dis.c (aarch64_ext_none): New. | |
1197 | * aarch64-dis.h (ext_none): New declaration. | |
1198 | * aarch64-opc.c (aarch64_print_operand): Update case for | |
1199 | AARCH64_OPND_BARRIER_PSB. | |
1200 | * aarch64-tbl.h (aarch64_opcode_table): Add tsb. | |
1201 | (AARCH64_OPERANDS): Update inserter/extracter for | |
1202 | AARCH64_OPND_BARRIER_PSB to use new dummy functions. | |
1203 | * aarch64-asm-2.c: Regenerated. | |
1204 | * aarch64-dis-2.c: Regenerated. | |
1205 | * aarch64-opc-2.c: Regenerated. | |
1206 | ||
8a6e1d1d SD |
1207 | 2020-04-20 Sudakshina Das <sudi.das@arm.com> |
1208 | ||
1209 | * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove. | |
1210 | (aarch64_feature_ras, RAS): Likewise. | |
1211 | (aarch64_feature_stat_profile, STAT_PROFILE): Likewise. | |
1212 | (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716, | |
1213 | autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp, | |
1214 | autiaz, autiasp, autibz, autibsp to be CORE_INSN. | |
1215 | * aarch64-asm-2.c: Regenerated. | |
1216 | * aarch64-dis-2.c: Regenerated. | |
1217 | * aarch64-opc-2.c: Regenerated. | |
1218 | ||
e409955d FS |
1219 | 2020-04-17 Fredrik Strupe <fredrik@strupe.net> |
1220 | ||
1221 | * arm-dis.c (neon_opcodes): Fix VDUP instruction masks. | |
1222 | (print_insn_neon): Support disassembly of conditional | |
1223 | instructions. | |
1224 | ||
c54a9b56 DF |
1225 | 2020-02-16 David Faust <david.faust@oracle.com> |
1226 | ||
1227 | * bpf-desc.c: Regenerate. | |
1228 | * bpf-desc.h: Likewise. | |
1229 | * bpf-opc.c: Regenerate. | |
1230 | * bpf-opc.h: Likewise. | |
1231 | ||
bb651e8b CL |
1232 | 2020-04-07 Lili Cui <lili.cui@intel.com> |
1233 | ||
1234 | * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1, | |
1235 | (prefix_table): New instructions (see prefixes above). | |
1236 | (rm_table): Likewise | |
1237 | * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS, | |
1238 | CPU_ANY_TSXLDTRK_FLAGS. | |
1239 | (cpu_flags): Add CpuTSXLDTRK. | |
1240 | * i386-opc.h (enum): Add CpuTSXLDTRK. | |
1241 | (i386_cpu_flags): Add cputsxldtrk. | |
1242 | * i386-opc.tbl: Add XSUSPLDTRK insns. | |
1243 | * i386-init.h: Regenerate. | |
1244 | * i386-tbl.h: Likewise. | |
1245 | ||
4b27d27c L |
1246 | 2020-04-02 Lili Cui <lili.cui@intel.com> |
1247 | ||
1248 | * i386-dis.c (prefix_table): New instructions serialize. | |
1249 | * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS, | |
1250 | CPU_ANY_SERIALIZE_FLAGS. | |
1251 | (cpu_flags): Add CpuSERIALIZE. | |
1252 | * i386-opc.h (enum): Add CpuSERIALIZE. | |
1253 | (i386_cpu_flags): Add cpuserialize. | |
1254 | * i386-opc.tbl: Add SERIALIZE insns. | |
1255 | * i386-init.h: Regenerate. | |
1256 | * i386-tbl.h: Likewise. | |
1257 | ||
832a5807 AM |
1258 | 2020-03-26 Alan Modra <amodra@gmail.com> |
1259 | ||
1260 | * disassemble.h (opcodes_assert): Declare. | |
1261 | (OPCODES_ASSERT): Define. | |
1262 | * disassemble.c: Don't include assert.h. Include opintl.h. | |
1263 | (opcodes_assert): New function. | |
1264 | * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT. | |
1265 | (bfd_h8_disassemble): Reduce size of data array. Correctly | |
1266 | calculate maxlen. Omit insn decoding when insn length exceeds | |
1267 | maxlen. Exit from nibble loop when looking for E, before | |
1268 | accessing next data byte. Move processing of E outside loop. | |
1269 | Replace tests of maxlen in loop with assertions. | |
1270 | ||
4c4addbe AM |
1271 | 2020-03-26 Alan Modra <amodra@gmail.com> |
1272 | ||
1273 | * arc-dis.c (find_format): Init needs_limm. Simplify use of limm. | |
1274 | ||
a18cd0ca AM |
1275 | 2020-03-25 Alan Modra <amodra@gmail.com> |
1276 | ||
1277 | * z80-dis.c (suffix): Init mybuf. | |
1278 | ||
57cb32b3 AM |
1279 | 2020-03-22 Alan Modra <amodra@gmail.com> |
1280 | ||
1281 | * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that | |
1282 | successflly read from section. | |
1283 | ||
beea5cc1 AM |
1284 | 2020-03-22 Alan Modra <amodra@gmail.com> |
1285 | ||
1286 | * arc-dis.c (find_format): Use ISO C string concatenation rather | |
1287 | than line continuation within a string. Don't access needs_limm | |
1288 | before testing opcode != NULL. | |
1289 | ||
03704c77 AM |
1290 | 2020-03-22 Alan Modra <amodra@gmail.com> |
1291 | ||
1292 | * ns32k-dis.c (print_insn_arg): Update comment. | |
1293 | (print_insn_ns32k): Reduce size of index_offset array, and | |
1294 | initialize, passing -1 to print_insn_arg for args that are not | |
1295 | an index. Don't exit arg loop early. Abort on bad arg number. | |
1296 | ||
d1023b5d AM |
1297 | 2020-03-22 Alan Modra <amodra@gmail.com> |
1298 | ||
1299 | * s12z-dis.c (abstract_read_memory): Don't print error on EOI. | |
1300 | * s12z-opc.c: Formatting. | |
1301 | (operands_f): Return an int. | |
1302 | (opr_n_bytes_p1): Return -1 on reaching buffer memory limit. | |
1303 | (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes), | |
1304 | (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes), | |
1305 | (exg_sex_discrim): Likewise. | |
1306 | (create_immediate_operand, create_bitfield_operand), | |
1307 | (create_register_operand_with_size, create_register_all_operand), | |
1308 | (create_register_all16_operand, create_simple_memory_operand), | |
1309 | (create_memory_operand, create_memory_auto_operand): Don't | |
1310 | segfault on malloc failure. | |
1311 | (z_ext24_decode): Return an int status, negative on fail, zero | |
1312 | on success. | |
1313 | (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2), | |
1314 | (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base), | |
1315 | (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7), | |
1316 | (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x), | |
1317 | (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode), | |
1318 | (mov_imm_opr, ld_18bit_decode, exg_sex_decode), | |
1319 | (loop_primitive_decode, shift_decode, psh_pul_decode), | |
1320 | (bit_field_decode): Similarly. | |
1321 | (z_decode_signed_value, decode_signed_value): Similarly. Add arg | |
1322 | to return value, update callers. | |
1323 | (x_opr_decode_with_size): Check all reads, returning NULL on fail. | |
1324 | Don't segfault on NULL operand. | |
1325 | (decode_operation): Return OP_INVALID on first fail. | |
1326 | (decode_s12z): Check all reads, returning -1 on fail. | |
1327 | ||
340f3ac8 AM |
1328 | 2020-03-20 Alan Modra <amodra@gmail.com> |
1329 | ||
1330 | * metag-dis.c (print_insn_metag): Don't ignore status from | |
1331 | read_memory_func. | |
1332 | ||
fe90ae8a AM |
1333 | 2020-03-20 Alan Modra <amodra@gmail.com> |
1334 | ||
1335 | * nds32-dis.c (print_insn_nds32): Remove unnecessary casts. | |
1336 | Initialize parts of buffer not written when handling a possible | |
1337 | 2-byte insn at end of section. Don't attempt decoding of such | |
1338 | an insn by the 4-byte machinery. | |
1339 | ||
833d919c AM |
1340 | 2020-03-20 Alan Modra <amodra@gmail.com> |
1341 | ||
1342 | * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of | |
1343 | partially filled buffer. Prevent lookup of 4-byte insns when | |
1344 | only VLE 2-byte insns are possible due to section size. Print | |
1345 | ".word" rather than ".long" for 2-byte leftovers. | |
1346 | ||
327ef784 NC |
1347 | 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com> |
1348 | ||
1349 | PR 25641 | |
1350 | * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes. | |
1351 | ||
1673df32 JB |
1352 | 2020-03-13 Jan Beulich <jbeulich@suse.com> |
1353 | ||
1354 | * i386-dis.c (X86_64_0D): Rename to ... | |
1355 | (X86_64_0E): ... this. | |
1356 | ||
384f3689 L |
1357 | 2020-03-09 H.J. Lu <hongjiu.lu@intel.com> |
1358 | ||
1359 | * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP). | |
1360 | * Makefile.in: Regenerated. | |
1361 | ||
865e2027 JB |
1362 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
1363 | ||
1364 | * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp* | |
1365 | 3-operand pseudos. | |
1366 | * i386-tbl.h: Re-generate. | |
1367 | ||
2f13234b JB |
1368 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
1369 | ||
1370 | * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*, | |
1371 | vprot*, vpsha*, and vpshl*. | |
1372 | * i386-tbl.h: Re-generate. | |
1373 | ||
3fabc179 JB |
1374 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
1375 | ||
1376 | * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps, | |
1377 | vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops. | |
1378 | * i386-tbl.h: Re-generate. | |
1379 | ||
3677e4c1 JB |
1380 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
1381 | ||
1382 | * i386-gen.c (set_bitfield): Ignore zero-length field names. | |
1383 | * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps, | |
1384 | cmpss, cmppd, and cmpsd 2-operand pseudo-ops. | |
1385 | * i386-tbl.h: Re-generate. | |
1386 | ||
4c4898e8 JB |
1387 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
1388 | ||
1389 | * i386-gen.c (struct template_arg, struct template_instance, | |
1390 | struct template_param, struct template, templates, | |
1391 | parse_template, expand_templates): New. | |
1392 | (process_i386_opcodes): Various local variables moved to | |
1393 | expand_templates. Call parse_template and expand_templates. | |
1394 | * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc. | |
1395 | * i386-tbl.h: Re-generate. | |
1396 | ||
bc49bfd8 JB |
1397 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1398 | ||
1399 | * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph, | |
1400 | vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate | |
1401 | register and memory source templates. Replace VexW= by VexW* | |
1402 | where applicable. | |
1403 | * i386-tbl.h: Re-generate. | |
1404 | ||
4873e243 JB |
1405 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1406 | ||
1407 | * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace | |
1408 | VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable. | |
1409 | * i386-tbl.h: Re-generate. | |
1410 | ||
672a349b JB |
1411 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1412 | ||
1413 | * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax. | |
1414 | * i386-tbl.h: Re-generate. | |
1415 | ||
4ed21b58 JB |
1416 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1417 | ||
1418 | * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants. | |
1419 | (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps, | |
1420 | pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use | |
1421 | VexW0 on SSE2AVX variants. | |
1422 | (vmovq): Drop NoRex64 from XMM/XMM variants. | |
1423 | (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb, | |
1424 | vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where | |
1425 | applicable use VexW0. | |
1426 | * i386-tbl.h: Re-generate. | |
1427 | ||
643bb870 JB |
1428 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1429 | ||
1430 | * i386-gen.c (opcode_modifiers): Remove Rex64 field. | |
1431 | * i386-opc.h (Rex64): Delete. | |
1432 | (struct i386_opcode_modifier): Remove rex64 field. | |
1433 | * i386-opc.tbl (crc32): Drop Rex64. | |
1434 | Replace Rex64 with Size64 everywhere else. | |
1435 | * i386-tbl.h: Re-generate. | |
1436 | ||
a23b33b3 JB |
1437 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1438 | ||
1439 | * i386-dis.c (OP_E_memory): Exclude recording of used address | |
1440 | prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit | |
1441 | addressed memory operands for MPX insns. | |
1442 | ||
a0497384 JB |
1443 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1444 | ||
1445 | * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept, | |
1446 | invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx, | |
1447 | adox, mwaitx, rdpid, movdiri): Add IgnoreSize. | |
1448 | (ptwrite): Split into non-64-bit and 64-bit forms. | |
1449 | * i386-tbl.h: Re-generate. | |
1450 | ||
b630c145 JB |
1451 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
1452 | ||
1453 | * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand | |
1454 | template. | |
1455 | * i386-tbl.h: Re-generate. | |
1456 | ||
a847e322 JB |
1457 | 2020-03-04 Jan Beulich <jbeulich@suse.com> |
1458 | ||
1459 | * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New. | |
1460 | (prefix_table): Move vmmcall here. Add vmgexit. | |
1461 | (rm_table): Replace vmmcall entry by prefix_table[] escape. | |
1462 | * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry. | |
1463 | (cpu_flags): Add CpuSEV_ES entry. | |
1464 | * i386-opc.h (CpuSEV_ES): New. | |
1465 | (union i386_cpu_flags): Add cpusev_es field. | |
1466 | * i386-opc.tbl (vmgexit): New. | |
1467 | * i386-init.h, i386-tbl.h: Re-generate. | |
1468 | ||
3cd7f3e3 L |
1469 | 2020-03-03 H.J. Lu <hongjiu.lu@intel.com> |
1470 | ||
1471 | * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize | |
1472 | with MnemonicSize. | |
1473 | * i386-opc.h (IGNORESIZE): New. | |
1474 | (DEFAULTSIZE): Likewise. | |
1475 | (IgnoreSize): Removed. | |
1476 | (DefaultSize): Likewise. | |
1477 | (MnemonicSize): New. | |
1478 | (i386_opcode_modifier): Replace ignoresize/defaultsize with | |
1479 | mnemonicsize. | |
1480 | * i386-opc.tbl (IgnoreSize): New. | |
1481 | (DefaultSize): Likewise. | |
1482 | * i386-tbl.h: Regenerated. | |
1483 | ||
b8ba1385 SB |
1484 | 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com> |
1485 | ||
1486 | PR 25627 | |
1487 | * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX | |
1488 | instructions. | |
1489 | ||
10d97a0f L |
1490 | 2020-03-03 H.J. Lu <hongjiu.lu@intel.com> |
1491 | ||
1492 | PR gas/25622 | |
1493 | * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd, | |
1494 | vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax. | |
1495 | * i386-tbl.h: Regenerated. | |
1496 | ||
dc1e8a47 AM |
1497 | 2020-02-26 Alan Modra <amodra@gmail.com> |
1498 | ||
1499 | * aarch64-asm.c: Indent labels correctly. | |
1500 | * aarch64-dis.c: Likewise. | |
1501 | * aarch64-gen.c: Likewise. | |
1502 | * aarch64-opc.c: Likewise. | |
1503 | * alpha-dis.c: Likewise. | |
1504 | * i386-dis.c: Likewise. | |
1505 | * nds32-asm.c: Likewise. | |
1506 | * nfp-dis.c: Likewise. | |
1507 | * visium-dis.c: Likewise. | |
1508 | ||
265b4673 CZ |
1509 | 2020-02-25 Claudiu Zissulescu <claziss@gmail.com> |
1510 | ||
1511 | * arc-regs.h (int_vector_base): Make it available for all ARC | |
1512 | CPUs. | |
1513 | ||
bd0cf5a6 NC |
1514 | 2020-02-20 Nelson Chu <nelson.chu@sifive.com> |
1515 | ||
1516 | * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is | |
1517 | changed. | |
1518 | ||
fa164239 JW |
1519 | 2020-02-19 Nelson Chu <nelson.chu@sifive.com> |
1520 | ||
1521 | * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed | |
1522 | c.mv/c.li if rs1 is zero. | |
1523 | ||
272a84b1 L |
1524 | 2020-02-17 H.J. Lu <hongjiu.lu@intel.com> |
1525 | ||
1526 | * i386-gen.c (cpu_flag_init): Replace CpuABM with | |
1527 | CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add | |
1528 | CPU_POPCNT_FLAGS. | |
1529 | (cpu_flags): Remove CpuABM. Add CpuPOPCNT. | |
1530 | * i386-opc.h (CpuABM): Removed. | |
1531 | (CpuPOPCNT): New. | |
1532 | (i386_cpu_flags): Remove cpuabm. Add cpupopcnt. | |
1533 | * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on | |
1534 | popcnt. Remove CpuABM from lzcnt. | |
1535 | * i386-init.h: Regenerated. | |
1536 | * i386-tbl.h: Likewise. | |
1537 | ||
1f730c46 JB |
1538 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
1539 | ||
1540 | * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss): | |
1541 | Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/ | |
1542 | VexW1 instead of open-coding them. | |
1543 | * i386-tbl.h: Re-generate. | |
1544 | ||
c8f8eebc JB |
1545 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
1546 | ||
1547 | * i386-opc.tbl (AddrPrefixOpReg): Define. | |
1548 | (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx, | |
1549 | umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64 | |
1550 | templates. Drop NoRex64. | |
1551 | * i386-tbl.h: Re-generate. | |
1552 | ||
b9915cbc JB |
1553 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
1554 | ||
1555 | PR gas/6518 | |
1556 | * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq, | |
1557 | vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms | |
1558 | into Intel syntax instance (with Unpsecified) and AT&T one | |
1559 | (without). | |
1560 | (vcvtneps2bf16): Likewise, along with folding the two so far | |
1561 | separate ones. | |
1562 | * i386-tbl.h: Re-generate. | |
1563 | ||
ce504911 L |
1564 | 2020-02-16 H.J. Lu <hongjiu.lu@intel.com> |
1565 | ||
1566 | * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from | |
1567 | CPU_ANY_SSE4A_FLAGS. | |
1568 | ||
dabec65d AM |
1569 | 2020-02-17 Alan Modra <amodra@gmail.com> |
1570 | ||
1571 | * i386-gen.c (cpu_flag_init): Correct last change. | |
1572 | ||
af5c13b0 L |
1573 | 2020-02-16 H.J. Lu <hongjiu.lu@intel.com> |
1574 | ||
1575 | * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove | |
1576 | CPU_ANY_SSE4_FLAGS. | |
1577 | ||
6867aac0 L |
1578 | 2020-02-14 H.J. Lu <hongjiu.lu@intel.com> |
1579 | ||
1580 | * i386-opc.tbl (movsx): Remove Intel syntax comments. | |
1581 | (movzx): Likewise. | |
1582 | ||
65fca059 JB |
1583 | 2020-02-14 Jan Beulich <jbeulich@suse.com> |
1584 | ||
1585 | PR gas/25438 | |
1586 | * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as | |
1587 | destination for Cpu64-only variant. | |
1588 | (movzx): Fold patterns. | |
1589 | * i386-tbl.h: Re-generate. | |
1590 | ||
7deea9aa JB |
1591 | 2020-02-13 Jan Beulich <jbeulich@suse.com> |
1592 | ||
1593 | * i386-gen.c (cpu_flag_init): Move CpuSSE4a from | |
1594 | CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add | |
1595 | CPU_ANY_SSE4_FLAGS entry. | |
1596 | * i386-init.h: Re-generate. | |
1597 | ||
6c0946d0 JB |
1598 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
1599 | ||
1600 | * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form | |
1601 | with Unspecified, making the present one AT&T syntax only. | |
1602 | * i386-tbl.h: Re-generate. | |
1603 | ||
ddb56fe6 JB |
1604 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
1605 | ||
1606 | * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants. | |
1607 | * i386-tbl.h: Re-generate. | |
1608 | ||
5990e377 JB |
1609 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
1610 | ||
1611 | PR gas/24546 | |
1612 | * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode. | |
1613 | * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into | |
1614 | Amd64 and Intel64 templates. | |
1615 | (call, jmp): Likewise for far indirect variants. Dro | |
1616 | Unspecified. | |
1617 | * i386-tbl.h: Re-generate. | |
1618 | ||
50128d0c JB |
1619 | 2020-02-11 Jan Beulich <jbeulich@suse.com> |
1620 | ||
1621 | * i386-gen.c (opcode_modifiers): Remove ShortForm entry. | |
1622 | * i386-opc.h (ShortForm): Delete. | |
1623 | (struct i386_opcode_modifier): Remove shortform field. | |
1624 | * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld, | |
1625 | fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub, | |
1626 | fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp, | |
1627 | ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq): | |
1628 | Drop ShortForm. | |
1629 | * i386-tbl.h: Re-generate. | |
1630 | ||
1e05b5c4 JB |
1631 | 2020-02-11 Jan Beulich <jbeulich@suse.com> |
1632 | ||
1633 | * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip, | |
1634 | fucompi): Drop ShortForm from operand-less templates. | |
1635 | * i386-tbl.h: Re-generate. | |
1636 | ||
2f5dd314 AM |
1637 | 2020-02-11 Alan Modra <amodra@gmail.com> |
1638 | ||
1639 | * cgen-ibld.in (extract_normal): Set *valuep on all return paths. | |
1640 | * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, | |
1641 | * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, | |
1642 | * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, | |
1643 | * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate. | |
1644 | ||
5aae9ae9 MM |
1645 | 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com> |
1646 | ||
1647 | * arm-dis.c (print_insn_cde): Define 'V' parse character. | |
1648 | (cde_opcodes): Add VCX* instructions. | |
1649 | ||
4934a27c MM |
1650 | 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
1651 | Matthew Malcomson <matthew.malcomson@arm.com> | |
1652 | ||
1653 | * arm-dis.c (struct cdeopcode32): New. | |
1654 | (CDE_OPCODE): New macro. | |
1655 | (cde_opcodes): New disassembly table. | |
1656 | (regnames): New option to table. | |
1657 | (cde_coprocs): New global variable. | |
1658 | (print_insn_cde): New | |
1659 | (print_insn_thumb32): Use print_insn_cde. | |
1660 | (parse_arm_disassembler_options): Parse coprocN args. | |
1661 | ||
4b5aaf5f L |
1662 | 2020-02-10 H.J. Lu <hongjiu.lu@intel.com> |
1663 | ||
1664 | PR gas/25516 | |
1665 | * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64 | |
1666 | with ISA64. | |
1667 | * i386-opc.h (AMD64): Removed. | |
1668 | (Intel64): Likewose. | |
1669 | (AMD64): New. | |
1670 | (INTEL64): Likewise. | |
1671 | (INTEL64ONLY): Likewise. | |
1672 | (i386_opcode_modifier): Replace amd64 and intel64 with isa64. | |
1673 | * i386-opc.tbl (Amd64): New. | |
1674 | (Intel64): Likewise. | |
1675 | (Intel64Only): Likewise. | |
1676 | Replace AMD64 with Amd64. Update sysenter/sysenter with | |
1677 | Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter. | |
1678 | * i386-tbl.h: Regenerated. | |
1679 | ||
9fc0b501 SB |
1680 | 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com> |
1681 | ||
1682 | PR 25469 | |
1683 | * z80-dis.c: Add support for GBZ80 opcodes. | |
1684 | ||
c5d7be0c AM |
1685 | 2020-02-04 Alan Modra <amodra@gmail.com> |
1686 | ||
1687 | * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned. | |
1688 | ||
44e4546f AM |
1689 | 2020-02-03 Alan Modra <amodra@gmail.com> |
1690 | ||
1691 | * m32c-ibld.c: Regenerate. | |
1692 | ||
b2b1453a AM |
1693 | 2020-02-01 Alan Modra <amodra@gmail.com> |
1694 | ||
1695 | * frv-ibld.c: Regenerate. | |
1696 | ||
4102be5c JB |
1697 | 2020-01-31 Jan Beulich <jbeulich@suse.com> |
1698 | ||
1699 | * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete. | |
1700 | (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label. | |
1701 | (OP_E_memory): Replace xmm_mdq_mode case label by | |
1702 | vex_scalar_w_dq_mode one. | |
1703 | * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar. | |
1704 | ||
825bd36c JB |
1705 | 2020-01-31 Jan Beulich <jbeulich@suse.com> |
1706 | ||
1707 | * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete. | |
1708 | (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode, | |
1709 | vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments. | |
1710 | (intel_operand_size): Drop vex_w_dq_mode case label. | |
1711 | ||
c3036ed0 RS |
1712 | 2020-01-31 Richard Sandiford <richard.sandiford@arm.com> |
1713 | ||
1714 | * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt. | |
1715 | Remove C_SCAN_MOVPRFX for SVE bfcvtnt. | |
1716 | ||
0c115f84 AM |
1717 | 2020-01-30 Alan Modra <amodra@gmail.com> |
1718 | ||
1719 | * m32c-ibld.c: Regenerate. | |
1720 | ||
bd434cc4 JM |
1721 | 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> |
1722 | ||
1723 | * bpf-opc.c: Regenerate. | |
1724 | ||
aeab2b26 JB |
1725 | 2020-01-30 Jan Beulich <jbeulich@suse.com> |
1726 | ||
1727 | * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators. | |
1728 | (dis386): Use them to replace C2/C3 table entries. | |
1729 | (x86_64_table): Add X86_64_C2 and X86_64_C3 entries. | |
1730 | * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64 | |
1731 | ones. Use Size64 instead of DefaultSize on Intel64 ones. | |
1732 | * i386-tbl.h: Re-generate. | |
1733 | ||
62b3f548 JB |
1734 | 2020-01-30 Jan Beulich <jbeulich@suse.com> |
1735 | ||
1736 | * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword | |
1737 | forms. | |
1738 | (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop | |
1739 | DefaultSize. | |
1740 | * i386-tbl.h: Re-generate. | |
1741 | ||
1bd8ae10 AM |
1742 | 2020-01-30 Alan Modra <amodra@gmail.com> |
1743 | ||
1744 | * tic4x-dis.c (tic4x_dp): Make unsigned. | |
1745 | ||
bc31405e L |
1746 | 2020-01-27 H.J. Lu <hongjiu.lu@intel.com> |
1747 | Jan Beulich <jbeulich@suse.com> | |
1748 | ||
1749 | PR binutils/25445 | |
1750 | * i386-dis.c (MOVSXD_Fixup): New function. | |
1751 | (movsxd_mode): New enum. | |
1752 | (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd. | |
1753 | (intel_operand_size): Handle movsxd_mode. | |
1754 | (OP_E_register): Likewise. | |
1755 | (OP_G): Likewise. | |
1756 | * i386-opc.tbl: Remove Rex64 and allow 32-bit destination | |
1757 | register on movsxd. Add movsxd with 16-bit destination register | |
1758 | for AMD64 and Intel64 ISAs. | |
1759 | * i386-tbl.h: Regenerated. | |
1760 | ||
7568c93b TC |
1761 | 2020-01-27 Tamar Christina <tamar.christina@arm.com> |
1762 | ||
1763 | PR 25403 | |
1764 | * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv. | |
1765 | * aarch64-asm-2.c: Regenerate | |
1766 | * aarch64-dis-2.c: Likewise. | |
1767 | * aarch64-opc-2.c: Likewise. | |
1768 | ||
c006a730 JB |
1769 | 2020-01-21 Jan Beulich <jbeulich@suse.com> |
1770 | ||
1771 | * i386-opc.tbl (sysret): Drop DefaultSize. | |
1772 | * i386-tbl.h: Re-generate. | |
1773 | ||
c906a69a JB |
1774 | 2020-01-21 Jan Beulich <jbeulich@suse.com> |
1775 | ||
1776 | * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and | |
1777 | Dword. | |
1778 | (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword. | |
1779 | * i386-tbl.h: Re-generate. | |
1780 | ||
26916852 NC |
1781 | 2020-01-20 Nick Clifton <nickc@redhat.com> |
1782 | ||
1783 | * po/de.po: Updated German translation. | |
1784 | * po/pt_BR.po: Updated Brazilian Portuguese translation. | |
1785 | * po/uk.po: Updated Ukranian translation. | |
1786 | ||
4d6cbb64 AM |
1787 | 2020-01-20 Alan Modra <amodra@gmail.com> |
1788 | ||
1789 | * hppa-dis.c (fput_const): Remove useless cast. | |
1790 | ||
2bddb71a AM |
1791 | 2020-01-20 Alan Modra <amodra@gmail.com> |
1792 | ||
1793 | * arm-dis.c (print_insn_arm): Wrap 'T' value. | |
1794 | ||
1b1bb2c6 NC |
1795 | 2020-01-18 Nick Clifton <nickc@redhat.com> |
1796 | ||
1797 | * configure: Regenerate. | |
1798 | * po/opcodes.pot: Regenerate. | |
1799 | ||
ae774686 NC |
1800 | 2020-01-18 Nick Clifton <nickc@redhat.com> |
1801 | ||
1802 | Binutils 2.34 branch created. | |
1803 | ||
07f1f3aa CB |
1804 | 2020-01-17 Christian Biesinger <cbiesinger@google.com> |
1805 | ||
1806 | * opintl.h: Fix spelling error (seperate). | |
1807 | ||
42e04b36 L |
1808 | 2020-01-17 H.J. Lu <hongjiu.lu@intel.com> |
1809 | ||
1810 | * i386-opc.tbl: Add {vex} pseudo prefix. | |
1811 | * i386-tbl.h: Regenerated. | |
1812 | ||
2da2eaf4 AV |
1813 | 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
1814 | ||
1815 | PR 25376 | |
1816 | * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits. | |
1817 | (neon_opcodes): Likewise. | |
1818 | (select_arm_features): Make sure we enable MVE bits when selecting | |
1819 | armv8.1-m.main. Make sure we do not enable MVE bits when not selecting | |
1820 | any architecture. | |
1821 | ||
d0849eed JB |
1822 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
1823 | ||
1824 | * i386-opc.tbl: Drop stale comment from XOP section. | |
1825 | ||
9cf70a44 JB |
1826 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
1827 | ||
1828 | * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms. | |
1829 | (extractps): Add VexWIG to SSE2AVX forms. | |
1830 | * i386-tbl.h: Re-generate. | |
1831 | ||
4814632e JB |
1832 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
1833 | ||
1834 | * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop | |
1835 | Size64 from and use VexW1 on SSE2AVX forms. | |
1836 | (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from | |
1837 | VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1. | |
1838 | * i386-tbl.h: Re-generate. | |
1839 | ||
aad09917 AM |
1840 | 2020-01-15 Alan Modra <amodra@gmail.com> |
1841 | ||
1842 | * tic4x-dis.c (tic4x_version): Make unsigned long. | |
1843 | (optab, optab_special, registernames): New file scope vars. | |
1844 | (tic4x_print_register): Set up registernames rather than | |
1845 | malloc'd registertable. | |
1846 | (tic4x_disassemble): Delete optable and optable_special. Use | |
1847 | optab and optab_special instead. Throw away old optab, | |
1848 | optab_special and registernames when info->mach changes. | |
1849 | ||
7a6bf3be SB |
1850 | 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com> |
1851 | ||
1852 | PR 25377 | |
1853 | * z80-dis.c (suffix): Use .db instruction to generate double | |
1854 | prefix. | |
1855 | ||
ca1eaac0 AM |
1856 | 2020-01-14 Alan Modra <amodra@gmail.com> |
1857 | ||
1858 | * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short | |
1859 | values to unsigned before shifting. | |
1860 | ||
1d67fe3b TT |
1861 | 2020-01-13 Thomas Troeger <tstroege@gmx.de> |
1862 | ||
1863 | * arm-dis.c (print_insn_arm): Fill in insn info fields for control | |
1864 | flow instructions. | |
1865 | (print_insn_thumb16, print_insn_thumb32): Likewise. | |
1866 | (print_insn): Initialize the insn info. | |
1867 | * i386-dis.c (print_insn): Initialize the insn info fields, and | |
1868 | detect jumps. | |
1869 | ||
5e4f7e05 CZ |
1870 | 2012-01-13 Claudiu Zissulescu <claziss@gmail.com> |
1871 | ||
1872 | * arc-opc.c (C_NE): Make it required. | |
1873 | ||
b9fe6b8a CZ |
1874 | 2012-01-13 Claudiu Zissulescu <claziss@gmail.com> |
1875 | ||
1876 | * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo | |
1877 | reserved register name. | |
1878 | ||
90dee485 AM |
1879 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1880 | ||
1881 | * ns32k-dis.c (Is_gen): Use strchr, add 'f'. | |
1882 | (print_insn_ns32k): Adjust ioffset for 'f' index_offset. | |
1883 | ||
febda64f AM |
1884 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1885 | ||
1886 | * wasm32-dis.c (print_insn_wasm32): Localise variables. Store | |
1887 | result of wasm_read_leb128 in a uint64_t and check that bits | |
1888 | are not lost when copying to other locals. Use uint32_t for | |
1889 | most locals. Use PRId64 when printing int64_t. | |
1890 | ||
df08b588 AM |
1891 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1892 | ||
1893 | * score-dis.c: Formatting. | |
1894 | * score7-dis.c: Formatting. | |
1895 | ||
b2c759ce AM |
1896 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1897 | ||
1898 | * score-dis.c (print_insn_score48): Use unsigned variables for | |
1899 | unsigned values. Don't left shift negative values. | |
1900 | (print_insn_score32): Likewise. | |
1901 | * score7-dis.c (print_insn_score32, print_insn_score16): Likewise. | |
1902 | ||
5496abe1 AM |
1903 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1904 | ||
1905 | * tic4x-dis.c (tic4x_print_register): Remove dead code. | |
1906 | ||
202e762b AM |
1907 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1908 | ||
1909 | * fr30-ibld.c: Regenerate. | |
1910 | ||
7ef412cf AM |
1911 | 2020-01-13 Alan Modra <amodra@gmail.com> |
1912 | ||
1913 | * xgate-dis.c (print_insn): Don't left shift signed value. | |
1914 | (ripBits): Formatting, use 1u. | |
1915 | ||
7f578b95 AM |
1916 | 2020-01-10 Alan Modra <amodra@gmail.com> |
1917 | ||
1918 | * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned. | |
1919 | * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval. | |
1920 | ||
441af85b AM |
1921 | 2020-01-10 Alan Modra <amodra@gmail.com> |
1922 | ||
1923 | * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG, | |
1924 | and XRREG value earlier to avoid a shift with negative exponent. | |
1925 | * m10200-dis.c (disassemble): Similarly. | |
1926 | ||
bce58db4 NC |
1927 | 2020-01-09 Nick Clifton <nickc@redhat.com> |
1928 | ||
1929 | PR 25224 | |
1930 | * z80-dis.c (ld_ii_ii): Use correct cast. | |
1931 | ||
40c75bc8 SB |
1932 | 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com> |
1933 | ||
1934 | PR 25224 | |
1935 | * z80-dis.c (ld_ii_ii): Use character constant when checking | |
1936 | opcode byte value. | |
1937 | ||
d835a58b JB |
1938 | 2020-01-09 Jan Beulich <jbeulich@suse.com> |
1939 | ||
1940 | * i386-dis.c (SEP_Fixup): New. | |
1941 | (SEP): Define. | |
1942 | (dis386_twobyte): Use it for sysenter/sysexit. | |
1943 | (enum x86_64_isa): Change amd64 enumerator to value 1. | |
1944 | (OP_J): Compare isa64 against intel64 instead of amd64. | |
1945 | * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64 | |
1946 | forms. | |
1947 | * i386-tbl.h: Re-generate. | |
1948 | ||
030a2e78 AM |
1949 | 2020-01-08 Alan Modra <amodra@gmail.com> |
1950 | ||
1951 | * z8k-dis.c: Include libiberty.h | |
1952 | (instr_data_s): Make max_fetched unsigned. | |
1953 | (z8k_lookup_instr): Make nibl_index and tabl_index unsigned. | |
1954 | Don't exceed byte_info bounds. | |
1955 | (output_instr): Make num_bytes unsigned. | |
1956 | (unpack_instr): Likewise for nibl_count and loop. | |
1957 | * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and | |
1958 | idx unsigned. | |
1959 | * z8k-opc.h: Regenerate. | |
1960 | ||
bb82aefe SV |
1961 | 2020-01-07 Shahab Vahedi <shahab@synopsys.com> |
1962 | ||
1963 | * arc-tbl.h (llock): Use 'LLOCK' as class. | |
1964 | (llockd): Likewise. | |
1965 | (scond): Use 'SCOND' as class. | |
1966 | (scondd): Likewise. | |
1967 | (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit. | |
1968 | (scondd): Likewise. | |
1969 | ||
cc6aa1a6 AM |
1970 | 2020-01-06 Alan Modra <amodra@gmail.com> |
1971 | ||
1972 | * m32c-ibld.c: Regenerate. | |
1973 | ||
660e62b1 AM |
1974 | 2020-01-06 Alan Modra <amodra@gmail.com> |
1975 | ||
1976 | PR 25344 | |
1977 | * z80-dis.c (suffix): Don't use a local struct buffer copy. | |
1978 | Peek at next byte to prevent recursion on repeated prefix bytes. | |
1979 | Ensure uninitialised "mybuf" is not accessed. | |
1980 | (print_insn_z80): Don't zero n_fetch and n_used here,.. | |
1981 | (print_insn_z80_buf): ..do it here instead. | |
1982 | ||
c9ae58fe AM |
1983 | 2020-01-04 Alan Modra <amodra@gmail.com> |
1984 | ||
1985 | * m32r-ibld.c: Regenerate. | |
1986 | ||
5f57d4ec AM |
1987 | 2020-01-04 Alan Modra <amodra@gmail.com> |
1988 | ||
1989 | * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value. | |
1990 | ||
2c5c1196 AM |
1991 | 2020-01-04 Alan Modra <amodra@gmail.com> |
1992 | ||
1993 | * crx-dis.c (match_opcode): Avoid shift left of signed value. | |
1994 | ||
2e98c6c5 AM |
1995 | 2020-01-04 Alan Modra <amodra@gmail.com> |
1996 | ||
1997 | * d30v-dis.c (print_insn): Avoid signed overflow in left shift. | |
1998 | ||
567dfba2 JB |
1999 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
2000 | ||
5437a02a JB |
2001 | * aarch64-tbl.h (aarch64_opcode_table): Use |
2002 | SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}. | |
2003 | ||
2004 | 2020-01-03 Jan Beulich <jbeulich@suse.com> | |
2005 | ||
2006 | * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD | |
567dfba2 JB |
2007 | forms of SUDOT and USDOT. |
2008 | ||
8c45011a JB |
2009 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
2010 | ||
5437a02a | 2011 | * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from |
8c45011a JB |
2012 | uzip{1,2}. |
2013 | * opcodes/aarch64-dis-2.c: Re-generate. | |
2014 | ||
f4950f76 JB |
2015 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
2016 | ||
5437a02a | 2017 | * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit |
f4950f76 JB |
2018 | FMMLA encoding. |
2019 | * opcodes/aarch64-dis-2.c: Re-generate. | |
2020 | ||
6655dba2 SB |
2021 | 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com> |
2022 | ||
2023 | * z80-dis.c: Add support for eZ80 and Z80 instructions. | |
2024 | ||
b14ce8bf AM |
2025 | 2020-01-01 Alan Modra <amodra@gmail.com> |
2026 | ||
2027 | Update year range in copyright notice of all files. | |
2028 | ||
0b114740 | 2029 | For older changes see ChangeLog-2019 |
3499769a | 2030 | \f |
0b114740 | 2031 | Copyright (C) 2020 Free Software Foundation, Inc. |
3499769a AM |
2032 | |
2033 | Copying and distribution of this file, with or without modification, | |
2034 | are permitted in any medium without royalty provided the copyright | |
2035 | notice and this notice are preserved. | |
2036 | ||
2037 | Local Variables: | |
2038 | mode: change-log | |
2039 | left-margin: 8 | |
2040 | fill-column: 74 | |
2041 | version-control: never | |
2042 | End: |