RISC-V: Indent and GNU coding standards tidy, also aligned the code.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12021-01-15 Nelson Chu <nelson.chu@sifive.com>
2
3 * riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
4 (riscv_fpr_names_abi): Likewise.
5 (riscv_opcodes): Likewise.
6 (riscv_insn_types): Likewise.
7
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82021-01-15 Nelson Chu <nelson.chu@sifive.com>
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10 * riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
11
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122021-01-15 Nelson Chu <nelson.chu@sifive.com>
13
14 * riscv-dis.c: Comments tidy and improvement.
15 * riscv-opc.c: Likewise.
16
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172021-01-13 Alan Modra <amodra@gmail.com>
18
19 * Makefile.in: Regenerate.
20
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212021-01-12 H.J. Lu <hongjiu.lu@intel.com>
22
23 PR binutils/26792
24 * configure.ac: Use GNU_MAKE_JOBSERVER.
25 * aclocal.m4: Regenerated.
26 * configure: Likewise.
27
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282021-01-12 Nick Clifton <nickc@redhat.com>
29
30 * po/sr.po: Updated Serbian translation.
31
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322021-01-11 H.J. Lu <hongjiu.lu@intel.com>
33
34 PR ld/27173
35 * configure: Regenerated.
36
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372021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38
39 * aarch64-asm-2.c: Regenerate.
40 * aarch64-dis-2.c: Likewise.
41 * aarch64-opc-2.c: Likewise.
42 * aarch64-opc.c (aarch64_print_operand):
43 Delete handling of AARCH64_OPND_CSRE_CSR.
44 * aarch64-tbl.h (aarch64_feature_csre): Delete.
45 (CSRE): Likewise.
46 (_CSRE_INSN): Likewise.
47 (aarch64_opcode_table): Delete csr.
48
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492021-01-11 Nick Clifton <nickc@redhat.com>
50
51 * po/de.po: Updated German translation.
52 * po/fr.po: Updated French translation.
53 * po/pt_BR.po: Updated Brazilian Portuguese translation.
54 * po/sv.po: Updated Swedish translation.
55 * po/uk.po: Updated Ukranian translation.
56
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572021-01-09 H.J. Lu <hongjiu.lu@intel.com>
58
59 * configure: Regenerated.
60
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612021-01-09 Nick Clifton <nickc@redhat.com>
62
63 * configure: Regenerate.
64 * po/opcodes.pot: Regenerate.
65
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662021-01-09 Nick Clifton <nickc@redhat.com>
67
68 * 2.36 release branch crated.
69
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702021-01-08 Peter Bergner <bergner@linux.ibm.com>
71
72 * ppc-opc.c (insert_dw, (extract_dw): New functions.
73 (DW, (XRC_MASK): Define.
74 (powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
75
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762021-01-09 Alan Modra <amodra@gmail.com>
77
78 * configure: Regenerate.
79
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802021-01-08 Nick Clifton <nickc@redhat.com>
81
82 * po/sv.po: Updated Swedish translation.
83
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842021-01-08 Nick Clifton <nickc@redhat.com>
85
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86 PR 27129
87 * aarch64-dis.c (determine_disassembling_preference): Move call to
88 aarch64_match_operands_constraint outside of the assertion.
89 * aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert.
90 Replace with a return of FALSE.
91
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92 PR 27139
93 * aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a
94 core system register.
95
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962021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
97
98 * configure: Regenerate.
99
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1002021-01-07 Nick Clifton <nickc@redhat.com>
101
102 * po/fr.po: Updated French translation.
103
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1042021-01-07 Fredrik Noring <noring@nocrew.org>
105
106 * m68k-opc.c (chkl): Change minimum architecture requirement to
107 m68020.
108
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1092021-01-07 Philipp Tomsich <prt@gnu.org>
110
111 * riscv-opc.c (riscv_opcodes): Add pause hint instruction.
112
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1132021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
114 Jim Wilson <jimw@sifive.com>
115 Andrew Waterman <andrew@sifive.com>
116 Maxim Blinov <maxim.blinov@embecosm.com>
117 Kito Cheng <kito.cheng@sifive.com>
118 Nelson Chu <nelson.chu@sifive.com>
119
120 * riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions.
121 (MASK_RVB_IMM): Used for rev8 and orc.b encoding.
122
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1232021-01-01 Alan Modra <amodra@gmail.com>
124
125 Update year range in copyright notice of all files.
126
c2795844 127For older changes see ChangeLog-2020
3499769a 128\f
c2795844 129Copyright (C) 2021 Free Software Foundation, Inc.
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130
131Copying and distribution of this file, with or without modification,
132are permitted in any medium without royalty provided the copyright
133notice and this notice are preserved.
134
135Local Variables:
136mode: change-log
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139version-control: never
140End:
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