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x86: drop bogus NoAVX
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
1b193f0b
JB		 12018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
4 Drop NoAVX.
5 * i386-tlb.h: Re-generate.
6
f2f6a710
JB		 72018-03-08 Jan Beulich <jbeulich@suse.com>
8
9 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
10 * i386-tlb.h: Re-generate.
11
38e314eb
JB		 122018-03-08 Jan Beulich <jbeulich@suse.com>
13
14 * i386-gen.c (opcode_modifiers): Delete FloatD.
15 * i386-opc.h (FloatD): Delete.
16 (struct i386_opcode_modifier): Delete floatd.
17 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
18 FloatD by D.
19 * i386-tlb.h: Re-generate.
20
d53e6b98
JB		 212018-03-08 Jan Beulich <jbeulich@suse.com>
22
23 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
24
2907c2f5
JB		 252018-03-08 Jan Beulich <jbeulich@suse.com>
26
27 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
28 * i386-tlb.h: Re-generate.
29
73053c1f
JB		 302018-03-08 Jan Beulich <jbeulich@suse.com>
31
32 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
33 forms.
34 * i386-tlb.h: Re-generate.
35
52fe4420
AM		 362018-03-07 Alan Modra <amodra@gmail.com>
37
38 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
39 bfd_arch_rs6000.
40 * disassemble.h (print_insn_rs6000): Delete.
41 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
42 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
43 (print_insn_rs6000): Delete.
44
a6743a54
AM		 452018-03-03 Alan Modra <amodra@gmail.com>
46
47 * sysdep.h (opcodes_error_handler): Define.
48 (_bfd_error_handler): Declare.
49 * Makefile.am: Remove stray #.
50 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
51 EDIT" comment.
52 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
53 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
54 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
55 opcodes_error_handler to print errors. Standardize error messages.
56 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
57 and include opintl.h.
58 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
59 * i386-gen.c: Standardize error messages.
60 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
61 * Makefile.in: Regenerate.
62 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
63 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
64 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
65 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
66 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
67 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
68 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
69 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
70 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
71 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
72 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
73 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
74 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
75
8305403a
L		 762018-03-01 H.J. Lu <hongjiu.lu@intel.com>
77
78 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
79 vpsub[bwdq] instructions.
80 * i386-tbl.h: Regenerated.
81
e184813f
AM		 822018-03-01 Alan Modra <amodra@gmail.com>
83
84 * configure.ac (ALL_LINGUAS): Sort.
85 * configure: Regenerate.
86
5b616bef
TP		 872018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
88
89 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
90 macro by assignements.
91
b6f8c7c4
L		 922018-02-27 H.J. Lu <hongjiu.lu@intel.com>
93
94 PR gas/22871
95 * i386-gen.c (opcode_modifiers): Add Optimize.
96 * i386-opc.h (Optimize): New enum.
97 (i386_opcode_modifier): Add optimize.
98 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
99 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
100 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
101 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
102 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
103 vpxord and vpxorq.
104 * i386-tbl.h: Regenerated.
105
e95b887f
AM		 1062018-02-26 Alan Modra <amodra@gmail.com>
107
108 * crx-dis.c (getregliststring): Allocate a large enough buffer
109 to silence false positive gcc8 warning.
110
0bccfb29
JW		 1112018-02-22 Shea Levy <shea@shealevy.com>
112
113 * disassemble.c (ARCH_riscv): Define if ARCH_all.
114
6b6b6807
L		 1152018-02-22 H.J. Lu <hongjiu.lu@intel.com>
116
117 * i386-opc.tbl: Add {rex},
118 * i386-tbl.h: Regenerated.
119
75f31665
MR		 1202018-02-20 Maciej W. Rozycki <macro@mips.com>
121
122 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
123 (mips16_opcodes): Replace `M' with `m' for "restore".
124
e207bc53
TP		 1252018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
126
127 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
128
87993319
MR		 1292018-02-13 Maciej W. Rozycki <macro@mips.com>
130
131 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
132 variable to `function_index'.
133
68d20676
NC		 1342018-02-13 Nick Clifton <nickc@redhat.com>
135
136 PR 22823
137 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
138 about truncation of printing.
139
d2159fdc
HW		 1402018-02-12 Henry Wong <henry@stuffedcow.net>
141
142 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
143
f174ef9f
NC		 1442018-02-05 Nick Clifton <nickc@redhat.com>
145
146 * po/pt_BR.po: Updated Brazilian Portuguese translation.
147
be3a8dca
IT		 1482018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
149
150 * i386-dis.c (enum): Add pconfig.
151 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
152 (cpu_flags): Add CpuPCONFIG.
153 * i386-opc.h (enum): Add CpuPCONFIG.
154 (i386_cpu_flags): Add cpupconfig.
155 * i386-opc.tbl: Add PCONFIG instruction.
156 * i386-init.h: Regenerate.
157 * i386-tbl.h: Likewise.
158
3233d7d0
IT		 1592018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
160
161 * i386-dis.c (enum): Add PREFIX_0F09.
162 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
163 (cpu_flags): Add CpuWBNOINVD.
164 * i386-opc.h (enum): Add CpuWBNOINVD.
165 (i386_cpu_flags): Add cpuwbnoinvd.
166 * i386-opc.tbl: Add WBNOINVD instruction.
167 * i386-init.h: Regenerate.
168 * i386-tbl.h: Likewise.
169
e925c834
JW		 1702018-01-17 Jim Wilson <jimw@sifive.com>
171
172 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
173
d777820b
IT		 1742018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
175
176 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
177 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
178 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
179 (cpu_flags): Add CpuIBT, CpuSHSTK.
180 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
181 (i386_cpu_flags): Add cpuibt, cpushstk.
182 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
183 * i386-init.h: Regenerate.
184 * i386-tbl.h: Likewise.
185
f6efed01
NC		 1862018-01-16 Nick Clifton <nickc@redhat.com>
187
188 * po/pt_BR.po: Updated Brazilian Portugese translation.
189 * po/de.po: Updated German translation.
190
2721d702
JW		 1912018-01-15 Jim Wilson <jimw@sifive.com>
192
193 * riscv-opc.c (match_c_nop): New.
194 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
195
616dcb87
NC		 1962018-01-15 Nick Clifton <nickc@redhat.com>
197
198 * po/uk.po: Updated Ukranian translation.
199
3957a496
NC		 2002018-01-13 Nick Clifton <nickc@redhat.com>
201
202 * po/opcodes.pot: Regenerated.
203
769c7ea5
NC		 2042018-01-13 Nick Clifton <nickc@redhat.com>
205
206 * configure: Regenerate.
207
faf766e3
NC		 2082018-01-13 Nick Clifton <nickc@redhat.com>
209
210 2.30 branch created.
211
888a89da
IT		 2122018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
213
214 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
215 * i386-tbl.h: Regenerate.
216
cbda583a
JB		 2172018-01-10 Jan Beulich <jbeulich@suse.com>
218
219 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
220 * i386-tbl.h: Re-generate.
221
c9e92278
JB		 2222018-01-10 Jan Beulich <jbeulich@suse.com>
223
224 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
225 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
226 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
227 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
228 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
229 Disp8MemShift of AVX512VL forms.
230 * i386-tbl.h: Re-generate.
231
35fd2b2b
JW		 2322018-01-09 Jim Wilson <jimw@sifive.com>
233
234 * riscv-dis.c (maybe_print_address): If base_reg is zero,
235 then the hi_addr value is zero.
236
91d8b670
JG		 2372018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
238
239 * arm-dis.c (arm_opcodes): Add csdb.
240 (thumb32_opcodes): Add csdb.
241
be2e7d95
JG		 2422018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
243
244 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
245 * aarch64-asm-2.c: Regenerate.
246 * aarch64-dis-2.c: Regenerate.
247 * aarch64-opc-2.c: Regenerate.
248
704a705d
L		 2492018-01-08 H.J. Lu <hongjiu.lu@intel.com>
250
251 PR gas/22681
252 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
253 Remove AVX512 vmovd with 64-bit operands.
254 * i386-tbl.h: Regenerated.
255
35eeb78f
JW		 2562018-01-05 Jim Wilson <jimw@sifive.com>
257
258 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
259 jalr.
260
219d1afa
AM		 2612018-01-03 Alan Modra <amodra@gmail.com>
262
263 Update year range in copyright notice of all files.
264
1508bbf5
JB		 2652018-01-02 Jan Beulich <jbeulich@suse.com>
266
267 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
268 and OPERAND_TYPE_REGZMM entries.
269
1e563868 270For older changes see ChangeLog-2017
3499769a 271\f
1e563868 272Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 273
274Copying and distribution of this file, with or without modification,
275are permitted in any medium without royalty provided the copyright
276notice and this notice are preserved.
277
278Local Variables:
279mode: change-log
280left-margin: 8
281fill-column: 74
282version-control: never
283End:
GDB Binutils - Deliverables
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