Commit | Line | Data |
---|---|---|
22109423 L |
1 | 2010-08-06 Quentin Neill <quentin.neill@amd.com> |
2 | ||
3 | * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add | |
4 | to processor flags for PENTIUMPRO processors and later. | |
5 | * i386-opc.h (enum): Add CpuNop. | |
6 | (i386_cpu_flags): Add cpunop bit. | |
7 | * i386-opc.tbl: Change nop cpu_flags. | |
8 | * i386-init.h: Regenerated. | |
9 | * i386-tbl.h: Likewise. | |
10 | ||
b49dfb4a L |
11 | 2010-08-06 Quentin Neill <quentin.neill@amd.com> |
12 | ||
13 | * i386-opc.h (enum): Fix typos in comments. | |
14 | ||
6ca4eb77 AM |
15 | 2010-08-06 Alan Modra <amodra@gmail.com> |
16 | ||
17 | * disassemble.c: Formatting. | |
18 | (disassemble_init_for_target <ARCH_m32c>): Comment on endian. | |
19 | ||
92d4d42e L |
20 | 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> |
21 | ||
22 | * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b. | |
23 | * i386-tbl.h: Regenerated. | |
24 | ||
b414985b L |
25 | 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> |
26 | ||
27 | * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1. | |
28 | ||
29 | * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b. | |
30 | * i386-tbl.h: Regenerated. | |
31 | ||
f9c7014e DD |
32 | 2010-07-29 DJ Delorie <dj@redhat.com> |
33 | ||
34 | * rx-decode.opc (SRR): New. | |
35 | (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov | |
36 | r0,r0) and NOP3 (max r0,r0) special cases. | |
37 | * rx-decode.c: Regenerate. | |
6ca4eb77 | 38 | |
592a252b L |
39 | 2010-07-28 H.J. Lu <hongjiu.lu@intel.com> |
40 | ||
41 | * i386-dis.c: Add 0F to VEX opcode enums. | |
42 | ||
3cf79a01 DD |
43 | 2010-07-27 DJ Delorie <dj@redhat.com> |
44 | ||
45 | * rx-decode.opc (store_flags): Remove, replace with F_* macros. | |
46 | (rx_decode_opcode): Likewise. | |
47 | * rx-decode.c: Regenerate. | |
48 | ||
1cd986c5 NC |
49 | 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com> |
50 | Ina Pandit <ina.pandit@kpitcummins.com> | |
51 | ||
52 | * v850-dis.c (v850_sreg_names): Updated structure for system | |
53 | registers. | |
54 | (float_cc_names): new structure for condition codes. | |
55 | (print_value): Update the function that prints value. | |
56 | (get_operand_value): New function to get the operand value. | |
57 | (disassemble): Updated to handle the disassembly of instructions. | |
58 | (print_insn_v850): Updated function to print instruction for different | |
59 | families. | |
60 | * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1, | |
61 | extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3, | |
62 | extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6, | |
63 | insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop, | |
64 | extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16, | |
65 | extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22, | |
66 | extract_d22, insert_d23, extract_d23, insert_i9, extract_i9, | |
67 | insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New. | |
68 | (insert_d8_7, insert_d5_4, insert_i5div): Remove. | |
69 | (v850_operands): Update with the relocation name. Also update | |
70 | the instructions with specific set of processors. | |
71 | ||
52e7f43d RE |
72 | 2010-07-08 Tejas Belagod <tejas.belagod@arm.com> |
73 | ||
74 | * arm-dis.c (print_insn_arm): Add cases for printing more | |
75 | symbolic operands. | |
76 | (print_insn_thumb32): Likewise. | |
77 | ||
c680e7f6 MR |
78 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
79 | ||
80 | * mips-dis.c (print_insn_mips): Correct branch instruction type | |
81 | determination. | |
82 | ||
9a2c7088 MR |
83 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
84 | ||
85 | * mips-dis.c (print_mips16_insn_arg): Remove branch instruction | |
86 | type and delay slot determination. | |
87 | (print_insn_mips16): Extend branch instruction type and delay | |
88 | slot determination to cover all instructions. | |
89 | * mips16-opc.c (BR): Remove macro. | |
90 | (UBR, CBR): New macros. | |
91 | (mips16_opcodes): Update branch annotation for "b", "beqz", | |
92 | "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc" | |
93 | and "jrc". | |
94 | ||
d7d9a9f8 L |
95 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
96 | ||
97 | AVX Programming Reference (June, 2010) | |
98 | * i386-dis.c (mod_table): Replace rdrnd with rdrand. | |
99 | * i386-opc.tbl: Likewise. | |
100 | * i386-tbl.h: Regenerated. | |
101 | ||
77321f53 L |
102 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
103 | ||
104 | * i386-opc.h (CpuFSGSBase): Fix a typo in comments. | |
105 | ||
7102e95e AS |
106 | 2010-07-03 Andreas Schwab <schwab@linux-m68k.org> |
107 | ||
108 | * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to | |
109 | ppc_cpu_t before inverting. | |
3a5530ea AS |
110 | (ppc_parse_cpu): Likewise. |
111 | (print_insn_powerpc): Likewise. | |
7102e95e | 112 | |
bdc70b4a AM |
113 | 2010-07-03 Alan Modra <amodra@gmail.com> |
114 | ||
115 | * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags. | |
116 | * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete. | |
117 | (PPC64, MFDEC2): Update. | |
118 | (NON32, NO371): Define. | |
119 | (powerpc_opcode): Update to not use old opcode flags, and avoid | |
120 | -m601 duplicates. | |
121 | ||
21375995 DD |
122 | 2010-07-03 DJ Delorie <dj@delorie.com> |
123 | ||
124 | * m32c-ibld.c: Regenerate. | |
125 | ||
81a0b7e2 AM |
126 | 2010-07-03 Alan Modra <amodra@gmail.com> |
127 | ||
128 | * ppc-opc.c (PWR2COM): Define. | |
129 | (PPCPWR2): Add PPC_OPCODE_COMMON. | |
130 | (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.", | |
131 | "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst", | |
132 | "rac" from -mcom. | |
133 | ||
c7b8aa3a L |
134 | 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> |
135 | ||
136 | AVX Programming Reference (June, 2010) | |
137 | * i386-dis.c (PREFIX_0FAE_REG_0): New. | |
138 | (PREFIX_0FAE_REG_1): Likewise. | |
139 | (PREFIX_0FAE_REG_2): Likewise. | |
140 | (PREFIX_0FAE_REG_3): Likewise. | |
141 | (PREFIX_VEX_3813): Likewise. | |
142 | (PREFIX_VEX_3A1D): Likewise. | |
143 | (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
144 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and | |
145 | PREFIX_VEX_3A1D. | |
146 | (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D. | |
147 | (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
148 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd. | |
149 | ||
150 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS, | |
151 | CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS. | |
152 | (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C. | |
153 | ||
154 | * i386-opc.h (CpuXsaveopt): New. | |
77321f53 | 155 | (CpuFSGSBase): Likewise. |
c7b8aa3a L |
156 | (CpuRdRnd): Likewise. |
157 | (CpuF16C): Likewise. | |
158 | (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and | |
159 | cpuf16c. | |
160 | ||
161 | * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd, | |
162 | wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph. | |
a00eb5e8 L |
163 | * i386-init.h: Regenerated. |
164 | * i386-tbl.h: Likewise. | |
c7b8aa3a | 165 | |
09a8ad8d AM |
166 | 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
167 | ||
168 | * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf | |
169 | and mtocrf on EFS. | |
170 | ||
360cfc9c AM |
171 | 2010-06-29 Alan Modra <amodra@gmail.com> |
172 | ||
173 | * maxq-dis.c: Delete file. | |
174 | * Makefile.am: Remove references to maxq. | |
175 | * configure.in: Likewise. | |
176 | * disassemble.c: Likewise. | |
177 | * Makefile.in: Regenerate. | |
178 | * configure: Regenerate. | |
179 | * po/POTFILES.in: Regenerate. | |
180 | ||
dc898d5e AM |
181 | 2010-06-29 Alan Modra <amodra@gmail.com> |
182 | ||
183 | * mep-dis.c: Regenerate. | |
184 | ||
8e560766 MGD |
185 | 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
186 | ||
187 | * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax. | |
188 | ||
c7e2358a AM |
189 | 2010-06-27 Alan Modra <amodra@gmail.com> |
190 | ||
191 | * arc-dis.c (arc_sprintf): Delete set but unused variables. | |
192 | (decodeInstr): Likewise. | |
193 | * dlx-dis.c (print_insn_dlx): Likewise. | |
194 | * h8300-dis.c (bfd_h8_disassemble_init): Likewise. | |
195 | * maxq-dis.c (check_move, print_insn): Likewise. | |
196 | * mep-dis.c (mep_examine_ivc2_insns): Likewise. | |
197 | * msp430-dis.c (msp430_branchinstr): Likewise. | |
198 | * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning. | |
199 | * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise. | |
200 | * sparc-dis.c (print_insn_sparc): Likewise. | |
201 | * fr30-asm.c: Regenerate. | |
202 | * frv-asm.c: Regenerate. | |
203 | * ip2k-asm.c: Regenerate. | |
204 | * iq2000-asm.c: Regenerate. | |
205 | * lm32-asm.c: Regenerate. | |
206 | * m32c-asm.c: Regenerate. | |
207 | * m32r-asm.c: Regenerate. | |
208 | * mep-asm.c: Regenerate. | |
209 | * mt-asm.c: Regenerate. | |
210 | * openrisc-asm.c: Regenerate. | |
211 | * xc16x-asm.c: Regenerate. | |
212 | * xstormy16-asm.c: Regenerate. | |
213 | ||
6ffe3d99 NC |
214 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
215 | ||
216 | PR gas/11673 | |
217 | * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later. | |
218 | ||
09ec0d17 NC |
219 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
220 | ||
221 | PR binutils/11676 | |
222 | * m68k-dis.c (print_insn_arg): Prefix float constants with #0e. | |
223 | ||
e01d869a AM |
224 | 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
225 | ||
226 | * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and | |
227 | e500x2. Add PPC_OPCODE_E500 to e500 and e500x2 | |
228 | * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which | |
229 | touch floating point regs and are enabled by COM, PPC or PPCCOM. | |
230 | Treat sync as msync on e500. Treat eieio as mbar 1 on e500. | |
231 | Treat lwsync as msync on e500. | |
232 | ||
1f4e4950 MGD |
233 | 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
234 | ||
235 | * arm-dis.c (thumb-opcodes): Add disassembly for movs. | |
236 | ||
9d82ec38 MGD |
237 | 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
238 | ||
e01d869a | 239 | * arm-dis.c (print_insn_neon): Ensure disassembly of Neon |
9d82ec38 MGD |
240 | constants is the same on 32-bit and 64-bit hosts. |
241 | ||
c3a6ea62 | 242 | 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com> |
d8b24b95 NC |
243 | |
244 | * m68k-dis.c (print_insn_m68k): Emit undefined instructions as | |
245 | .short directives so that they can be reassembled. | |
246 | ||
9db8dccb CM |
247 | 2010-05-26 Catherine Moore <clm@codesourcery.com> |
248 | David Ung <davidu@mips.com> | |
249 | ||
250 | * mips-opc.c: Change membership to I1 for instructions ssnop and | |
251 | ehb. | |
252 | ||
dfc8cf43 L |
253 | 2010-05-26 H.J. Lu <hongjiu.lu@intel.com> |
254 | ||
255 | * i386-dis.c (sib): New. | |
256 | (get_sib): Likewise. | |
257 | (print_insn): Call get_sib. | |
258 | OP_E_memory): Use sib. | |
259 | ||
f79e2745 CM |
260 | 2010-05-26 Catherine Moore <clm@codesoourcery.com> |
261 | ||
262 | * mips-dis.c (mips_arch): Remove INSN_MIPS16. | |
263 | * mips-opc.c (I16): Remove. | |
264 | (mips_builtin_op): Reclassify jalx. | |
265 | ||
51b5d4a8 AM |
266 | 2010-05-19 Alan Modra <amodra@gmail.com> |
267 | ||
268 | * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde, | |
269 | divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx. | |
270 | ||
85d4ac0b AM |
271 | 2010-05-13 Alan Modra <amodra@gmail.com> |
272 | ||
273 | * ppc-opc.c (powerpc_opcodes): Correct wclr encoding. | |
274 | ||
4547cb56 NC |
275 | 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
276 | ||
277 | * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W | |
278 | format. | |
279 | (print_insn_thumb16): Add support for new %W format. | |
280 | ||
6540b386 TG |
281 | 2010-05-07 Tristan Gingold <gingold@adacore.com> |
282 | ||
283 | * Makefile.in: Regenerate with automake 1.11.1. | |
284 | * aclocal.m4: Ditto. | |
285 | ||
3e01a7fd NC |
286 | 2010-05-05 Nick Clifton <nickc@redhat.com> |
287 | ||
288 | * po/es.po: Updated Spanish translation. | |
289 | ||
9c9c98a5 NC |
290 | 2010-04-22 Nick Clifton <nickc@redhat.com> |
291 | ||
292 | * po/opcodes.pot: Updated by the Translation project. | |
293 | * po/vi.po: Updated Vietnamese translation. | |
294 | ||
f07af43e L |
295 | 2010-04-16 H.J. Lu <hongjiu.lu@intel.com> |
296 | ||
297 | * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown | |
298 | bits in opcode. | |
299 | ||
3d540e93 NC |
300 | 2010-04-09 Nick Clifton <nickc@redhat.com> |
301 | ||
302 | * i386-dis.c (print_insn): Remove unused variable op. | |
303 | (OP_sI): Remove unused variable mask. | |
304 | ||
397841b5 AM |
305 | 2010-04-07 Alan Modra <amodra@gmail.com> |
306 | ||
307 | * configure: Regenerate. | |
308 | ||
cee62821 PB |
309 | 2010-04-06 Peter Bergner <bergner@vnet.ibm.com> |
310 | ||
311 | * ppc-opc.c (RBOPT): New define. | |
312 | ("dccci"): Enable for PPCA2. Make operands optional. | |
313 | ("iccci"): Likewise. Do not deprecate for PPC476. | |
314 | ||
accf4463 NC |
315 | 2010-04-02 Masaki Muranaka <monaka@monami-software.com> |
316 | ||
317 | * cr16-opc.c (cr16_instruction): Fix typo in comment. | |
318 | ||
40b36596 JM |
319 | 2010-03-25 Joseph Myers <joseph@codesourcery.com> |
320 | ||
321 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. | |
322 | * Makefile.in: Regenerate. | |
323 | * configure.in (bfd_tic6x_arch): New. | |
324 | * configure: Regenerate. | |
325 | * disassemble.c (ARCH_tic6x): Define if ARCH_all. | |
326 | (disassembler): Handle TI C6X. | |
327 | * tic6x-dis.c: New. | |
328 | ||
1985c81c MF |
329 | 2010-03-24 Mike Frysinger <vapier@gentoo.org> |
330 | ||
331 | * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2. | |
332 | ||
f66187fd JM |
333 | 2010-03-23 Joseph Myers <joseph@codesourcery.com> |
334 | ||
335 | * dis-buf.c (buffer_read_memory): Give error for reading just | |
336 | before the start of memory. | |
337 | ||
ce7d077e SP |
338 | 2010-03-22 Sebastian Pop <sebastian.pop@amd.com> |
339 | Quentin Neill <quentin.neill@amd.com> | |
340 | ||
341 | * i386-dis.c (OP_LWP_I): Removed. | |
342 | (reg_table): Do not use OP_LWP_I, use Iq. | |
343 | (OP_LWPCB_E): Remove use of names16. | |
344 | (OP_LWP_E): Same. | |
345 | * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns | |
346 | should not set the Vex.length bit. | |
347 | * i386-tbl.h: Regenerated. | |
348 | ||
63d0fa4e AM |
349 | 2010-02-25 Edmar Wienskoski <edmar@freescale.com> |
350 | ||
351 | * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64". | |
352 | ||
c060226a NC |
353 | 2010-02-24 Nick Clifton <nickc@redhat.com> |
354 | ||
355 | PR binutils/6773 | |
356 | * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with | |
357 | <prefix>asx. Replace <prefix>subaddx with <prefix>sax. | |
358 | (thumb32_opcodes): Likewise. | |
359 | ||
ab7875de NC |
360 | 2010-02-15 Nick Clifton <nickc@redhat.com> |
361 | ||
362 | * po/vi.po: Updated Vietnamese translation. | |
363 | ||
fee1d3e8 DE |
364 | 2010-02-12 Doug Evans <dje@sebabeach.org> |
365 | ||
366 | * lm32-opinst.c: Regenerate. | |
367 | ||
37ec9240 DE |
368 | 2010-02-11 Doug Evans <dje@sebabeach.org> |
369 | ||
9468ae89 DE |
370 | * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL. |
371 | (print_address): Delete CGEN_PRINT_ADDRESS. | |
372 | * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, | |
373 | * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, | |
374 | * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, | |
375 | * xc16x-dis.c, * xstormy16-dis.c: Regenerate. | |
376 | ||
37ec9240 DE |
377 | * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, |
378 | * frv-desc.c, * frv-desc.h, * frv-opc.c, | |
379 | * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, | |
380 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, | |
381 | * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c, | |
382 | * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, | |
383 | * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c, | |
384 | * mep-desc.c, * mep-desc.h, * mep-opc.c, | |
385 | * mt-desc.c, * mt-desc.h, * mt-opc.c, | |
386 | * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c, | |
387 | * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c, | |
388 | * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate. | |
389 | ||
c75ef631 L |
390 | 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> |
391 | ||
392 | * i386-dis.c: Update copyright. | |
393 | * i386-gen.c: Likewise. | |
394 | * i386-opc.h: Likewise. | |
395 | * i386-opc.tbl: Likewise. | |
396 | ||
a683cc34 SP |
397 | 2010-02-10 Quentin Neill <quentin.neill@amd.com> |
398 | Sebastian Pop <sebastian.pop@amd.com> | |
399 | ||
400 | * i386-dis.c (OP_EX_VexImmW): Reintroduced | |
401 | function to handle 5th imm8 operand. | |
402 | (PREFIX_VEX_3A48): Added. | |
403 | (PREFIX_VEX_3A49): Added. | |
404 | (VEX_W_3A48_P_2): Added. | |
405 | (VEX_W_3A49_P_2): Added. | |
406 | (prefix table): Added entries for PREFIX_VEX_3A48 | |
407 | and PREFIX_VEX_3A49. | |
408 | (vex table): Added entries for VEX_W_3A48_P_2 and | |
409 | and VEX_W_3A49_P_2. | |
410 | * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4 | |
411 | for Vec_Imm4 operands. | |
412 | * i386-opc.h (enum): Added Vec_Imm4. | |
413 | (i386_operand_type): Added vec_imm4. | |
414 | * i386-opc.tbl: Add entries for vpermilp[ds]. | |
415 | * i386-init.h: Regenerated. | |
416 | * i386-tbl.h: Regenerated. | |
417 | ||
cdc51b07 RS |
418 | 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com> |
419 | ||
420 | * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6" | |
421 | and "pwr7". Move "a2" into alphabetical order. | |
422 | ||
ce3d2015 AM |
423 | 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
424 | ||
425 | * ppc-dis.c (ppc_opts): Add titan entry. | |
426 | * ppc-opc.c (TITAN, MULHW): Define. | |
427 | (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). | |
428 | ||
68339fdf SP |
429 | 2010-02-03 Quentin Neill <quentin.neill@amd.com> |
430 | ||
431 | * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS | |
432 | to CPU_BDVER1_FLAGS | |
433 | * i386-init.h: Regenerated. | |
434 | ||
f3d55a94 AG |
435 | 2010-02-03 Anthony Green <green@moxielogic.com> |
436 | ||
437 | * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to | |
438 | 0x0f, and make 0x00 an illegal instruction. | |
439 | ||
b0e28b39 DJ |
440 | 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com> |
441 | ||
442 | * opcodes/arm-dis.c (struct arm_private_data): New. | |
443 | (print_insn_coprocessor, print_insn_arm): Update to use struct | |
444 | arm_private_data. | |
445 | (is_mapping_symbol, get_map_sym_type): New functions. | |
446 | (get_sym_code_type): Check the symbol's section. Do not check | |
447 | mapping symbols. | |
448 | (print_insn): Default to disassembling ARM mode code. Check | |
449 | for mapping symbols separately from other symbols. Use | |
450 | struct arm_private_data. | |
451 | ||
1c480963 L |
452 | 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> |
453 | ||
454 | * i386-dis.c (EXVexWdqScalar): New. | |
455 | (vex_scalar_w_dq_mode): Likewise. | |
456 | (prefix_table): Update entries for PREFIX_VEX_3899, | |
457 | PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F, | |
458 | PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD, | |
459 | PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB, | |
460 | PREFIX_VEX_38BD and PREFIX_VEX_38BF. | |
461 | (intel_operand_size): Handle vex_scalar_w_dq_mode. | |
462 | (OP_EX): Likewise. | |
463 | ||
539f890d L |
464 | 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> |
465 | ||
466 | * i386-dis.c (XMScalar): New. | |
467 | (EXdScalar): Likewise. | |
468 | (EXqScalar): Likewise. | |
469 | (EXqScalarS): Likewise. | |
470 | (VexScalar): Likewise. | |
471 | (EXdVexScalarS): Likewise. | |
472 | (EXqVexScalarS): Likewise. | |
473 | (XMVexScalar): Likewise. | |
474 | (scalar_mode): Likewise. | |
475 | (d_scalar_mode): Likewise. | |
476 | (d_scalar_swap_mode): Likewise. | |
477 | (q_scalar_mode): Likewise. | |
478 | (q_scalar_swap_mode): Likewise. | |
479 | (vex_scalar_mode): Likewise. | |
480 | (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, | |
481 | VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, | |
482 | VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, | |
483 | VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, | |
484 | VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, | |
485 | VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, | |
486 | VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, | |
487 | VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, | |
488 | VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, | |
489 | VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. | |
490 | (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, | |
491 | VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, | |
492 | VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, | |
493 | VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, | |
494 | VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, | |
495 | VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, | |
496 | VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, | |
497 | VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, | |
498 | VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. | |
499 | (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, | |
500 | q_scalar_mode, q_scalar_swap_mode. | |
501 | (OP_XMM): Handle scalar_mode. | |
502 | (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode | |
503 | and q_scalar_swap_mode. | |
504 | (OP_VEX): Handle vex_scalar_mode. | |
505 | ||
208b4d78 L |
506 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
507 | ||
508 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
509 | ||
448b213a L |
510 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
511 | ||
512 | * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }. | |
513 | ||
47cf8fa0 L |
514 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
515 | ||
516 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
517 | ||
592d1631 L |
518 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
519 | ||
520 | * i386-dis.c (Bad_Opcode): New. | |
521 | (bad_opcode): Likewise. | |
522 | (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }. | |
523 | (dis386_twobyte): Likewise. | |
524 | (reg_table): Likewise. | |
525 | (prefix_table): Likewise. | |
526 | (x86_64_table): Likewise. | |
527 | (vex_len_table): Likewise. | |
528 | (vex_w_table): Likewise. | |
529 | (mod_table): Likewise. | |
530 | (rm_table): Likewise. | |
531 | (float_reg): Likewise. | |
532 | (reg_table): Remove trailing "(bad)" entries. | |
533 | (prefix_table): Likewise. | |
534 | (x86_64_table): Likewise. | |
535 | (vex_len_table): Likewise. | |
536 | (vex_w_table): Likewise. | |
537 | (mod_table): Likewise. | |
538 | (rm_table): Likewise. | |
539 | (get_valid_dis386): Handle bytemode 0. | |
540 | ||
712366da L |
541 | 2010-01-23 H.J. Lu <hongjiu.lu@intel.com> |
542 | ||
543 | * i386-opc.h (VEXScalar): New. | |
544 | ||
545 | * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar | |
546 | instructions. | |
547 | * i386-tbl.h: Regenerated. | |
548 | ||
706e8205 | 549 | 2010-01-21 H.J. Lu <hongjiu.lu@intel.com> |
73bb6729 L |
550 | |
551 | * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor. | |
552 | ||
553 | * i386-opc.tbl: Add xsave64 and xrstor64. | |
554 | * i386-tbl.h: Regenerated. | |
555 | ||
99ea83aa NC |
556 | 2010-01-20 Nick Clifton <nickc@redhat.com> |
557 | ||
558 | PR 11170 | |
559 | * arm-dis.c (print_arm_address): Do not ignore negative bit in PC | |
560 | based post-indexed addressing. | |
561 | ||
a6461c02 SP |
562 | 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> |
563 | ||
564 | * i386-opc.tbl: Support all the possible aliases for VPCOM* insns. | |
565 | * i386-tbl.h: Regenerated. | |
566 | ||
a2a7d12c L |
567 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
568 | ||
569 | * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in | |
570 | comments. | |
571 | ||
b9733481 L |
572 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
573 | ||
574 | * i386-dis.c (names_mm): New. | |
575 | (intel_names_mm): Likewise. | |
576 | (att_names_mm): Likewise. | |
577 | (names_xmm): Likewise. | |
578 | (intel_names_xmm): Likewise. | |
579 | (att_names_xmm): Likewise. | |
580 | (names_ymm): Likewise. | |
581 | (intel_names_ymm): Likewise. | |
582 | (att_names_ymm): Likewise. | |
583 | (print_insn): Set names_mm, names_xmm and names_ymm. | |
584 | (OP_MMX): Use names_mm, names_xmm and names_ymm. | |
585 | (OP_XMM): Likewise. | |
586 | (OP_EM): Likewise. | |
587 | (OP_EMC): Likewise. | |
588 | (OP_MXC): Likewise. | |
589 | (OP_EX): Likewise. | |
590 | (XMM_Fixup): Likewise. | |
591 | (OP_VEX): Likewise. | |
592 | (OP_EX_VexReg): Likewise. | |
593 | (OP_Vex_2src): Likewise. | |
594 | (OP_Vex_2src_1): Likewise. | |
595 | (OP_Vex_2src_2): Likewise. | |
596 | (OP_REG_VexI4): Likewise. | |
597 | ||
5e6718e4 L |
598 | 2010-01-13 H.J. Lu <hongjiu.lu@intel.com> |
599 | ||
600 | * i386-dis.c (print_insn): Update comments. | |
601 | ||
d869730d L |
602 | 2010-01-12 H.J. Lu <hongjiu.lu@intel.com> |
603 | ||
604 | * i386-dis.c (rex_original): Removed. | |
605 | (ckprefix): Remove rex_original. | |
606 | (print_insn): Update comments. | |
607 | ||
3725885a RW |
608 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
609 | ||
610 | * Makefile.in: Regenerate. | |
611 | * configure: Regenerate. | |
612 | ||
b7cd1872 DE |
613 | 2010-01-07 Doug Evans <dje@sebabeach.org> |
614 | ||
615 | * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup. | |
616 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
617 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
618 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
619 | * xstormy16-ibld.c: Regenerate. | |
620 | ||
69dd9865 SP |
621 | 2010-01-06 Quentin Neill <quentin.neill@amd.com> |
622 | ||
623 | * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. | |
624 | * i386-init.h: Regenerated. | |
625 | ||
e3e535bc NC |
626 | 2010-01-06 Daniel Gutson <dgutson@codesourcery.com> |
627 | ||
628 | * arm-dis.c (print_insn): Fixed search for next symbol and data | |
629 | dumping condition, and the initial mapping symbol state. | |
630 | ||
fe8afbc4 DE |
631 | 2010-01-05 Doug Evans <dje@sebabeach.org> |
632 | ||
633 | * cgen-ibld.in: #include "cgen/basic-modes.h". | |
634 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
635 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
636 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
637 | * xstormy16-ibld.c: Regenerate. | |
638 | ||
2edcd244 NC |
639 | 2010-01-04 Nick Clifton <nickc@redhat.com> |
640 | ||
641 | PR 11123 | |
642 | * arm-dis.c (print_insn_coprocessor): Initialise value. | |
643 | ||
0dc93057 AM |
644 | 2010-01-04 Edmar Wienskoski <edmar@freescale.com> |
645 | ||
646 | * ppc-dis.c (ppc_opts): Add entry for "e500mc64". | |
647 | ||
05994f45 DE |
648 | 2010-01-02 Doug Evans <dje@sebabeach.org> |
649 | ||
650 | * cgen-asm.in: Update copyright year. | |
651 | * cgen-dis.in: Update copyright year. | |
652 | * cgen-ibld.in: Update copyright year. | |
653 | * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, | |
654 | * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, | |
655 | * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, | |
656 | * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, | |
657 | * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, | |
658 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, | |
659 | * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, | |
660 | * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, | |
661 | * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, | |
662 | * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, | |
663 | * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, | |
664 | * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, | |
665 | * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, | |
666 | * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, | |
667 | * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, | |
668 | * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, | |
669 | * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, | |
670 | * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, | |
671 | * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, | |
672 | * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, | |
673 | * xstormy16-opc.c, * xstormy16-opc.h: Regenerate. | |
2426c15f | 674 | |
43ecc30f | 675 | For older changes see ChangeLog-2009 |
252b5132 RH |
676 | \f |
677 | Local Variables: | |
2f6d2f85 NC |
678 | mode: change-log |
679 | left-margin: 8 | |
680 | fill-column: 74 | |
252b5132 RH |
681 | version-control: never |
682 | End: |