Commit | Line | Data |
---|---|---|
ff3f9d5b DM |
1 | 2006-02-24 David S. Miller <davem@sunset.davemloft.net> |
2 | ||
3 | * sparc-dis.c (v9_priv_reg_names): Add "gl" entry. | |
4 | (v9_hpriv_reg_names): New table. | |
5 | (print_insn_sparc): Allow values up to 16 for '?' and '!'. | |
6 | New cases '$' and '%' for read/write hyperprivileged register. | |
7 | * sparc-opc.c (sparc_opcodes): Add new entries for UA2005 | |
8 | window handling and rdhpr/wrhpr instructions. | |
9 | ||
6772dd07 DD |
10 | 2006-02-24 DJ Delorie <dj@redhat.com> |
11 | ||
12 | * m32c-desc.c: Regenerate with linker relaxation attributes. | |
13 | * m32c-desc.h: Likewise. | |
14 | * m32c-dis.c: Likewise. | |
15 | * m32c-opc.c: Likewise. | |
16 | ||
62b3e311 PB |
17 | 2006-02-24 Paul Brook <paul@codesourcery.com> |
18 | ||
19 | * arm-dis.c (arm_opcodes): Add V7 instructions. | |
20 | (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. | |
21 | (print_arm_address): New function. | |
22 | (print_insn_arm): Use it. Add 'P' and 'U' cases. | |
23 | (psr_name): New function. | |
24 | (print_insn_thumb32): Add 'U', 'C' and 'D' cases. | |
25 | ||
59cf82fe L |
26 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
27 | ||
28 | * ia64-opc-i.c (bXc): New. | |
29 | (mXc): Likewise. | |
30 | (OpX2TaTbYaXcC): Likewise. | |
31 | (TF). Likewise. | |
32 | (TFCM). Likewise. | |
33 | (ia64_opcodes_i): Add instructions for tf. | |
34 | ||
35 | * ia64-opc.h (IMMU5b): New. | |
36 | ||
37 | * ia64-asmtab.c: Regenerated. | |
38 | ||
19a7219f L |
39 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
40 | ||
41 | * ia64-gen.c: Update copyright years. | |
42 | * ia64-opc-b.c: Likewise. | |
43 | ||
7f3dfb9c L |
44 | 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> |
45 | ||
46 | * ia64-gen.c (lookup_regindex): Handle ".vm". | |
47 | (print_dependency_table): Handle '\"'. | |
48 | ||
49 | * ia64-ic.tbl: Updated from SDM 2.2. | |
50 | * ia64-raw.tbl: Likewise. | |
51 | * ia64-waw.tbl: Likewise. | |
52 | * ia64-asmtab.c: Regenerated. | |
53 | ||
54 | * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1. | |
55 | ||
d70c5fc7 NC |
56 | 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> |
57 | Anil Paranjape <anilp1@kpitcummins.com> | |
58 | Shilin Shakti <shilins@kpitcummins.com> | |
59 | ||
60 | * xc16x-desc.h: New file | |
61 | * xc16x-desc.c: New file | |
62 | * xc16x-opc.h: New file | |
63 | * xc16x-opc.c: New file | |
64 | * xc16x-ibld.c: New file | |
65 | * xc16x-asm.c: New file | |
66 | * xc16x-dis.c: New file | |
67 | * Makefile.am: Entries for xc16x | |
68 | * Makefile.in: Regenerate | |
69 | * cofigure.in: Add xc16x target information. | |
70 | * configure: Regenerate. | |
71 | * disassemble.c: Add xc16x target information. | |
72 | ||
a1cfb73e L |
73 | 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> |
74 | ||
75 | * i386-dis.c (dis386_twobyte): Use "movZ" for debug register | |
76 | moves. | |
77 | ||
6dd5059a L |
78 | 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> |
79 | ||
80 | * i386-dis.c ('Z'): Add a new macro. | |
81 | (dis386_twobyte): Use "movZ" for control register moves. | |
82 | ||
8536c657 NC |
83 | 2006-02-10 Nick Clifton <nickc@redhat.com> |
84 | ||
85 | * iq2000-asm.c: Regenerate. | |
86 | ||
266abb8f NS |
87 | 2006-02-07 Nathan Sidwell <nathan@codesourcery.com> |
88 | ||
89 | * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features. | |
90 | ||
f1a64f49 DU |
91 | 2006-01-26 David Ung <davidu@mips.com> |
92 | ||
93 | * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx, | |
94 | ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d, | |
95 | floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d, | |
96 | nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d, | |
97 | rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s. | |
98 | ||
9e919b5f AM |
99 | 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org> |
100 | ||
101 | * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d, | |
102 | ld_d_r, pref_xd_cb): Use signed char to hold data to be | |
103 | disassembled. | |
104 | * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes | |
105 | buffer overflows when disassembling instructions like | |
106 | ld (ix+123),0x23 | |
107 | * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed | |
108 | operand, if the offset is negative. | |
109 | ||
c9021189 AM |
110 | 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org> |
111 | ||
112 | * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use | |
113 | unsigned char to hold data to be disassembled. | |
114 | ||
d99b6465 AS |
115 | 2006-01-17 Andreas Schwab <schwab@suse.de> |
116 | ||
117 | PR binutils/1486 | |
118 | * disassemble.c (disassemble_init_for_target): Set | |
119 | disassembler_needs_relocs for bfd_arch_arm. | |
120 | ||
c2fe9327 PB |
121 | 2006-01-16 Paul Brook <paul@codesourcery.com> |
122 | ||
e88d958a | 123 | * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss, |
c2fe9327 PB |
124 | f?add?, and f?sub? instructions. |
125 | ||
32fba81d NC |
126 | 2006-01-16 Nick Clifton <nickc@redhat.com> |
127 | ||
128 | * po/zh_CN.po: New Chinese (simplified) translation. | |
129 | * configure.in (ALL_LINGUAS): Add "zh_CH". | |
130 | * configure: Regenerate. | |
131 | ||
1b3a26b5 PB |
132 | 2006-01-05 Paul Brook <paul@codesourcery.com> |
133 | ||
134 | * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry. | |
135 | ||
db313fa6 DD |
136 | 2006-01-06 DJ Delorie <dj@redhat.com> |
137 | ||
138 | * m32c-desc.c: Regenerate. | |
139 | * m32c-opc.c: Regenerate. | |
140 | * m32c-opc.h: Regenerate. | |
141 | ||
54d46aca DD |
142 | 2006-01-03 DJ Delorie <dj@redhat.com> |
143 | ||
144 | * cgen-ibld.in (extract_normal): Avoid memory range errors. | |
145 | * m32c-ibld.c: Regenerated. | |
146 | ||
e88d958a | 147 | For older changes see ChangeLog-2005 |
252b5132 RH |
148 | \f |
149 | Local Variables: | |
2f6d2f85 NC |
150 | mode: change-log |
151 | left-margin: 8 | |
152 | fill-column: 74 | |
252b5132 RH |
153 | version-control: never |
154 | End: |