[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
2da2eaf4 AV	1	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	2
	3	PR 25376
	4	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	5	(neon_opcodes): Likewise.
	6	(select_arm_features): Make sure we enable MVE bits when selecting
	7	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	8	any architecture.
	9
d0849eed JB	10	2020-01-16 Jan Beulich <jbeulich@suse.com>
	11
	12	* i386-opc.tbl: Drop stale comment from XOP section.
	13
9cf70a44 JB	14	2020-01-16 Jan Beulich <jbeulich@suse.com>
	15
	16	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	17	(extractps): Add VexWIG to SSE2AVX forms.
	18	* i386-tbl.h: Re-generate.
	19
4814632e JB	20	2020-01-16 Jan Beulich <jbeulich@suse.com>
	21
	22	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	23	Size64 from and use VexW1 on SSE2AVX forms.
	24	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	25	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	26	* i386-tbl.h: Re-generate.
	27
aad09917 AM	28	2020-01-15 Alan Modra <amodra@gmail.com>
	29
	30	* tic4x-dis.c (tic4x_version): Make unsigned long.
	31	(optab, optab_special, registernames): New file scope vars.
	32	(tic4x_print_register): Set up registernames rather than
	33	malloc'd registertable.
	34	(tic4x_disassemble): Delete optable and optable_special. Use
	35	optab and optab_special instead. Throw away old optab,
	36	optab_special and registernames when info->mach changes.
	37
7a6bf3be SB	38	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	39
	40	PR 25377
	41	* z80-dis.c (suffix): Use .db instruction to generate double
	42	prefix.
	43
ca1eaac0 AM	44	2020-01-14 Alan Modra <amodra@gmail.com>
	45
	46	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	47	values to unsigned before shifting.
	48
1d67fe3b TT	49	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	50
	51	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	52	flow instructions.
	53	(print_insn_thumb16, print_insn_thumb32): Likewise.
	54	(print_insn): Initialize the insn info.
	55	* i386-dis.c (print_insn): Initialize the insn info fields, and
	56	detect jumps.
	57
5e4f7e05 CZ	58	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	59
	60	* arc-opc.c (C_NE): Make it required.
	61
b9fe6b8a CZ	62	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	63
	64	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	65	reserved register name.
	66
90dee485 AM	67	2020-01-13 Alan Modra <amodra@gmail.com>
	68
	69	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	70	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	71
febda64f AM	72	2020-01-13 Alan Modra <amodra@gmail.com>
	73
	74	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	75	result of wasm_read_leb128 in a uint64_t and check that bits
	76	are not lost when copying to other locals. Use uint32_t for
	77	most locals. Use PRId64 when printing int64_t.
	78
df08b588 AM	79	2020-01-13 Alan Modra <amodra@gmail.com>
	80
	81	* score-dis.c: Formatting.
	82	* score7-dis.c: Formatting.
	83
b2c759ce AM	84	2020-01-13 Alan Modra <amodra@gmail.com>
	85
	86	* score-dis.c (print_insn_score48): Use unsigned variables for
	87	unsigned values. Don't left shift negative values.
	88	(print_insn_score32): Likewise.
	89	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	90
5496abe1 AM	91	2020-01-13 Alan Modra <amodra@gmail.com>
	92
	93	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	94
202e762b AM	95	2020-01-13 Alan Modra <amodra@gmail.com>
	96
	97	* fr30-ibld.c: Regenerate.
	98
7ef412cf AM	99	2020-01-13 Alan Modra <amodra@gmail.com>
	100
	101	* xgate-dis.c (print_insn): Don't left shift signed value.
	102	(ripBits): Formatting, use 1u.
	103
7f578b95 AM	104	2020-01-10 Alan Modra <amodra@gmail.com>
	105
	106	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	107	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	108
441af85b AM	109	2020-01-10 Alan Modra <amodra@gmail.com>
	110
	111	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	112	and XRREG value earlier to avoid a shift with negative exponent.
	113	* m10200-dis.c (disassemble): Similarly.
	114
bce58db4 NC	115	2020-01-09 Nick Clifton <nickc@redhat.com>
	116
	117	PR 25224
	118	* z80-dis.c (ld_ii_ii): Use correct cast.
	119
40c75bc8 SB	120	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	121
	122	PR 25224
	123	* z80-dis.c (ld_ii_ii): Use character constant when checking
	124	opcode byte value.
	125
d835a58b JB	126	2020-01-09 Jan Beulich <jbeulich@suse.com>
	127
	128	* i386-dis.c (SEP_Fixup): New.
	129	(SEP): Define.
	130	(dis386_twobyte): Use it for sysenter/sysexit.
	131	(enum x86_64_isa): Change amd64 enumerator to value 1.
	132	(OP_J): Compare isa64 against intel64 instead of amd64.
	133	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	134	forms.
	135	* i386-tbl.h: Re-generate.
	136
030a2e78 AM	137	2020-01-08 Alan Modra <amodra@gmail.com>
	138
	139	* z8k-dis.c: Include libiberty.h
	140	(instr_data_s): Make max_fetched unsigned.
	141	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	142	Don't exceed byte_info bounds.
	143	(output_instr): Make num_bytes unsigned.
	144	(unpack_instr): Likewise for nibl_count and loop.
	145	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	146	idx unsigned.
	147	* z8k-opc.h: Regenerate.
	148
bb82aefe SV	149	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	150
	151	* arc-tbl.h (llock): Use 'LLOCK' as class.
	152	(llockd): Likewise.
	153	(scond): Use 'SCOND' as class.
	154	(scondd): Likewise.
	155	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	156	(scondd): Likewise.
	157
cc6aa1a6 AM	158	2020-01-06 Alan Modra <amodra@gmail.com>
	159
	160	* m32c-ibld.c: Regenerate.
	161
660e62b1 AM	162	2020-01-06 Alan Modra <amodra@gmail.com>
	163
	164	PR 25344
	165	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	166	Peek at next byte to prevent recursion on repeated prefix bytes.
	167	Ensure uninitialised "mybuf" is not accessed.
	168	(print_insn_z80): Don't zero n_fetch and n_used here,..
	169	(print_insn_z80_buf): ..do it here instead.
	170
c9ae58fe AM	171	2020-01-04 Alan Modra <amodra@gmail.com>
	172
	173	* m32r-ibld.c: Regenerate.
	174
5f57d4ec AM	175	2020-01-04 Alan Modra <amodra@gmail.com>
	176
	177	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	178
2c5c1196 AM	179	2020-01-04 Alan Modra <amodra@gmail.com>
	180
	181	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	182
2e98c6c5 AM	183	2020-01-04 Alan Modra <amodra@gmail.com>
	184
	185	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	186
567dfba2 JB	187	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	188
5437a02a JB	189	* aarch64-tbl.h (aarch64_opcode_table): Use
	190	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	191
	192	2020-01-03 Jan Beulich <jbeulich@suse.com>
	193
	194	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	195	forms of SUDOT and USDOT.
567dfba2 JB	196
8c45011a JB	197	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	198
5437a02a	199	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	200	uzip{1,2}.
	201	* opcodes/aarch64-dis-2.c: Re-generate.
	202
f4950f76 JB	203	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	204
5437a02a	205	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	206	FMMLA encoding.
	207	* opcodes/aarch64-dis-2.c: Re-generate.
	208
6655dba2 SB	209	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	210
	211	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	212
b14ce8bf AM	213	2020-01-01 Alan Modra <amodra@gmail.com>
	214
	215	Update year range in copyright notice of all files.
	216
0b114740	217	For older changes see ChangeLog-2019
3499769a	218	\f
0b114740	219	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	220
	221	Copying and distribution of this file, with or without modification,
	222	are permitted in any medium without royalty provided the copyright
	223	notice and this notice are preserved.
	224
	225	Local Variables:
	226	mode: change-log
	227	left-margin: 8
	228	fill-column: 74
	229	version-control: never
	230	End: