When separating CIE out from FDE, treat a DW_CFA_remember_state as we do a
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
48c9f030
NC
12004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
2
3 * crx-opc.c (crx_instruction): Support Co-processor insns.
4 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
5 (getregliststring): Change function to use the above enum.
6 (print_arg): Handle CO-Processor insns.
7 (crx_cinvs): Add 'b' option to invalidate the branch-target
8 cache.
9
12c64a4e
AH
102004-10-06 Aldy Hernandez <aldyh@redhat.com>
11
12 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
13 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
14 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
15 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
16 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
17
14127cc4
NC
182004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
19
20 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
21 rather than add it.
22
0dd132b6
NC
232004-09-30 Paul Brook <paul@codesourcery.com>
24
25 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
26 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
27
3f85e526
L
282004-09-17 H.J. Lu <hongjiu.lu@intel.com>
29
30 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
31 (CONFIG_STATUS_DEPENDENCIES): New.
32 (Makefile): Removed.
33 (config.status): Likewise.
34 * Makefile.in: Regenerated.
35
8ae85421
AM
362004-09-17 Alan Modra <amodra@bigpond.net.au>
37
38 * Makefile.am: Run "make dep-am".
39 * Makefile.in: Regenerate.
40 * aclocal.m4: Regenerate.
41 * configure: Regenerate.
42 * po/POTFILES.in: Regenerate.
43 * po/opcodes.pot: Regenerate.
44
24443139
AS
452004-09-11 Andreas Schwab <schwab@suse.de>
46
47 * configure: Rebuild.
48
2a309db0
AM
492004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
50
51 * ppc-opc.c (L): Make this field not optional.
52
42851540
NC
532004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
54
55 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
56 Fix parameter to 'm[t|f]csr' insns.
57
979273e3
NN
582004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
59
60 * configure.in: Autoupdate to autoconf 2.59.
61 * aclocal.m4: Rebuild with aclocal 1.4p6.
62 * configure: Rebuild with autoconf 2.59.
63 * Makefile.in: Rebuild with automake 1.4p6 (picking up
64 bfd changes for autoconf 2.59 on the way).
65 * config.in: Rebuild with autoheader 2.59.
66
ac28a1cb
RS
672004-08-27 Richard Sandiford <rsandifo@redhat.com>
68
69 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
70
30d1c836
ML
712004-07-30 Michal Ludvig <mludvig@suse.cz>
72
73 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
74 (GRPPADLCK2): New define.
75 (twobyte_has_modrm): True for 0xA6.
76 (grps): GRPPADLCK2 for opcode 0xA6.
77
0b0ac059
AO
782004-07-29 Alexandre Oliva <aoliva@redhat.com>
79
80 Introduce SH2a support.
81 * sh-opc.h (arch_sh2a_base): Renumber.
82 (arch_sh2a_nofpu_base): Remove.
83 (arch_sh_base_mask): Adjust.
84 (arch_opann_mask): New.
85 (arch_sh2a, arch_sh2a_nofpu): Adjust.
86 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
87 (sh_table): Adjust whitespace.
88 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
89 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
90 instruction list throughout.
91 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
92 of arch_sh2a in instruction list throughout.
93 (arch_sh2e_up): Accomodate above changes.
94 (arch_sh2_up): Ditto.
95 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
96 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
97 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
98 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
99 * sh-opc.h (arch_sh2a_nofpu): New.
100 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
101 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
102 instruction.
103 2004-01-20 DJ Delorie <dj@redhat.com>
104 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
105 2003-12-29 DJ Delorie <dj@redhat.com>
106 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
107 sh_opcode_info, sh_table): Add sh2a support.
108 (arch_op32): New, to tag 32-bit opcodes.
109 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
110 2003-12-02 Michael Snyder <msnyder@redhat.com>
111 * sh-opc.h (arch_sh2a): Add.
112 * sh-dis.c (arch_sh2a): Handle.
113 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
114
670ec21d
NC
1152004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
116
117 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
118
ed049af3
NC
1192004-07-22 Nick Clifton <nickc@redhat.com>
120
121 PR/280
122 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
123 insns - this is done by objdump itself.
124 * h8500-dis.c (print_insn_h8500): Likewise.
125
20f0a1fc
NC
1262004-07-21 Jan Beulich <jbeulich@novell.com>
127
128 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
129 regardless of address size prefix in effect.
130 (ptr_reg): Size or address registers does not depend on rex64, but
131 on the presence of an address size override.
132 (OP_MMX): Use rex.x only for xmm registers.
133 (OP_EM): Use rex.z only for xmm registers.
134
6f14957b
MR
1352004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
136
137 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
138 move/branch operations to the bottom so that VR5400 multimedia
139 instructions take precedence in disassembly.
140
1586d91e
MR
1412004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
142
143 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
144 ISA-specific "break" encoding.
145
982de27a
NC
1462004-07-13 Elvis Chiang <elvisfb@gmail.com>
147
148 * arm-opc.h: Fix typo in comment.
149
4300ab10
AS
1502004-07-11 Andreas Schwab <schwab@suse.de>
151
152 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
153
8577e690
AS
1542004-07-09 Andreas Schwab <schwab@suse.de>
155
156 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
157
1fe1f39c
NC
1582004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
159
160 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
161 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
162 (crx-dis.lo): New target.
163 (crx-opc.lo): Likewise.
164 * Makefile.in: Regenerate.
165 * configure.in: Handle bfd_crx_arch.
166 * configure: Regenerate.
167 * crx-dis.c: New file.
168 * crx-opc.c: New file.
169 * disassemble.c (ARCH_crx): Define.
170 (disassembler): Handle ARCH_crx.
171
7a33b495
JW
1722004-06-29 James E Wilson <wilson@specifixinc.com>
173
174 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
175 * ia64-asmtab.c: Regnerate.
176
98e69875
AM
1772004-06-28 Alan Modra <amodra@bigpond.net.au>
178
179 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
180 (extract_fxm): Don't test dialect.
181 (XFXFXM_MASK): Include the power4 bit.
182 (XFXM): Add p4 param.
183 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
184
a53b85e2
AO
1852004-06-27 Alexandre Oliva <aoliva@redhat.com>
186
187 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
188 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
189
d0618d1c
AM
1902004-06-26 Alan Modra <amodra@bigpond.net.au>
191
192 * ppc-opc.c (BH, XLBH_MASK): Define.
193 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
194
1d9f512f
AM
1952004-06-24 Alan Modra <amodra@bigpond.net.au>
196
197 * i386-dis.c (x_mode): Comment.
198 (two_source_ops): File scope.
199 (float_mem): Correct fisttpll and fistpll.
200 (float_mem_mode): New table.
201 (dofloat): Use it.
202 (OP_E): Correct intel mode PTR output.
203 (ptr_reg): Use open_char and close_char.
204 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
205 operands. Set two_source_ops.
206
52886d70
AM
2072004-06-15 Alan Modra <amodra@bigpond.net.au>
208
209 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
210 instead of _raw_size.
211
bad9ceea
JJ
2122004-06-08 Jakub Jelinek <jakub@redhat.com>
213
214 * ia64-gen.c (in_iclass): Handle more postinc st
215 and ld variants.
216 * ia64-asmtab.c: Rebuilt.
217
0451f5df
MS
2182004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
219
220 * s390-opc.txt: Correct architecture mask for some opcodes.
221 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
222 in the esa mode as well.
223
f6f9408f
JR
2242004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
225
226 * sh-dis.c (target_arch): Make unsigned.
227 (print_insn_sh): Replace (most of) switch with a call to
228 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
229 * sh-opc.h: Redefine architecture flags values.
230 Add sh3-nommu architecture.
231 Reorganise <arch>_up macros so they make more visual sense.
232 (SH_MERGE_ARCH_SET): Define new macro.
233 (SH_VALID_BASE_ARCH_SET): Likewise.
234 (SH_VALID_MMU_ARCH_SET): Likewise.
235 (SH_VALID_CO_ARCH_SET): Likewise.
236 (SH_VALID_ARCH_SET): Likewise.
237 (SH_MERGE_ARCH_SET_VALID): Likewise.
238 (SH_ARCH_SET_HAS_FPU): Likewise.
239 (SH_ARCH_SET_HAS_DSP): Likewise.
240 (SH_ARCH_UNKNOWN_ARCH): Likewise.
241 (sh_get_arch_from_bfd_mach): Add prototype.
242 (sh_get_arch_up_from_bfd_mach): Likewise.
243 (sh_get_bfd_mach_from_arch_set): Likewise.
244 (sh_merge_bfd_arc): Likewise.
245
be8c092b
NC
2462004-05-24 Peter Barada <peter@the-baradas.com>
247
248 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
249 into new match_insn_m68k function. Loop over canidate
250 matches and select first that completely matches.
251 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
252 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
253 to verify addressing for MAC/EMAC.
254 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
255 reigster halves since 'fpu' and 'spl' look misleading.
256 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
257 * m68k-opc.c: Rearragne mac/emac cases to use longest for
258 first, tighten up match masks.
259 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
260 'size' from special case code in print_insn_m68k to
261 determine decode size of insns.
262
a30e9cc4
AM
2632004-05-19 Alan Modra <amodra@bigpond.net.au>
264
265 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
266 well as when -mpower4.
267
9598fbe5
NC
2682004-05-13 Nick Clifton <nickc@redhat.com>
269
270 * po/fr.po: Updated French translation.
271
6b6e92f4
NC
2722004-05-05 Peter Barada <peter@the-baradas.com>
273
274 * m68k-dis.c(print_insn_m68k): Add new chips, use core
275 variants in arch_mask. Only set m68881/68851 for 68k chips.
276 * m68k-op.c: Switch from ColdFire chips to core variants.
277
a404d431
AM
2782004-05-05 Alan Modra <amodra@bigpond.net.au>
279
a30e9cc4 280 PR 147.
a404d431
AM
281 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
282
f3806e43
BE
2832004-04-29 Ben Elliston <bje@au.ibm.com>
284
520ceea4
BE
285 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
286 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 287
1f1799d5
KK
2882004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
289
290 * sh-dis.c (print_insn_sh): Print the value in constant pool
291 as a symbol if it looks like a symbol.
292
fd99574b
NC
2932004-04-22 Peter Barada <peter@the-baradas.com>
294
295 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
296 appropriate ColdFire architectures.
297 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
298 mask addressing.
299 Add EMAC instructions, fix MAC instructions. Remove
300 macmw/macml/msacmw/msacml instructions since mask addressing now
301 supported.
302
b4781d44
JJ
3032004-04-20 Jakub Jelinek <jakub@redhat.com>
304
305 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
306 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
307 suffix. Use fmov*x macros, create all 3 fpsize variants in one
308 macro. Adjust all users.
309
91809fda
NC
3102004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
311
312 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
313 separately.
314
f4453dfa
NC
3152004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
316
317 * m32r-asm.c: Regenerate.
318
9b0de91a
SS
3192004-03-29 Stan Shebs <shebs@apple.com>
320
321 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
322 used.
323
e20c0b3d
AM
3242004-03-19 Alan Modra <amodra@bigpond.net.au>
325
326 * aclocal.m4: Regenerate.
327 * config.in: Regenerate.
328 * configure: Regenerate.
329 * po/POTFILES.in: Regenerate.
330 * po/opcodes.pot: Regenerate.
331
fdd12ef3
AM
3322004-03-16 Alan Modra <amodra@bigpond.net.au>
333
334 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
335 PPC_OPERANDS_GPR_0.
336 * ppc-opc.c (RA0): Define.
337 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
338 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 339 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 340
2dc111b3 3412004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM
342
343 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 344
7bfeee7b
AM
3452004-03-15 Alan Modra <amodra@bigpond.net.au>
346
347 * sparc-dis.c (print_insn_sparc): Update getword prototype.
348
7ffdda93
ML
3492004-03-12 Michal Ludvig <mludvig@suse.cz>
350
351 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 352 (grps): Delete GRPPLOCK entry.
7ffdda93 353
cc0ec051
AM
3542004-03-12 Alan Modra <amodra@bigpond.net.au>
355
356 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
357 (M, Mp): Use OP_M.
358 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
359 (GRPPADLCK): Define.
360 (dis386): Use NOP_Fixup on "nop".
361 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
362 (twobyte_has_modrm): Set for 0xa7.
363 (padlock_table): Delete. Move to..
364 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
365 and clflush.
366 (print_insn): Revert PADLOCK_SPECIAL code.
367 (OP_E): Delete sfence, lfence, mfence checks.
368
4fd61dcb
JJ
3692004-03-12 Jakub Jelinek <jakub@redhat.com>
370
371 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
372 (INVLPG_Fixup): New function.
373 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
374
0f10071e
ML
3752004-03-12 Michal Ludvig <mludvig@suse.cz>
376
377 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
378 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
379 (padlock_table): New struct with PadLock instructions.
380 (print_insn): Handle PADLOCK_SPECIAL.
381
c02908d2
AM
3822004-03-12 Alan Modra <amodra@bigpond.net.au>
383
384 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
385 (OP_E): Twiddle clflush to sfence here.
386
d5bb7600
NC
3872004-03-08 Nick Clifton <nickc@redhat.com>
388
389 * po/de.po: Updated German translation.
390
ae51a426
JR
3912003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
392
393 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
394 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
395 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
396 accordingly.
397
676a64f4
RS
3982004-03-01 Richard Sandiford <rsandifo@redhat.com>
399
400 * frv-asm.c: Regenerate.
401 * frv-desc.c: Regenerate.
402 * frv-desc.h: Regenerate.
403 * frv-dis.c: Regenerate.
404 * frv-ibld.c: Regenerate.
405 * frv-opc.c: Regenerate.
406 * frv-opc.h: Regenerate.
407
c7a48b9a
RS
4082004-03-01 Richard Sandiford <rsandifo@redhat.com>
409
410 * frv-desc.c, frv-opc.c: Regenerate.
411
8ae0baa2
RS
4122004-03-01 Richard Sandiford <rsandifo@redhat.com>
413
414 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
415
ce11586c
JR
4162004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
417
418 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
419 Also correct mistake in the comment.
420
6a5709a5
JR
4212004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
422
423 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
424 ensure that double registers have even numbers.
425 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
426 that reserved instruction 0xfffd does not decode the same
427 as 0xfdfd (ftrv).
428 * sh-opc.h: Add REG_N_D nibble type and use it whereever
429 REG_N refers to a double register.
430 Add REG_N_B01 nibble type and use it instead of REG_NM
431 in ftrv.
432 Adjust the bit patterns in a few comments.
433
e5d2b64f 4342004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM
435
436 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 437
1f04b05f
AH
4382004-02-20 Aldy Hernandez <aldyh@redhat.com>
439
440 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
441
2f3b8700
AH
4422004-02-20 Aldy Hernandez <aldyh@redhat.com>
443
444 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
445
f0b26da6 4462004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM
447
448 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
449 mtivor32, mtivor33, mtivor34.
f0b26da6 450
23d59c56 4512004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM
452
453 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 454
34920d91
NC
4552004-02-10 Petko Manolov <petkan@nucleusys.com>
456
457 * arm-opc.h Maverick accumulator register opcode fixes.
458
44d86481
BE
4592004-02-13 Ben Elliston <bje@wasabisystems.com>
460
461 * m32r-dis.c: Regenerate.
462
17707c23
MS
4632004-01-27 Michael Snyder <msnyder@redhat.com>
464
465 * sh-opc.h (sh_table): "fsrra", not "fssra".
466
fe3a9bc4
NC
4672004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
468
469 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
470 contraints.
471
ff24f124
JJ
4722004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
473
474 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
475
a02a862a
AM
4762004-01-19 Alan Modra <amodra@bigpond.net.au>
477
478 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
479 1. Don't print scale factor on AT&T mode when index missing.
480
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4812004-01-16 Alexandre Oliva <aoliva@redhat.com>
482
483 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
484 when loaded into XR registers.
485
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4862004-01-14 Richard Sandiford <rsandifo@redhat.com>
487
488 * frv-desc.h: Regenerate.
489 * frv-desc.c: Regenerate.
490 * frv-opc.c: Regenerate.
491
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4922004-01-13 Michael Snyder <msnyder@redhat.com>
493
494 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
495
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4962004-01-09 Paul Brook <paul@codesourcery.com>
497
498 * arm-opc.h (arm_opcodes): Move generic mcrr after known
499 specific opcodes.
500
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5012004-01-07 Daniel Jacobowitz <drow@mvista.com>
502
503 * Makefile.am (libopcodes_la_DEPENDENCIES)
504 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
505 comment about the problem.
506 * Makefile.in: Regenerate.
507
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5082004-01-06 Alexandre Oliva <aoliva@redhat.com>
509
510 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
511 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
512 cut&paste errors in shifting/truncating numerical operands.
513 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
514 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
515 (parse_uslo16): Likewise.
516 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
517 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
518 (parse_s12): Likewise.
519 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
520 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
521 (parse_uslo16): Likewise.
522 (parse_uhi16): Parse gothi and gotfuncdeschi.
523 (parse_d12): Parse got12 and gotfuncdesc12.
524 (parse_s12): Likewise.
525
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5262004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
527
528 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
529 instruction which looks similar to an 'rla' instruction.
a0bd404e 530
c9e214e5 531For older changes see ChangeLog-0203
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532\f
533Local Variables:
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534mode: change-log
535left-margin: 8
536fill-column: 74
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537version-control: never
538End:
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