opcodes: blackfin: catch invalid loopsetup insns
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12011-02-14 Mike Frysinger <vapier@gentoo.org>
2
3 * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
4 than 7.
5
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62011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
7
8 * configure: Regenerate.
9
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102011-02-13 Mike Frysinger <vapier@gentoo.org>
11
12 * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
13
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142011-02-13 Mike Frysinger <vapier@gentoo.org>
15
16 * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
17 dregs only when P is set, and dregs_lo otherwise.
18
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192011-02-13 Mike Frysinger <vapier@gentoo.org>
20
21 * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
22
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232011-02-12 Mike Frysinger <vapier@gentoo.org>
24
25 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
26
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272011-02-12 Mike Frysinger <vapier@gentoo.org>
28
29 * bfin-dis.c (machine_registers): Delete REG_GP.
30 (reg_names): Delete "GP".
31 (decode_allregs): Change REG_GP to REG_LASTREG.
32
26bb3ddd
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332011-02-12 Mike Frysinger <vapier@gentoo.org>
34
35 * bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
36 M_IU): Define.
37 (is_macmod_pmove, is_macmod_hmove): New functions.
38
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392011-02-11 Mike Frysinger <vapier@gentoo.org>
40
41 * bfin-dis.c (reg_names): Add const.
42 (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
43 decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
44 decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
45 decode_counters, decode_allregs): Likewise.
46
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472011-02-09 Michael Snyder <msnyder@vmware.com>
48
49 * i386-dis.c (OP_J): Parenthesize expression to prevent
50 truncated addresses.
51 (print_insn): Fix indentation off-by-one.
52
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532011-02-01 Nick Clifton <nickc@redhat.com>
54
55 * po/da.po: Updated Danish translation.
56
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AM
572011-01-21 Dave Murphy <davem@devkitpro.org>
58
59 * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
60
e3949f17
L
612011-01-18 H.J. Lu <hongjiu.lu@intel.com>
62
63 * i386-dis.c (sIbT): New.
64 (b_T_mode): Likewise.
65 (dis386): Replace sIb with sIbT on "pushT".
66 (x86_64_table): Replace sIb with Ib on "aam" and "aad".
67 (OP_sI): Handle b_T_mode. Properly sign-extend byte.
68
752573b2
JK
692011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
70
71 * i386-init.h: Regenerated.
72 * i386-tbl.h: Regenerated
73
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QN
742011-01-17 Quentin Neill <quentin.neill@amd.com>
75
76 * i386-dis.c (REG_XOP_TBM_01): New.
77 (REG_XOP_TBM_02): New.
78 (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
79 (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
80 entries, and add bextr instruction.
81
82 * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
83 (cpu_flags): Add CpuTBM.
84
85 * i386-opc.h (CpuTBM) New.
86 (i386_cpu_flags): Add bit cputbm.
87
88 * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
89 blcs, blsfill, blsic, t1mskc, and tzmsk.
90
90d6ff62
DD
912011-01-12 DJ Delorie <dj@redhat.com>
92
93 * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
94
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952011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
96
97 * mips-dis.c (print_insn_args): Adjust the value to print the real
98 offset for "+c" argument.
99
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1002011-01-10 Nick Clifton <nickc@redhat.com>
101
102 * po/da.po: Updated Danish translation.
103
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1042011-01-05 Nathan Sidwell <nathan@codesourcery.com>
105
106 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
107
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1082011-01-04 H.J. Lu <hongjiu.lu@intel.com>
109
110 * i386-dis.c (REG_VEX_38F3): New.
111 (PREFIX_0FBC): Likewise.
112 (PREFIX_VEX_38F2): Likewise.
113 (PREFIX_VEX_38F3_REG_1): Likewise.
114 (PREFIX_VEX_38F3_REG_2): Likewise.
115 (PREFIX_VEX_38F3_REG_3): Likewise.
116 (PREFIX_VEX_38F7): Likewise.
117 (VEX_LEN_38F2_P_0): Likewise.
118 (VEX_LEN_38F3_R_1_P_0): Likewise.
119 (VEX_LEN_38F3_R_2_P_0): Likewise.
120 (VEX_LEN_38F3_R_3_P_0): Likewise.
121 (VEX_LEN_38F7_P_0): Likewise.
122 (dis386_twobyte): Use PREFIX_0FBC.
123 (reg_table): Add REG_VEX_38F3.
124 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
125 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
126 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
127 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
128 PREFIX_VEX_38F7.
129 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
130 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
131 VEX_LEN_38F7_P_0.
132
133 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
134 (cpu_flags): Add CpuBMI.
135
136 * i386-opc.h (CpuBMI): New.
137 (i386_cpu_flags): Add cpubmi.
138
139 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
140 * i386-init.h: Regenerated.
141 * i386-tbl.h: Likewise.
142
cb21baef
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1432011-01-04 H.J. Lu <hongjiu.lu@intel.com>
144
145 * i386-dis.c (VexGdq): New.
146 (OP_VEX): Handle dq_mode.
147
0db46eb4
L
1482011-01-01 H.J. Lu <hongjiu.lu@intel.com>
149
150 * i386-gen.c (process_copyright): Update copyright to 2011.
151
9e9e0820 152For older changes see ChangeLog-2010
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