[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2020-01-20  Alan Modra  <amodra@gmail.com>

	* arm-dis.c (print_insn_arm): Wrap 'T' value.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
2bddb71a AM	1	2020-01-20 Alan Modra <amodra@gmail.com>
	2
	3	* arm-dis.c (print_insn_arm): Wrap 'T' value.
	4
1b1bb2c6 NC	5	2020-01-18 Nick Clifton <nickc@redhat.com>
	6
	7	* configure: Regenerate.
	8	* po/opcodes.pot: Regenerate.
	9
ae774686 NC	10	2020-01-18 Nick Clifton <nickc@redhat.com>
	11
	12	Binutils 2.34 branch created.
	13
07f1f3aa CB	14	2020-01-17 Christian Biesinger <cbiesinger@google.com>
	15
	16	* opintl.h: Fix spelling error (seperate).
	17
42e04b36 L	18	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	19
	20	* i386-opc.tbl: Add {vex} pseudo prefix.
	21	* i386-tbl.h: Regenerated.
	22
2da2eaf4 AV	23	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	24
	25	PR 25376
	26	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	27	(neon_opcodes): Likewise.
	28	(select_arm_features): Make sure we enable MVE bits when selecting
	29	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	30	any architecture.
	31
d0849eed JB	32	2020-01-16 Jan Beulich <jbeulich@suse.com>
	33
	34	* i386-opc.tbl: Drop stale comment from XOP section.
	35
9cf70a44 JB	36	2020-01-16 Jan Beulich <jbeulich@suse.com>
	37
	38	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	39	(extractps): Add VexWIG to SSE2AVX forms.
	40	* i386-tbl.h: Re-generate.
	41
4814632e JB	42	2020-01-16 Jan Beulich <jbeulich@suse.com>
	43
	44	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	45	Size64 from and use VexW1 on SSE2AVX forms.
	46	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	47	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	48	* i386-tbl.h: Re-generate.
	49
aad09917 AM	50	2020-01-15 Alan Modra <amodra@gmail.com>
	51
	52	* tic4x-dis.c (tic4x_version): Make unsigned long.
	53	(optab, optab_special, registernames): New file scope vars.
	54	(tic4x_print_register): Set up registernames rather than
	55	malloc'd registertable.
	56	(tic4x_disassemble): Delete optable and optable_special. Use
	57	optab and optab_special instead. Throw away old optab,
	58	optab_special and registernames when info->mach changes.
	59
7a6bf3be SB	60	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	61
	62	PR 25377
	63	* z80-dis.c (suffix): Use .db instruction to generate double
	64	prefix.
	65
ca1eaac0 AM	66	2020-01-14 Alan Modra <amodra@gmail.com>
	67
	68	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	69	values to unsigned before shifting.
	70
1d67fe3b TT	71	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	72
	73	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	74	flow instructions.
	75	(print_insn_thumb16, print_insn_thumb32): Likewise.
	76	(print_insn): Initialize the insn info.
	77	* i386-dis.c (print_insn): Initialize the insn info fields, and
	78	detect jumps.
	79
5e4f7e05 CZ	80	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	81
	82	* arc-opc.c (C_NE): Make it required.
	83
b9fe6b8a CZ	84	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	85
	86	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	87	reserved register name.
	88
90dee485 AM	89	2020-01-13 Alan Modra <amodra@gmail.com>
	90
	91	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	92	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	93
febda64f AM	94	2020-01-13 Alan Modra <amodra@gmail.com>
	95
	96	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	97	result of wasm_read_leb128 in a uint64_t and check that bits
	98	are not lost when copying to other locals. Use uint32_t for
	99	most locals. Use PRId64 when printing int64_t.
	100
df08b588 AM	101	2020-01-13 Alan Modra <amodra@gmail.com>
	102
	103	* score-dis.c: Formatting.
	104	* score7-dis.c: Formatting.
	105
b2c759ce AM	106	2020-01-13 Alan Modra <amodra@gmail.com>
	107
	108	* score-dis.c (print_insn_score48): Use unsigned variables for
	109	unsigned values. Don't left shift negative values.
	110	(print_insn_score32): Likewise.
	111	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	112
5496abe1 AM	113	2020-01-13 Alan Modra <amodra@gmail.com>
	114
	115	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	116
202e762b AM	117	2020-01-13 Alan Modra <amodra@gmail.com>
	118
	119	* fr30-ibld.c: Regenerate.
	120
7ef412cf AM	121	2020-01-13 Alan Modra <amodra@gmail.com>
	122
	123	* xgate-dis.c (print_insn): Don't left shift signed value.
	124	(ripBits): Formatting, use 1u.
	125
7f578b95 AM	126	2020-01-10 Alan Modra <amodra@gmail.com>
	127
	128	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	129	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	130
441af85b AM	131	2020-01-10 Alan Modra <amodra@gmail.com>
	132
	133	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	134	and XRREG value earlier to avoid a shift with negative exponent.
	135	* m10200-dis.c (disassemble): Similarly.
	136
bce58db4 NC	137	2020-01-09 Nick Clifton <nickc@redhat.com>
	138
	139	PR 25224
	140	* z80-dis.c (ld_ii_ii): Use correct cast.
	141
40c75bc8 SB	142	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	143
	144	PR 25224
	145	* z80-dis.c (ld_ii_ii): Use character constant when checking
	146	opcode byte value.
	147
d835a58b JB	148	2020-01-09 Jan Beulich <jbeulich@suse.com>
	149
	150	* i386-dis.c (SEP_Fixup): New.
	151	(SEP): Define.
	152	(dis386_twobyte): Use it for sysenter/sysexit.
	153	(enum x86_64_isa): Change amd64 enumerator to value 1.
	154	(OP_J): Compare isa64 against intel64 instead of amd64.
	155	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	156	forms.
	157	* i386-tbl.h: Re-generate.
	158
030a2e78 AM	159	2020-01-08 Alan Modra <amodra@gmail.com>
	160
	161	* z8k-dis.c: Include libiberty.h
	162	(instr_data_s): Make max_fetched unsigned.
	163	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	164	Don't exceed byte_info bounds.
	165	(output_instr): Make num_bytes unsigned.
	166	(unpack_instr): Likewise for nibl_count and loop.
	167	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	168	idx unsigned.
	169	* z8k-opc.h: Regenerate.
	170
bb82aefe SV	171	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	172
	173	* arc-tbl.h (llock): Use 'LLOCK' as class.
	174	(llockd): Likewise.
	175	(scond): Use 'SCOND' as class.
	176	(scondd): Likewise.
	177	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	178	(scondd): Likewise.
	179
cc6aa1a6 AM	180	2020-01-06 Alan Modra <amodra@gmail.com>
	181
	182	* m32c-ibld.c: Regenerate.
	183
660e62b1 AM	184	2020-01-06 Alan Modra <amodra@gmail.com>
	185
	186	PR 25344
	187	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	188	Peek at next byte to prevent recursion on repeated prefix bytes.
	189	Ensure uninitialised "mybuf" is not accessed.
	190	(print_insn_z80): Don't zero n_fetch and n_used here,..
	191	(print_insn_z80_buf): ..do it here instead.
	192
c9ae58fe AM	193	2020-01-04 Alan Modra <amodra@gmail.com>
	194
	195	* m32r-ibld.c: Regenerate.
	196
5f57d4ec AM	197	2020-01-04 Alan Modra <amodra@gmail.com>
	198
	199	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	200
2c5c1196 AM	201	2020-01-04 Alan Modra <amodra@gmail.com>
	202
	203	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	204
2e98c6c5 AM	205	2020-01-04 Alan Modra <amodra@gmail.com>
	206
	207	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	208
567dfba2 JB	209	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	210
5437a02a JB	211	* aarch64-tbl.h (aarch64_opcode_table): Use
	212	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	213
	214	2020-01-03 Jan Beulich <jbeulich@suse.com>
	215
	216	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	217	forms of SUDOT and USDOT.
567dfba2 JB	218
8c45011a JB	219	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	220
5437a02a	221	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	222	uzip{1,2}.
	223	* opcodes/aarch64-dis-2.c: Re-generate.
	224
f4950f76 JB	225	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	226
5437a02a	227	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	228	FMMLA encoding.
	229	* opcodes/aarch64-dis-2.c: Re-generate.
	230
6655dba2 SB	231	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	232
	233	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	234
b14ce8bf AM	235	2020-01-01 Alan Modra <amodra@gmail.com>
	236
	237	Update year range in copyright notice of all files.
	238
0b114740	239	For older changes see ChangeLog-2019
3499769a	240	\f
0b114740	241	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	242
	243	Copying and distribution of this file, with or without modification,
	244	are permitted in any medium without royalty provided the copyright
	245	notice and this notice are preserved.
	246
	247	Local Variables:
	248	mode: change-log
	249	left-margin: 8
	250	fill-column: 74
	251	version-control: never
	252	End: