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2007-07-16 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
80f2eaf0
NC		 12007-07-16 Nick Clifton <nickc@redhat.com>
2
3 * po/nl.po: Updated translation.
4
7353bd54
NC		 52007-07-12 Nick Clifton <nickc@redhat.com>
6
7 * po/vi.po: Updated translation.
8 * po/nl.po: Updated translation.
9
e8d39116
L		 102007-07-06 Mark Kettenis <kettenis@gnu.org>
11 H.J. Lu <hongjiu.lu@intel.com>
12
13 * Makefile.am (i386-tbl.h): Add $(srcdir)/ to target.
14 (ia64-asmtab.c): Likewise.
15 * Makefile.in: Regenerate.
16
033ca630
L		 172007-07-05 H.J. Lu <hongjiu.lu@intel.com>
18
19 * aclocal.m4: Regenerated.
20
9b201bb5
NC		 212007-07-04 Nick Clifton <nickc@redhat.com>
22
23 * alpha-dis.c: Update copyright notice to refer to GPLv3.
24 * alpha-opc.c, arc-dis.c, arc-dis.h, arc-ext.c, arc-ext.h,
25 arc-opc.c, arm-dis.c, avr-dis.c, bfin-dis.c, cgen-asm.c,
26 cgen-asm.in, cgen-bitset.c, cgen-dis.c, cgen-dis.in, cgen-ibld.in,
27 cgen-opc.c, cgen-ops.h, cgen.sh, cgen-types.h, cr16-dis.c,
28 cr16-opc.c, cris-dis.c, cris-opc.c, crx-dis.c, crx-opc.c,
29 d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c, disassemble.c,
30 dis-buf.c, dis-init.c, dlx-dis.c, h8300-dis.c, h8500-dis.c,
31 h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c, i386-dis.c,
32 i386-gen.c, i386-opc.c, i386-opc.h, i860-dis.c, i960-dis.c,
33 ia64-asmtab.h, ia64-dis.c, ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c,
34 ia64-opc.c, ia64-opc-d.c, ia64-opc-f.c, ia64-opc.h, ia64-opc-i.c,
35 ia64-opc-m.c, ia64-opc-x.c, m10200-dis.c, m10200-opc.c,
36 m10300-dis.c, m10300-opc.c, m68hc11-dis.c, m68hc11-opc.c,
37 m68k-dis.c, m68k-opc.c, m88k-dis.c, maxq-dis.c, mcore-dis.c,
38 mcore-opc.h, mips16-opc.c, mips-dis.c, mips-opc.c, mmix-dis.c,
39 mmix-opc.c, msp430-dis.c, ns32k-dis.c, opintl.h, or32-dis.c,
40 or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c, pj-opc.c,
41 ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c, s390-opc.c,
42 score-dis.c, score-opc.h, sh64-dis.c, sh64-opc.c, sh64-opc.h,
43 sh-dis.c, sh-opc.h, sparc-dis.c, sparc-opc.c, spu-dis.c,
44 spu-opc.c, sysdep.h, tic30-dis.c, tic4x-dis.c, tic54x-dis.c,
45 tic54x-opc.c, tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c,
46 vax-dis.c, w65-dis.c, w65-opc.h, xtensa-dis.c, z80-dis.c,
47 z8k-dis.c, z8kgen.c: Likewise.
48 * i386-opc.tbl, i386-reg.tbl: Add copyright notice.
49 * aclocal.m4, configure, fr30-asm.c, fr30-desc.c, fr30-desc.h,
50 fr30-dis.c, fr30-ibld.c, fr30-opc.c, fr30-opc.h, frv-asm.c,
51 frv-desc.c, frv-desc.h, frv-dis.c, frv-ibld.c, frv-opc.c,
52 frv-opc.h, i386-tbl.h, ia64-asmtab.c, ip2k-asm.c, ip2k-desc.c,
53 ip2k-desc.h, ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h,
54 iq2000-asm.c, iq2000-desc.c, iq2000-desc.h, iq2000-dis.c,
55 iq2000-ibld.c, iq2000-opc.c, iq2000-opc.h, m32c-asm.c,
56 m32c-desc.c, m32c-desc.h, m32c-dis.c, m32c-ibld.c, m32c-opc.c,
57 m32c-opc.h, m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
58 m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c, mep-asm.c,
59 mep-desc.c, mep-desc.h, mep-dis.c, mep-ibld.c, mep-opc.c,
60 mep-opc.h, mt-asm.c, mt-desc.c, mt-desc.h, mt-dis.c, mt-ibld.c,
61 mt-opc.c, mt-opc.h, openrisc-asm.c, openrisc-desc.c,
62 openrisc-desc.h, openrisc-dis.c, openrisc-ibld.c, openrisc-opc.c,
63 openrisc-opc.h, xc16x-asm.c, xc16x-desc.c, xc16x-desc.h,
64 xc16x-dis.c, xc16x-ibld.c, xc16x-opc.c, xc16x-opc.h,
65 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
66 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
67 xstormy16-opc.h, z8k-opc.h: Regenerated
68
ddb341a7
NC		 692007-07-04 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
70
71 * cr16-dis.c (getcinvstring): Add const qualifier to char *
72 parameter.
73 (print_insn_cr16): Remove cast to char *.
74
afa2158f
NS		 752007-07-03 Nathan Sidwell <nathan@codesourcery.com>
76
77 * m68k-dis.c (fetch_arg): Add E. Replace length switch with
78 direct masking.
79 (print_ins_arg): Add j & K operand types.
80 (match_insn_m68k): Check and skip initial '.' arg character.
81 (m68k_scan_mask): Likewise.
82 * m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
83
ae351704
AM		 842007-07-02 Alan Modra <amodra@bigpond.net.au>
85
86 * Makefile.am: Run "make dep-am".
87 * Makefile.in: Regenerate.
88 * aclocal.m4: Regenerate.
89 * config.in: Regenerate.
90 * po/POTFILES.in: Regenerate.
91 * po/opcodes.pot: Regenerate.
92
86b57e31
L		 932007-06-30 H.J. Lu <hongjiu.lu@intel.com>
94
95 * aclocal.m4: Regenerated.
96 * Makefile.in: Likewise.
97
f85fcb85
L		 982007-06-29 H.J. Lu <hongjiu.lu@intel.com>
99
100 * i386-reg.tbl: Remove spaces before comments.
101
3d3d428f
NC		 1022007-06-29 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
103
104 * cr16-opc.c: New file.
105 * cr16-dis.c: New file.
106 * Makefile.am: Entries for cr16.
107 * Makefile.in: Regenerate.
108 * cofigure.in: Add cr16 target information.
109 * configure : Regenerate.
110 * disassemble.c: Add cr16 target information.
111
40b8e679
L		 1122007-06-28 H.J. Lu <hongjiu.lu@intel.com>
113
114 * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
115 (CFILES): Add i386-gen.c.
116 (i386-gen): New rule.
117 (i386-gen.o): Likewise.
118 (i386-tbl.h): Likewise.
119 Run "make dep-am".
120 * Makefile.in: Regenerated.
121
122 * i386-gen.c: New file.
123 * i386-opc.tbl: Likewise.
124 * i386-reg.tbl: Likewise.
125 * i386-tbl.h: Likewise.
126
127 * i386-opc.c: Include "i386-tbl.h".
128 (i386_optab): Removed.
129 (i386_regtab): Likewise.
130 (i386_regtab_size): Likewise.
131
cd2cf30b
PB		 1322007-06-26 Paul Brook <paul@codesourcery.com>
133
134 * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
135
5f15756d
L		 1362007-06-25 H.J. Lu <hongjiu.lu@intel.com>
137
138 * i386-opc.h (regKludge): Renamed to ...
139 (RegKludge): This.
140
141 * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
142
09a2c6cf
L		 1432007-06-23 H.J. Lu <hongjiu.lu@intel.com>
144
145 PR binutils/4667
146 * i386-dis.c (EX): Removed.
147 (EMd): New.
148 (EMq): Likewise.
149 (EXd): Likewise.
150 (EXq): Likewise.
151 (EXx): Likewise.
152 (PREGRP93...PREGRP97): Likewise.
153 (dis386_twobyte): Updated.
154 (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
155 (OP_EX): Remove Intel syntax handling.
156
ddefa7f5
KH		 1572007-06-18 Nathan Sidwell <nathan@codesourcery.com>
158
159 * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
160
79887925
L		 1612007-06-14 H.J. Lu <hongjiu.lu@intel.com>
162
163 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
164
165 * acinclude.m4: Removed.
166
167 * Makefile.in: Regenerated.
168 * doc/Makefile.in: Likewise.
169 * aclocal.m4: Likewise.
170 * configure: Likewise.
171
79d49516
PB		 1722007-06-05 Paul Brook <paul@codesourcery.com>
173
174 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
175
37ad9514
SE		 1762007-05-24 Steve Ellcey <sje@cup.hp.com>
177
178 * Makefile.in: Regnerate.
179 * configure: Regenerate.
180 * aclocal.m4: Regenerate.
181
65b650b4
AM		 1822007-05-18 Alan Modra <amodra@bigpond.net.au>
183
184 * ppc-dis.c (print_insn_powerpc): Don't skip all operands
185 after setting skip_optional.
186
ea192fa3
PB		 1872007-05-16 Peter Bergner <bergner@vnet.ibm.com>
188
189 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
190 (print_insn_powerpc): Use the new operand_value_powerpc and
191 skip_optional_operands functions to omit or print all optional
192 operands as a group.
193 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
194 (XFL_MASK): Delete L and W bits from the mask.
195 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
196 with XWRA_MASK. Use W.
197 (mtfsf, mtfsf.): Use XFL_L and W.
198
9beff690
L		 1992007-05-14 H.J. Lu <hongjiu.lu@intel.com>
200
201 PR binutils/4502
202 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
203
4d67a4d3
L		 2042007-05-10 H.J. Lu <hongjiu.lu@intel.com>
205
206 * i386-opc.h (ShortForm): Redefined.
207 (Jump): Likewise.
208 (JumpDword): Likewise.
209 (JumpByte): Likewise.
210 (JumpInterSegment): Likewise.
211 (FloatMF): Likewise.
212 (FloatR): Likewise.
213 (FloatD): Likewise.
214 (Size16): Likewise.
215 (Size32): Likewise.
216 (Size64): Likewise.
217 (IgnoreSize): Likewise.
218 (DefaultSize): Likewise.
219 (No_bSuf): Likewise.
220 (No_wSuf): Likewise.
221 (No_lSuf): Likewise.
222 (No_sSuf): Likewise.
223 (No_qSuf): Likewise.
224 (No_xSuf): Likewise.
225 (FWait): Likewise.
226 (IsString): Likewise.
227 (regKludge): Likewise.
228 (IsPrefix): Likewise.
229 (ImmExt): Likewise.
230 (NoRex64): Likewise.
231 (Rex64): Likewise.
232 (Ugh): Likewise.
233
8de28984
L		 2342007-05-07 H.J. Lu <hongjiu.lu@intel.com>
235
236 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
237 for some SSE4 instructions.
238 (threebyte_0x3a_uses_DATA_prefix): Likewise.
239
20592a94
L		 2402007-05-03 H.J. Lu <hongjiu.lu@intel.com>
241
242 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
243
244 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
245 type for crc32.
246
9344ff29
L		 2472007-05-01 H.J. Lu <hongjiu.lu@intel.com>
248
249 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
250 check data size prefix in 16bit mode.
251
252 * i386-opc.c (i386_optab): Default crc32 to non-8bit and
253 support Intel mode.
254
53289dcd 2552007-04-30 Mark Salter <msalter@redhat.com>
65b650b4 256
53289dcd
MS		 257 * frv-desc.c: Regenerate.
258 * frv-desc.h: Regenerate.
65b650b4 259
eb42fac1
AM		 2602007-04-30 Alan Modra <amodra@bigpond.net.au>
261
262 PR 4436
263 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
264
484c222e
L		 2652007-04-27 H.J. Lu <hongjiu.lu@intel.com>
266
267 * i386-dis.c (modrm): Put reg before rm.
268
5d669648
L		 2692007-04-26 H.J. Lu <hongjiu.lu@intel.com>
270
271 PR binutils/4430
272 * i386-dis.c (print_displacement): New.
273 (OP_E): Call print_displacement instead of print_operand_value
274 to output displacement when either base or index exist. Print
275 the explicit zero displacement in 16bit mode.
276
185b1163
L		 2772007-04-26 H.J. Lu <hongjiu.lu@intel.com>
278
279 PR binutils/4429
280 * i386-dis.c (print_insn): Also swap the order of op_riprel
281 when swapping op_index. Break when the RIP relative address
282 is printed.
283 (OP_E): Properly handle RIP relative addressing and print the
284 explicit zero displacement for Intel mode.
285
eddc20ad
AM		 2862007-04-27 Alan Modra <amodra@bigpond.net.au>
287
288 * Makefile.am: Run "make dep-am".
289 * Makefile.in: Regenerate.
290 * ns32k-dis.c: Include sysdep.h first.
291
dacc8b01
MS		 2922007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
293
294 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
295 opcode.
eddc20ad
AM		 296 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
297
fbb92301
NC		 2982007-04-24 Nick Clifton <nickc@redhat.com>
299
300 * arm-dis.c (print_insn): Initialise type.
301
4c273957
AM		 3022007-04-24 Alan Modra <amodra@bigpond.net.au>
303
304 * cgen-types.h: Include bfd_stdint.h, not stdint.h.
305 * Makefile.am: Run "make dep-am".
306 * Makefile.in: Regenerate.
307
9a2e615a
NS		 3082007-04-23 Nathan Sidwell <nathan@codesourcery.com>
309
310 * m68k-opc.c: Mark mcfisa_c instructions.
311
37b37b2d
RE		 3122007-04-21 Richard Earnshaw <rearnsha@arm.com>
313
314 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
315 (thumb_opcodes): Add missing white space in adr.
65b650b4 316 (arm_decode_shift): New parameter, print_shift. Only decode the
37b37b2d
RE		 317 shift parameter if set. Adjust callers.
318 (print_insn_arm): Support for operand type q with no shift decode.
319
717bbdf1
AM		 3202007-04-21 Alan Modra <amodra@bigpond.net.au>
321
db557034
AM		 322 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
323 Move contents to..
324 (i386_regtab): ..here.
325 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
326
717bbdf1
AM		 327 * ppc-opc.c (powerpc_operands): Delete duplicate entries.
328 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
329 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
330 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
331
78336706
NS		 3322007-04-20 Nathan Sidwell <nathan@codesourcery.com>
333
334 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
335 rambar1.
336
b84bf58a
AM		 3372007-04-20 Alan Modra <amodra@bigpond.net.au>
338
339 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
340 change.
341 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
342 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
343 references to following deleted functions.
344 (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
345 (insert_ds, extract_ds, insert_de, extract_de): Delete.
346 (insert_des, extract_des, insert_li, extract_li): Delete.
347 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
348 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
349 (num_powerpc_operands): New constant.
350 (XSPRG_MASK): Remove entire SPRG field.
351 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
352
0bbdef92
AM		 3532007-04-20 Alan Modra <amodra@bigpond.net.au>
354
355 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
356 (Z2_MASK): Define.
357 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
358
86ad2a13
RE		 3592007-04-20 Richard Earnshaw <rearnsha@arm.com>
360
361 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
362 being disassembled.
363
a33e055d
AM		 3642007-04-19 Alan Modra <amodra@bigpond.net.au>
365
366 * Makefile.am: Run "make dep-am".
367 * Makefile.in: Regenerate.
368 * po/POTFILES.in: Regenerate.
369
360b1600
AM		 3702007-04-19 Alan Modra <amodra@bigpond.net.au>
371
372 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
373 db10cyc, db12cyc, db16cyc.
374
b20ae55e
AM		 3752007-04-19 Nathan Froyd <froydnj@codesourcery.com>
376
377 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
378
381d071f
L		 3792007-04-18 H.J. Lu <hongjiu.lu@intel.com>
380
381 * i386-dis.c (CRC32_Fixup): New.
382 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
383 PREGRP91): New.
384 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
385 (threebyte_0x3a_uses_DATA_prefix): Likewise.
386 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
387 PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
388 (three_byte_table): Likewise.
389
390 * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
391
f6fdceb7 392 * i386-opc.h (CpuSSE4_2): New.
381d071f
L		 393 (CpuSSE4): Likewise.
394 (CpuUnknownFlags): Add CpuSSE4_2.
395
42903f7f
L		 3962007-04-18 H.J. Lu <hongjiu.lu@intel.com>
397
398 * i386-dis.c (XMM_Fixup): New.
399 (Edqb): New.
400 (Edqd): New.
401 (XMM0): New.
402 (dqb_mode): New.
403 (dqd_mode): New.
404 (PREGRP39 ... PREGRP85): New.
405 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
406 (threebyte_0x3a_uses_DATA_prefix): Likewise.
407 (prefix_user_table): Add PREGRP39 ... PREGRP85.
408 (three_byte_table): Likewise.
409 (putop): Handle 'K'.
410 (intel_operand_size): Handle dqb_mode, dqd_mode):
411 (OP_E): Likewise.
412 (OP_G): Likewise.
413
414 * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
415
416 * i386-opc.h (CpuSSE4_1): New.
417 (CpuUnknownFlags): Add CpuSSE4_1.
418 (regKludge): Update comment.
419
ee5c21a0
DJ		 4202007-04-18 Matthias Klose <doko@ubuntu.com>
421
422 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
423 * Makefile.in: Regenerate.
424
b7d19ba6
SE		 4252007-04-14 Steve Ellcey <sje@cup.hp.com>
426
427 * Makefile.am: Add ACLOCAL_AMFLAGS.
428 * Makefile.in: Regenerate.
429
246c51aa
L		 4302007-04-13 H.J. Lu <hongjiu.lu@intel.com>
431
432 * i386-dis.c: Remove trailing white spaces.
6e26e51a
L		 433 * i386-opc.c: Likewise.
434 * i386-opc.h: Likewise.
246c51aa 435
7967e09e
L		 4362007-04-11 H.J. Lu <hongjiu.lu@intel.com>
437
438 PR binutils/4333
439 * i386-dis.c (GRP1a): New.
440 (GRP1b ... GRPPADLCK2): Update index.
441 (dis386): Use GRP1a for entry 0x8f.
442 (mod, rm, reg): Removed. Replaced by ...
443 (modrm): This.
444 (grps): Add GRP1a.
445
56dc1f8a
KH		 4462007-04-09 Kazu Hirata <kazu@codesourcery.com>
447
448 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
449 info->print_address_func if longjmp is called.
450
144f4bc6
DD		 4512007-03-29 DJ Delorie <dj@redhat.com>
452
453 * m32c-desc.c: Regenerate.
454 * m32c-dis.c: Regenerate.
455 * m32c-opc.c: Regenerate.
456
e72cf3ec
L		 4572007-03-28 H.J. Lu <hongjiu.lu@intel.com>
458
459 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
460 movq. Remove InvMem from sldt, smsw and str.
461
462 * i386-opc.h (InvMem): Renamed to ...
463 (RegMem): Update comments.
464 (AnyMem): Remove InvMem.
465
831480e9 4662007-03-27 Paul Brook <paul@codesourcery.com>
b74ed8f5 467
b74ed8f5
PB		 468 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
469
4146fd53
PB		 4702007-03-24 Paul Brook <paul@codesourcery.com>
471
472 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
473 (print_insn_coprocessor): Handle %<bitfield>x.
474
b6702015 4752007-03-24 Paul Brook <paul@codesourcery.com>
e72cf3ec 476 Mark Shinwell <shinwell@codesourcery.com>
b6702015
PB		 477
478 * arm-dis.c (arm_opcodes): Print SRS base register.
479
831480e9 4802007-03-23 H.J. Lu <hongjiu.lu@intel.com>
0003779b
L		 481
482 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
483
484 * i386-opc.c (i386_optab): Add rex.wrxb.
485
831480e9 4862007-03-21 H.J. Lu <hongjiu.lu@intel.com>
161a04f6
L		 487
488 * i386-dis.c (REX_MODE64): Remove definition.
489 (REX_EXTX): Likewise.
490 (REX_EXTY): Likewise.
491 (REX_EXTZ): Likewise.
492 (USED_REX): Use REX_OPCODE instead of 0x40.
493 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
494 REX_R, REX_X and REX_B respectively.
495
831480e9 4962007-03-21 H.J. Lu <hongjiu.lu@intel.com>
8b38ad71
L		 497
498 PR binutils/4218
499 * i386-dis.c (PREGRP38): New.
500 (dis386): Use PREGRP38 for 0x90.
501 (prefix_user_table): Add PREGRP38.
502 (print_insn): Set uses_REPZ_prefix to 1 for pause.
503 (NOP_Fixup1): Properly handle REX bits.
504 (NOP_Fixup2): Likewise.
505
506 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
507 Allow register with nop.
508
75b06e7b
DD		 5092007-03-20 DJ Delorie <dj@redhat.com>
510
511 * m32c-asm.c: Regenerate.
512 * m32c-desc.c: Regenerate.
513 * m32c-desc.h: Regenerate.
514 * m32c-dis.h: Regenerate.
515 * m32c-ibld.c: Regenerate.
516 * m32c-opc.c: Regenerate.
517 * m32c-opc.h: Regenerate.
518
c3fe08fa
L		 5192007-03-15 H.J. Lu <hongjiu.lu@intel.com>
520
521 * i386-opc.c: Include "libiberty.h".
522 (i386_regtab): Remove the last entry.
523 (i386_regtab_size): New.
524 (i386_float_regtab_size): Likewise.
525
526 * i386-opc.h (i386_regtab_size): New.
527 (i386_float_regtab_size): Likewise.
528
0b1cf022
L		 5292007-03-15 H.J. Lu <hongjiu.lu@intel.com>
530
531 * Makefile.am (CFILES): Add i386-opc.c.
532 (ALL_MACHINES): Add i386-opc.lo.
533 Run "make dep-am".
534 * Makefile.in: Regenerated.
535
536 * configure.in: Add i386-opc.lo for bfd_i386_arch.
537 * configure: Regenerated.
538
539 * i386-dis.c: Include "opcode/i386.h".
540 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
541 (FWAIT_OPCODE): Remove definition.
542 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
543 (MAX_OPERANDS): Remove definition.
544
545 * i386-opc.c: New file.
546 * i386-opc.h: Likewise.
547
56eced12
L		 5482007-03-15 H.J. Lu <hongjiu.lu@intel.com>
549
550 * Makefile.in: Regenerated.
551
6f74c397
L		 5522007-03-09 H.J. Lu <hongjiu.lu@intel.com>
553
554 * i386-dis.c (OP_Rd): Renamed to ...
555 (OP_R): This.
556 (Rd): Updated.
557 (Rm): Likewise.
558
a6d04ec4
AM		 5592007-03-08 Alan Modra <amodra@bigpond.net.au>
560
1620f33d
AM		 561 * fr30-asm.c: Regenerate.
562 * frv-asm.c: Regenerate.
563 * ip2k-asm.c: Regenerate.
564 * iq2000-asm.c: Regenerate.
565 * m32c-asm.c: Regenerate.
566 * m32r-asm.c: Regenerate.
567 * m32r-dis.c: Regenerate.
568 * mt-asm.c: Regenerate.
569 * mt-ibld.c: Regenerate.
570 * mt-opc.c: Regenerate.
571 * openrisc-asm.c: Regenerate.
572 * xc16x-asm.c: Regenerate.
573 * xstormy16-asm.c: Regenerate.
574
a6d04ec4
AM		 575 * Makefile.am: Run "make dep-am".
576 * Makefile.in: Regenerate.
577 * po/POTFILES.in: Regenerate.
578
b5639b37
MS		 5792007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
580
581 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
582 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
583 instruction formats added.
584 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
585 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
586 masks added.
587 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
588 instructions added.
589 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
590 (main): z9-ec cpu type option added.
591 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
592
b2e818b7
DD		 5932007-02-22 DJ Delorie <dj@redhat.com>
594
595 * s390-opc.c (INSTR_SS_L2RDRD): New.
596 (MASK_SS_L2RDRD): New.
597 * s390-opc.txt (pka): Use it.
598
8b082fb1
TS		 5992007-02-20 Thiemo Seufer <ths@mips.com>
600 Chao-Ying Fu <fu@mips.com>
601
602 * mips-dis.c (mips_arch_choices): Add DSP R2 support.
603 (print_insn_args): Add support for balign instruction.
604 * mips-opc.c (D33): New shortcut for DSP R2 instructions.
605 (mips_builtin_opcodes): Add DSP R2 instructions.
606
929e4d1a
MS		 6072007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
608
609 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
610 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
611 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
612 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
613
b8e55848
MS		 6142007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
615
616 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
617 * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
618 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
619 and sfpc.
620
af692060
NC		 6212007-02-16 Nick Clifton <nickc@redhat.com>
622
623 PR binutils/4045
624 * avr-dis.c (comment_start): New variable, contains the prefix to
625 use when printing addresses in comments.
626 (print_insn_avr): Set comment_start to an empty space if there is
627 no symbol table available as the generic address printing code
628 will prefix the numeric value of the address with 0x.
629
ce518a5f
L		 6302007-02-13 H.J. Lu <hongjiu.lu@intel.com>
631
632 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
633 in struct dis386.
634
bd2f2e55 6352007-02-05 Dave Brolley <brolley@redhat.com>
8c9c183d
DB		 636 Richard Sandiford <rsandifo@redhat.com>
637 DJ Delorie <dj@redhat.com>
638 Graydon Hoare <graydon@redhat.com>
639 Frank Ch. Eigler <fche@redhat.com>
640 Ben Elliston <bje@redhat.com>
641
642 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
643 (CFILES): Add mep-*.c
644 (ALL_MACHINES): Add mep-*.lo.
645 (CLEANFILES): Add stamp-mep.
646 (CGEN_CPUS): Add mep.
647 (MEP_DEPS): New variable.
648 (mep-*): New targets.
649 * configure.in: Handle bfd_mep_arch.
650 * disassemble.c (ARCH_mep): New macro.
651 (disassembler): Handle bfd_arch_mep.
652 (disassemble_init_for_target): Likewise.
653 * mep-*: New files for Toshiba Media Processor (MeP).
bd2f2e55
DB		 654 * Makefile.in: Regenerated.
655 * configure: Regenerated.
656
eb7834a6 6572007-02-05 H.J. Lu <hongjiu.lu@intel.com>
65ca155d
L		 658
659 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
660 wrap around within the same segment in 16bit mode.
661
eb7834a6 6622007-02-02 H.J. Lu <hongjiu.lu@intel.com>
206717e8
L		 663
664 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
665 prefix.
666
c4f5c3d7
L		 6672007-02-02 H.J. Lu <hongjiu.lu@intel.com>
668
669 * avr-dis.c (avr_operand): Correct PR number in comment.
670
fc523535 6712007-02-02 H.J. Lu <hongjiu.lu@intel.com>
f59a29b9
L		 672
673 * disassemble.c (disassembler_usage): Call
674 print_i386_disassembler_options for i386 disassembler.
675
676 * i386-dis.c (print_i386_disassembler_options): New.
677 (print_insn): Support the new addr64 option.
678
64a3a6fc
NC		 6792007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
680
681 * ppc-dis.c (powerpc_dialect): Handle ppc440.
682 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
683 be used.
684
ba4e851b
AM		 6852007-02-02 Alan Modra <amodra@bigpond.net.au>
686
687 * ppc-opc.c (insert_bdm): -Many comment.
688 (valid_bo): Add "extract" param. Accept both powerpc and power4
689 BO fields when disassembling with -Many.
690 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
691
3bdcfdf4
KH		 6922007-01-08 Kazu Hirata <kazu@codesourcery.com>
693
694 * m68k-opc.c (m68k_opcodes): Replace cpu32 with
695 cpu32 | fido_a except on tbl instructions.
696
a028a6f5
PB		 6972007-01-04 Paul Brook <paul@codesourcery.com>
698
699 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
700
baee4c9e
AS		 7012007-01-04 Andreas Schwab <schwab@suse.de>
702
703 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
704
62ac925e
JB		 7052007-01-04 Julian Brown <julian@codesourcery.com>
706
707 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
708 vqrshl instructions.
709
10a2343e 710For older changes see ChangeLog-2006
252b5132
RH		 711\f
712Local Variables:
2f6d2f85
NC		 713mode: change-log
714left-margin: 8
715fill-column: 74
252b5132
RH		 716version-control: never
717End:
GDB Binutils - Deliverables
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