[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
35c52694 L	1	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	PR binutils/2428
	4	* i386-dis.c (REP_Fixup): New function.
	5	(AL): Remove duplicate.
	6	(Xbr): New.
	7	(Xvr): Likewise.
	8	(Ybr): Likewise.
	9	(Yvr): Likewise.
	10	(indirDXr): Likewise.
	11	(ALr): Likewise.
	12	(eAXr): Likewise.
	13	(dis386): Updated entries of ins, outs, movs, lods and stos.
	14
ed963e2d NC	15	2006-03-05 Nick Clifton <nickc@redhat.com>
	16
	17	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	18	signed 32-bit value into an unsigned 32-bit field when the host is
	19	a 64-bit machine.
	20	* fr30-ibld.c: Regenerate.
	21	* frv-ibld.c: Regenerate.
	22	* ip2k-ibld.c: Regenerate.
	23	* iq2000-asm.c: Regenerate.
	24	* iq2000-ibld.c: Regenerate.
	25	* m32c-ibld.c: Regenerate.
	26	* m32r-ibld.c: Regenerate.
	27	* openrisc-ibld.c: Regenerate.
	28	* xc16x-ibld.c: Regenerate.
	29	* xstormy16-ibld.c: Regenerate.
	30
c7d41dc5 NC	31	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	32
	33	* xc16x-asm.c: Regenerate.
	34	* xc16x-dis.c: Regenerate.
c7d41dc5	35
f7d9e5c3 CD	36	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	37
	38	* po/Make-in: Add html target.
	39
331d2d0d L	40	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	41
	42	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	43	Intel Merom New Instructions.
	44	(THREE_BYTE_0): Likewise.
	45	(THREE_BYTE_1): Likewise.
	46	(three_byte_table): Likewise.
	47	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	48	THREE_BYTE_1 for entry 0x3a.
	49	(twobyte_has_modrm): Updated.
	50	(twobyte_uses_SSE_prefix): Likewise.
	51	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	52	Instructions.
	53
ff3f9d5b DM	54	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	55
	56	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	57	(v9_hpriv_reg_names): New table.
	58	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	59	New cases '$' and '%' for read/write hyperprivileged register.
	60	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	61	window handling and rdhpr/wrhpr instructions.
	62
6772dd07 DD	63	2006-02-24 DJ Delorie <dj@redhat.com>
	64
	65	* m32c-desc.c: Regenerate with linker relaxation attributes.
	66	* m32c-desc.h: Likewise.
	67	* m32c-dis.c: Likewise.
	68	* m32c-opc.c: Likewise.
	69
62b3e311 PB	70	2006-02-24 Paul Brook <paul@codesourcery.com>
	71
	72	* arm-dis.c (arm_opcodes): Add V7 instructions.
	73	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	74	(print_arm_address): New function.
	75	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	76	(psr_name): New function.
	77	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	78
59cf82fe L	79	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	80
	81	* ia64-opc-i.c (bXc): New.
	82	(mXc): Likewise.
	83	(OpX2TaTbYaXcC): Likewise.
	84	(TF). Likewise.
	85	(TFCM). Likewise.
	86	(ia64_opcodes_i): Add instructions for tf.
	87
	88	* ia64-opc.h (IMMU5b): New.
	89
	90	* ia64-asmtab.c: Regenerated.
	91
19a7219f L	92	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	93
	94	* ia64-gen.c: Update copyright years.
	95	* ia64-opc-b.c: Likewise.
	96
7f3dfb9c L	97	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	98
	99	* ia64-gen.c (lookup_regindex): Handle ".vm".
	100	(print_dependency_table): Handle '\"'.
	101
	102	* ia64-ic.tbl: Updated from SDM 2.2.
	103	* ia64-raw.tbl: Likewise.
	104	* ia64-waw.tbl: Likewise.
	105	* ia64-asmtab.c: Regenerated.
	106
	107	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	108
d70c5fc7 NC	109	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	110	Anil Paranjape <anilp1@kpitcummins.com>
	111	Shilin Shakti <shilins@kpitcummins.com>
	112
	113	* xc16x-desc.h: New file
	114	* xc16x-desc.c: New file
	115	* xc16x-opc.h: New file
	116	* xc16x-opc.c: New file
	117	* xc16x-ibld.c: New file
	118	* xc16x-asm.c: New file
	119	* xc16x-dis.c: New file
	120	* Makefile.am: Entries for xc16x
	121	* Makefile.in: Regenerate
	122	* cofigure.in: Add xc16x target information.
	123	* configure: Regenerate.
	124	* disassemble.c: Add xc16x target information.
	125
a1cfb73e L	126	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	127
	128	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	129	moves.
	130
6dd5059a L	131	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	132
	133	* i386-dis.c ('Z'): Add a new macro.
	134	(dis386_twobyte): Use "movZ" for control register moves.
	135
8536c657 NC	136	2006-02-10 Nick Clifton <nickc@redhat.com>
	137
	138	* iq2000-asm.c: Regenerate.
	139
266abb8f NS	140	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	141
	142	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	143
f1a64f49 DU	144	2006-01-26 David Ung <davidu@mips.com>
	145
	146	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	147	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	148	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	149	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	150	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	151
9e919b5f AM	152	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	153
	154	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	155	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	156	disassembled.
	157	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	158	buffer overflows when disassembling instructions like
	159	ld (ix+123),0x23
	160	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	161	operand, if the offset is negative.
	162
c9021189 AM	163	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	164
	165	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	166	unsigned char to hold data to be disassembled.
	167
d99b6465 AS	168	2006-01-17 Andreas Schwab <schwab@suse.de>
	169
	170	PR binutils/1486
	171	* disassemble.c (disassemble_init_for_target): Set
	172	disassembler_needs_relocs for bfd_arch_arm.
	173
c2fe9327 PB	174	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	175
e88d958a	176	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	177	f?add?, and f?sub? instructions.
c2fe9327 PB	178
32fba81d NC	179	2006-01-16 Nick Clifton <nickc@redhat.com>
	180
	181	* po/zh_CN.po: New Chinese (simplified) translation.
	182	* configure.in (ALL_LINGUAS): Add "zh_CH".
	183	* configure: Regenerate.
	184
1b3a26b5 PB	185	2006-01-05 Paul Brook <paul@codesourcery.com>
	186
	187	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	188
db313fa6 DD	189	2006-01-06 DJ Delorie <dj@redhat.com>
	190
	191	* m32c-desc.c: Regenerate.
	192	* m32c-opc.c: Regenerate.
	193	* m32c-opc.h: Regenerate.
	194
54d46aca DD	195	2006-01-03 DJ Delorie <dj@redhat.com>
	196
	197	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	198	* m32c-ibld.c: Regenerated.
	199
e88d958a	200	For older changes see ChangeLog-2005
252b5132 RH	201	\f
252b5132 RH	202	Local Variables:
2f6d2f85 NC	203	mode: change-log
	204	left-margin: 8
	205	fill-column: 74
252b5132 RH	206	version-control: never
252b5132 RH	207	End: