* gdb.texinfo (General Query Packets): Recommend not starting
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
cb6d3433
L
12006-05-09 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
4
1f3c39b9
JB
52006-05-05 Julian Brown <julian@codesourcery.com>
6
7 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
8 vldm/vstm.
9
d43b4baf
TS
102006-05-05 Thiemo Seufer <ths@mips.com>
11 David Ung <davidu@mips.com>
12
13 * mips-opc.c: Add macro for cache instruction.
14
39a7806d
TS
152006-05-04 Thiemo Seufer <ths@mips.com>
16 Nigel Stephens <nigel@mips.com>
17 David Ung <davidu@mips.com>
18
19 * mips-dis.c (mips_arch_choices): Add smartmips instruction
20 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
21 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
22 MIPS64R2.
23 * mips-opc.c: fix random typos in comments.
24 (INSN_SMARTMIPS): New defines.
25 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
26 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
27 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
28 FP_S and FP_D flags to denote single and double register
29 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
30 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
31 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
32 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
33 release 2 ISAs.
34 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
35
104b4fab
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362006-05-03 Thiemo Seufer <ths@mips.com>
37
38 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
39
022fac6d
TS
402006-05-02 Thiemo Seufer <ths@mips.com>
41 Nigel Stephens <nigel@mips.com>
42 David Ung <davidu@mips.com>
43
44 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
45 (print_mips16_insn_arg): Force mips16 to odd addresses.
46
9bcd4f99
TS
472006-04-30 Thiemo Seufer <ths@mips.com>
48 David Ung <davidu@mips.com>
49
50 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
51 "udi0" to "udi15".
52 * mips-dis.c (print_insn_args): Adds udi argument handling.
53
f095b97b
JW
542006-04-28 James E Wilson <wilson@specifix.com>
55
56 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
57 error message.
58
59c455b3
TS
592006-04-28 Thiemo Seufer <ths@mips.com>
60 David Ung <davidu@mips.com>
bdb09db1 61 Nigel Stephens <nigel@mips.com>
59c455b3
TS
62
63 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
64 names.
65
cc0ca239 662006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 67 Nigel Stephens <nigel@mips.com>
cc0ca239
TS
68 David Ung <davidu@mips.com>
69
70 * mips-dis.c (print_insn_args): Add mips_opcode argument.
71 (print_insn_mips): Adjust print_insn_args call.
72
0d09bfe6 732006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 74 Nigel Stephens <nigel@mips.com>
0d09bfe6
TS
75
76 * mips-dis.c (print_insn_args): Print $fcc only for FP
77 instructions, use $cc elsewise.
78
654c225a 792006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 80 Nigel Stephens <nigel@mips.com>
654c225a
TS
81
82 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
83 Map MIPS16 registers to O32 names.
84 (print_mips16_insn_arg): Use mips16_reg_names.
85
0dbde4cf
JB
862006-04-26 Julian Brown <julian@codesourcery.com>
87
88 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
89 VMOV.
90
16980d0b
JB
912006-04-26 Nathan Sidwell <nathan@codesourcery.com>
92 Julian Brown <julian@codesourcery.com>
93
94 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
95 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
96 Add unified load/store instruction names.
97 (neon_opcode_table): New.
98 (arm_opcodes): Expand meaning of %<bitfield>['`?].
99 (arm_decode_bitfield): New.
100 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
101 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
102 (print_insn_neon): New.
103 (print_insn_arm): Adjust print_insn_coprocessor call. Call
104 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
105 (print_insn_thumb32): Likewise.
106
ec3fcc56
AM
1072006-04-19 Alan Modra <amodra@bigpond.net.au>
108
109 * Makefile.am: Run "make dep-am".
110 * Makefile.in: Regenerate.
111
241a6c40
AM
1122006-04-19 Alan Modra <amodra@bigpond.net.au>
113
7c6646cd
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114 * avr-dis.c (avr_operand): Warning fix.
115
241a6c40
AM
116 * configure: Regenerate.
117
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DJ
1182006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
119
120 * po/POTFILES.in: Regenerated.
121
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1222006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
123
124 PR binutils/2454
125 * avr-dis.c (avr_operand): Arrange for a comment to appear before
126 the symolic form of an address, so that the output of objdump -d
127 can be reassembled.
128
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DD
1292006-04-10 DJ Delorie <dj@redhat.com>
130
131 * m32c-asm.c: Regenerate.
132
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1332006-04-06 Carlos O'Donell <carlos@codesourcery.com>
134
135 * Makefile.am: Add install-html target.
136 * Makefile.in: Regenerate.
137
a135cb2c
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1382006-04-06 Nick Clifton <nickc@redhat.com>
139
140 * po/vi/po: Updated Vietnamese translation.
141
47426b41
AM
1422006-03-31 Paul Koning <ni1d@arrl.net>
143
144 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
145
331f1cbe
BS
1462006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
147
148 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
149 logic to identify halfword shifts.
150
c16d2bf0
PB
1512006-03-16 Paul Brook <paul@codesourcery.com>
152
153 * arm-dis.c (arm_opcodes): Rename swi to svc.
154 (thumb_opcodes): Ditto.
155
5348b81e
DD
1562006-03-13 DJ Delorie <dj@redhat.com>
157
5398310a
DD
158 * m32c-asm.c: Regenerate.
159 * m32c-desc.c: Likewise.
160 * m32c-desc.h: Likewise.
161 * m32c-dis.c: Likewise.
162 * m32c-ibld.c: Likewise.
5348b81e
DD
163 * m32c-opc.c: Likewise.
164 * m32c-opc.h: Likewise.
165
253d272c
DD
1662006-03-10 DJ Delorie <dj@redhat.com>
167
168 * m32c-desc.c: Regenerate with mul.l, mulu.l.
169 * m32c-opc.c: Likewise.
170 * m32c-opc.h: Likewise.
171
172
f530741d
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1732006-03-09 Nick Clifton <nickc@redhat.com>
174
175 * po/sv.po: Updated Swedish translation.
176
35c52694
L
1772006-03-07 H.J. Lu <hongjiu.lu@intel.com>
178
179 PR binutils/2428
180 * i386-dis.c (REP_Fixup): New function.
181 (AL): Remove duplicate.
182 (Xbr): New.
183 (Xvr): Likewise.
184 (Ybr): Likewise.
185 (Yvr): Likewise.
186 (indirDXr): Likewise.
187 (ALr): Likewise.
188 (eAXr): Likewise.
189 (dis386): Updated entries of ins, outs, movs, lods and stos.
190
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NC
1912006-03-05 Nick Clifton <nickc@redhat.com>
192
193 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
194 signed 32-bit value into an unsigned 32-bit field when the host is
195 a 64-bit machine.
196 * fr30-ibld.c: Regenerate.
197 * frv-ibld.c: Regenerate.
198 * ip2k-ibld.c: Regenerate.
199 * iq2000-asm.c: Regenerate.
200 * iq2000-ibld.c: Regenerate.
201 * m32c-ibld.c: Regenerate.
202 * m32r-ibld.c: Regenerate.
203 * openrisc-ibld.c: Regenerate.
204 * xc16x-ibld.c: Regenerate.
205 * xstormy16-ibld.c: Regenerate.
206
c7d41dc5
NC
2072006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
208
209 * xc16x-asm.c: Regenerate.
210 * xc16x-dis.c: Regenerate.
c7d41dc5 211
f7d9e5c3
CD
2122006-02-27 Carlos O'Donell <carlos@codesourcery.com>
213
214 * po/Make-in: Add html target.
215
331d2d0d
L
2162006-02-27 H.J. Lu <hongjiu.lu@intel.com>
217
218 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
219 Intel Merom New Instructions.
220 (THREE_BYTE_0): Likewise.
221 (THREE_BYTE_1): Likewise.
222 (three_byte_table): Likewise.
223 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
224 THREE_BYTE_1 for entry 0x3a.
225 (twobyte_has_modrm): Updated.
226 (twobyte_uses_SSE_prefix): Likewise.
227 (print_insn): Handle 3-byte opcodes used by Intel Merom New
228 Instructions.
229
ff3f9d5b
DM
2302006-02-24 David S. Miller <davem@sunset.davemloft.net>
231
232 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
233 (v9_hpriv_reg_names): New table.
234 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
235 New cases '$' and '%' for read/write hyperprivileged register.
236 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
237 window handling and rdhpr/wrhpr instructions.
238
6772dd07
DD
2392006-02-24 DJ Delorie <dj@redhat.com>
240
241 * m32c-desc.c: Regenerate with linker relaxation attributes.
242 * m32c-desc.h: Likewise.
243 * m32c-dis.c: Likewise.
244 * m32c-opc.c: Likewise.
245
62b3e311
PB
2462006-02-24 Paul Brook <paul@codesourcery.com>
247
248 * arm-dis.c (arm_opcodes): Add V7 instructions.
249 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
250 (print_arm_address): New function.
251 (print_insn_arm): Use it. Add 'P' and 'U' cases.
252 (psr_name): New function.
253 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
254
59cf82fe
L
2552006-02-23 H.J. Lu <hongjiu.lu@intel.com>
256
257 * ia64-opc-i.c (bXc): New.
258 (mXc): Likewise.
259 (OpX2TaTbYaXcC): Likewise.
260 (TF). Likewise.
261 (TFCM). Likewise.
262 (ia64_opcodes_i): Add instructions for tf.
263
264 * ia64-opc.h (IMMU5b): New.
265
266 * ia64-asmtab.c: Regenerated.
267
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L
2682006-02-23 H.J. Lu <hongjiu.lu@intel.com>
269
270 * ia64-gen.c: Update copyright years.
271 * ia64-opc-b.c: Likewise.
272
7f3dfb9c
L
2732006-02-22 H.J. Lu <hongjiu.lu@intel.com>
274
275 * ia64-gen.c (lookup_regindex): Handle ".vm".
276 (print_dependency_table): Handle '\"'.
277
278 * ia64-ic.tbl: Updated from SDM 2.2.
279 * ia64-raw.tbl: Likewise.
280 * ia64-waw.tbl: Likewise.
281 * ia64-asmtab.c: Regenerated.
282
283 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
284
d70c5fc7
NC
2852006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
286 Anil Paranjape <anilp1@kpitcummins.com>
287 Shilin Shakti <shilins@kpitcummins.com>
288
289 * xc16x-desc.h: New file
290 * xc16x-desc.c: New file
291 * xc16x-opc.h: New file
292 * xc16x-opc.c: New file
293 * xc16x-ibld.c: New file
294 * xc16x-asm.c: New file
295 * xc16x-dis.c: New file
296 * Makefile.am: Entries for xc16x
297 * Makefile.in: Regenerate
298 * cofigure.in: Add xc16x target information.
299 * configure: Regenerate.
300 * disassemble.c: Add xc16x target information.
301
a1cfb73e
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3022006-02-11 H.J. Lu <hongjiu.lu@intel.com>
303
304 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
305 moves.
306
6dd5059a
L
3072006-02-11 H.J. Lu <hongjiu.lu@intel.com>
308
309 * i386-dis.c ('Z'): Add a new macro.
310 (dis386_twobyte): Use "movZ" for control register moves.
311
8536c657
NC
3122006-02-10 Nick Clifton <nickc@redhat.com>
313
314 * iq2000-asm.c: Regenerate.
315
266abb8f
NS
3162006-02-07 Nathan Sidwell <nathan@codesourcery.com>
317
318 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
319
f1a64f49
DU
3202006-01-26 David Ung <davidu@mips.com>
321
322 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
323 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
324 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
325 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
326 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
327
9e919b5f
AM
3282006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
329
330 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
331 ld_d_r, pref_xd_cb): Use signed char to hold data to be
332 disassembled.
333 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
334 buffer overflows when disassembling instructions like
335 ld (ix+123),0x23
336 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
337 operand, if the offset is negative.
338
c9021189
AM
3392006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
340
341 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
342 unsigned char to hold data to be disassembled.
343
d99b6465
AS
3442006-01-17 Andreas Schwab <schwab@suse.de>
345
346 PR binutils/1486
347 * disassemble.c (disassemble_init_for_target): Set
348 disassembler_needs_relocs for bfd_arch_arm.
349
c2fe9327
PB
3502006-01-16 Paul Brook <paul@codesourcery.com>
351
e88d958a 352 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327
PB
353 f?add?, and f?sub? instructions.
354
32fba81d
NC
3552006-01-16 Nick Clifton <nickc@redhat.com>
356
357 * po/zh_CN.po: New Chinese (simplified) translation.
358 * configure.in (ALL_LINGUAS): Add "zh_CH".
359 * configure: Regenerate.
360
1b3a26b5
PB
3612006-01-05 Paul Brook <paul@codesourcery.com>
362
363 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
364
db313fa6
DD
3652006-01-06 DJ Delorie <dj@redhat.com>
366
367 * m32c-desc.c: Regenerate.
368 * m32c-opc.c: Regenerate.
369 * m32c-opc.h: Regenerate.
370
54d46aca
DD
3712006-01-03 DJ Delorie <dj@redhat.com>
372
373 * cgen-ibld.in (extract_normal): Avoid memory range errors.
374 * m32c-ibld.c: Regenerated.
375
e88d958a 376For older changes see ChangeLog-2005
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377\f
378Local Variables:
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379mode: change-log
380left-margin: 8
381fill-column: 74
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382version-control: never
383End:
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