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2005-11-02 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
36b0c57d
PB		 12005-11-02 Paul Brook <paul@codesourcery.com>
2
3 * arm-dis.c (print_insn_thumb32): Word align blx target address.
4
9a2ff3f5
AM		 52005-10-31 Alan Modra <amodra@bigpond.net.au>
6
7 * arm-dis.c (print_insn): Warning fix.
8
9e5169a8
L		 92005-10-30 H.J. Lu <hongjiu.lu@intel.com>
10
11 * Makefile.am: Run "make dep-am".
12 * Makefile.in: Regenerated.
13
14 * dep-in.sed: Replace " ./" with " ".
15
fb53f5a8
DB		 162005-10-28 Dave Brolley <brolley@redhat.com>
17
18 * All CGEN-generated sources: Regenerate.
19
20 Contribute the following changes:
21 2005-09-19 Dave Brolley <brolley@redhat.com>
22
23 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
24 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
25 bfd_arch_m32c case.
26
27 2005-02-16 Dave Brolley <brolley@redhat.com>
28
29 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
30 cgen_isa_mask_* to cgen_bitset_*.
31 * cgen-opc.c: Likewise.
32
33 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
34
35 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
36 * *-dis.c: Regenerate.
37
38 2003-06-05 DJ Delorie <dj@redhat.com>
39
40 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
41 it, as it may point to a reused buffer. Set prev_isas when we
42 change cpus.
43
44 2002-12-13 Dave Brolley <brolley@redhat.com>
45
46 * cgen-opc.c (cgen_isa_mask_create): New support function for
47 CGEN_ISA_MASK.
48 (cgen_isa_mask_init): Ditto.
49 (cgen_isa_mask_clear): Ditto.
50 (cgen_isa_mask_add): Ditto.
51 (cgen_isa_mask_set): Ditto.
52 (cgen_isa_supported): Ditto.
53 (cgen_isa_mask_compare): Ditto.
54 (cgen_isa_mask_intersection): Ditto.
55 (cgen_isa_mask_copy): Ditto.
56 (cgen_isa_mask_combine): Ditto.
57 * cgen-dis.in (libiberty.h): #include it.
58 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
59 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
60 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
61 * Makefile.in: Regenerated.
62
c6552317
DD		 632005-10-27 DJ Delorie <dj@redhat.com>
64
65 * m32c-asm.c: Regenerate.
66 * m32c-desc.c: Regenerate.
67 * m32c-desc.h: Regenerate.
68 * m32c-dis.c: Regenerate.
69 * m32c-ibld.c: Regenerate.
70 * m32c-opc.c: Regenerate.
71 * m32c-opc.h: Regenerate.
72
f75eb1c0
DD		 732005-10-26 DJ Delorie <dj@redhat.com>
74
75 * m32c-asm.c: Regenerate.
76 * m32c-desc.c: Regenerate.
77 * m32c-desc.h: Regenerate.
78 * m32c-dis.c: Regenerate.
79 * m32c-ibld.c: Regenerate.
80 * m32c-opc.c: Regenerate.
81 * m32c-opc.h: Regenerate.
82
f1022c90
PB		 832005-10-26 Paul Brook <paul@codesourcery.com>
84
85 * arm-dis.c (arm_opcodes): Correct "sel" entry.
86
e277c00b
AM		 872005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
88
89 * m32r-asm.c: Regenerate.
90
92e0a941
DD		 912005-10-25 DJ Delorie <dj@redhat.com>
92
93 * m32c-asm.c: Regenerate.
94 * m32c-desc.c: Regenerate.
95 * m32c-desc.h: Regenerate.
96 * m32c-dis.c: Regenerate.
97 * m32c-ibld.c: Regenerate.
98 * m32c-opc.c: Regenerate.
99 * m32c-opc.h: Regenerate.
100
3c9b82ba
NC		 1012005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
102
103 * configure.in: Add target architecture bfd_arch_z80.
104 * configure: Regenerated.
105 * disassemble.c (disassembler)<ARCH_z80>: Add case
106 bfd_arch_z80.
107 * z80-dis.c: New file.
108
3caac5b8
AM		 1092005-10-25 Alan Modra <amodra@bigpond.net.au>
110
111 * po/POTFILES.in: Regenerate.
112 * po/opcodes.pot: Regenerate.
113
6a2375c6
JB		 1142005-10-24 Jan Beulich <jbeulich@novell.com>
115
116 * ia64-asmtab.c: Regenerate.
117
a1a280bb
DD		 1182005-10-21 DJ Delorie <dj@redhat.com>
119
120 * m32c-asm.c: Regenerate.
121 * m32c-desc.c: Regenerate.
122 * m32c-desc.h: Regenerate.
123 * m32c-dis.c: Regenerate.
124 * m32c-ibld.c: Regenerate.
125 * m32c-opc.c: Regenerate.
126 * m32c-opc.h: Regenerate.
127
b7d48530
NC		 1282005-10-21 Nick Clifton <nickc@redhat.com>
129
130 * bfin-dis.c: Tidy up code, removing redundant constructs.
131
8dd744b6
MS		 1322005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
133
134 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
135 instructions.
136
e74eb924
NC		 1372005-10-18 Nick Clifton <nickc@redhat.com>
138
139 * m32r-asm.c: Regenerate after updating m32r.opc.
140
471e4e36
JZ		 1412005-10-18 Jie Zhang <jie.zhang@analog.com>
142
143 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
144 reading instruction from memory.
145
5e03663f
NC		 1462005-10-18 Nick Clifton <nickc@redhat.com>
147
148 * m32r-asm.c: Regenerate after updating m32r.opc.
149
ab7c9a26
NC		 1502005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
151
152 * m32r-asm.c: Regenerate after updating m32r.opc.
153
19590ef7
RE		 1542005-10-08 James Lemke <jim@wasabisystems.com>
155
156 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
157 operations.
158
6edfbbad
DJ		 1592005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
160
161 * ppc-dis.c (struct dis_private): Remove.
162 (powerpc_dialect): Avoid aliasing warnings.
163 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
164
095f2843
NC		 1652005-09-30 Nick Clifton <nickc@redhat.com>
166
167 * po/ga.po: New Irish translation.
168 * configure.in (ALL_LINGUAS): Add "ga".
169 * configure: Regenerate.
170
fdd3b9b3
L		 1712005-09-30 H.J. Lu <hongjiu.lu@intel.com>
172
173 * Makefile.am: Run "make dep-am".
174 * Makefile.in: Regenerated.
175 * aclocal.m4: Likewise.
176 * configure: Likewise.
177
4b7f6baa
CM		 1782005-09-30 Catherine Moore <clm@cm00re.com>
179
180 * Makefile.am: Bfin support.
181 * Makefile.in: Regenerated.
182 * aclocal.m4: Regenerated.
183 * bfin-dis.c: New file.
184 * configure.in: Bfin support.
185 * configure: Regenerated.
186 * disassemble.c (ARCH_bfin): Define.
187 (disassembler): Add case for bfd_arch_bfin.
188
1a114b12
JB		 1892005-09-28 Jan Beulich <jbeulich@novell.com>
190
191 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
192 (indirEv): Use it.
193 (stackEv): New.
194 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
195 (dis386): Document and use new 'V' meta character. Use it for
196 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
197 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
198 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
199 data prefix as used whenever DFLAG was examined. Handle 'V'.
200 (intel_operand_size): Use stack_v_mode.
201 (OP_E): Use stack_v_mode, but handle only the special case of
202 64-bit mode without operand size override here; fall through to
203 v_mode case otherwise.
204 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
205 and no operand size override is present.
206 (OP_J): Use get32s for obtaining the displacement also when rex64
207 is present.
208
3eb17e6b
PB		 2092005-09-08 Paul Brook <paul@codesourcery.com>
210
211 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
212
61cc0267
CF		 2132005-09-06 Chao-ying Fu <fu@mips.com>
214
215 * mips-opc.c (MT32): New define.
216 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
217 bottom to avoid opcode collision with "mftr" and "mttr".
218 Add MT instructions.
219 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
220 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
221 formats.
222
b13dd07a
PB		 2232005-09-02 Paul Brook <paul@codesourcery.com>
224
225 * arm-dis.c (coprocessor_opcodes): Add null terminator.
226
8f06b2d8
PB		 2272005-09-02 Paul Brook <paul@codesourcery.com>
228
229 * arm-dis.c (coprocessor_opcodes): New.
230 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
231 (print_insn_coprocessor): New function.
232 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
233 format characters.
234 (print_insn_thumb32): Use print_insn_coprocessor.
235
a2dfd01f
PB		 2362005-08-30 Paul Brook <paul@codesourcery.com>
237
238 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
239
3f31e633
JB		 2402005-08-26 Jan Beulich <jbeulich@novell.com>
241
242 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
243 re-use.
244 (OP_E): Call intel_operand_size, move call site out of mode
245 dependent code.
246 (OP_OFF): Call intel_operand_size if suffix_always. Remove
247 ATTRIBUTE_UNUSED from parameters.
248 (OP_OFF64): Likewise.
249 (OP_ESreg): Call intel_operand_size.
250 (OP_DSreg): Likewise.
251 (OP_DIR): Use colon rather than semicolon as separator of far
252 jump/call operands.
253
fd25c5a9
CF		 2542005-08-25 Chao-ying Fu <fu@mips.com>
255
256 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
257 (mips_builtin_opcodes): Add DSP instructions.
258 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
259 mips64, mips64r2.
260 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
261 operand formats.
262
dd8b7c22
DU		 2632005-08-23 David Ung <davidu@mips.com>
264
265 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
266 instructions to the table.
267
c17ae8a2
AM		 2682005-08-18 Alan Modra <amodra@bigpond.net.au>
269
848cf006 270 * a29k-dis.c: Delete.
c17ae8a2
AM		 271 * Makefile.am: Remove a29k support.
272 * configure.in: Likewise.
273 * disassemble.c: Likewise.
274 * Makefile.in: Regenerate.
275 * configure: Regenerate.
276 * po/POTFILES.in: Regenerate.
277
36ae0db3
DJ		 2782005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
279
280 * ppc-dis.c (powerpc_dialect): Handle e300.
281 (print_ppc_disassembler_options): Likewise.
282 * ppc-opc.c (PPCE300): Define.
283 (powerpc_opcodes): Mark icbt as available for the e300.
284
63a3357b
DA		 2852005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
286
287 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
288 Use "rp" instead of "%r2" in "b,l" insns.
289
ad101263
MS		 2902005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
291
292 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
293 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
294 (main): Likewise.
295 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
296 and 4 bit optional masks.
297 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
298 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
299 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
300 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
301 (s390_opformats): Likewise.
302 * s390-opc.txt: Add new instructions for cpu type z9-109.
303
f1fa1093
DA		 3042005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
305
306 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
307
e9f89963
PB		 3082005-07-29 Paul Brook <paul@codesourcery.com>
309
310 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
311
92e90b6e
PB		 3122005-07-29 Paul Brook <paul@codesourcery.com>
313
314 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
315 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
316
fd54057a
DD		 3172005-07-25 DJ Delorie <dj@redhat.com>
318
319 * m32c-asm.c Regenerate.
320 * m32c-dis.c Regenerate.
321
760c0f6a
DD		 3222005-07-20 DJ Delorie <dj@redhat.com>
323
324 * disassemble.c (disassemble_init_for_target): M32C ISAs are
325 enums, so convert them to bit masks, which attributes are.
326
85da3a56
NC		 3272005-07-18 Nick Clifton <nickc@redhat.com>
328
329 * configure.in: Restore alpha ordering to list of arches.
330 * configure: Regenerate.
331 * disassemble.c: Restore alpha ordering to list of arches.
332
3332005-07-18 Nick Clifton <nickc@redhat.com>
334
335 * m32c-asm.c: Regenerate.
336 * m32c-desc.c: Regenerate.
337 * m32c-desc.h: Regenerate.
338 * m32c-dis.c: Regenerate.
339 * m32c-ibld.h: Regenerate.
340 * m32c-opc.c: Regenerate.
341 * m32c-opc.h: Regenerate.
342
22cbf2e7
L		 3432005-07-18 H.J. Lu <hongjiu.lu@intel.com>
344
345 * i386-dis.c (PNI_Fixup): Update comment.
346 (VMX_Fixup): Properly handle the suffix check.
347
0aea0460
DA		 3482005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
349
350 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
351 mfctl disassembly.
352
0f82ff91
AM		 3532005-07-16 Alan Modra <amodra@bigpond.net.au>
354
355 * Makefile.am: Run "make dep-am".
356 (stamp-m32c): Fix cpu dependencies.
357 * Makefile.in: Regenerate.
358 * ip2k-dis.c: Regenerate.
359
90700ea2
L		 3602007-07-15 H.J. Lu <hongjiu.lu@intel.com>
361
362 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
363 (VMX_Fixup): New. Fix up Intel VMX Instructions.
364 (Em): New.
365 (Gm): New.
366 (VM): New.
367 (dis386_twobyte): Updated entries 0x78 and 0x79.
368 (twobyte_has_modrm): Likewise.
369 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
370 (OP_G): Handle m_mode.
371
49f58d10
JB		 3722005-07-14 Jim Blandy <jimb@redhat.com>
373
374 Add support for the Renesas M32C and M16C.
375 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
376 * m32c-desc.h, m32c-opc.h: New.
377 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
378 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
379 m32c-opc.c.
380 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
381 m32c-ibld.lo, m32c-opc.lo.
382 (CLEANFILES): List stamp-m32c.
383 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
384 (CGEN_CPUS): Add m32c.
385 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
386 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
387 (m32c_opc_h): New variable.
388 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
389 (m32c-opc.lo): New rules.
390 * Makefile.in: Regenerated.
391 * configure.in: Add case for bfd_m32c_arch.
392 * configure: Regenerated.
393 * disassemble.c (ARCH_m32c): New.
394 [ARCH_m32c]: #include "m32c-desc.h".
395 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
396 (disassemble_init_for_target) [ARCH_m32c]: Same.
397
398 * cgen-ops.h, cgen-types.h: New files.
399 * Makefile.am (HFILES): List them.
400 * Makefile.in: Regenerated.
401
0fd3a477
JW		 4022005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
403
404 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
405 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
406 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
407 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
408 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
409 v850-dis.c: Fix format bugs.
410 * ia64-gen.c (fail, warn): Add format attribute.
411 * or32-opc.c (debug): Likewise.
412
22f8fcbd
NC		 4132005-07-07 Khem Raj <kraj@mvista.com>
414
415 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
416 disassembly pattern.
417
d125c27b
AM		 4182005-07-06 Alan Modra <amodra@bigpond.net.au>
419
420 * Makefile.am (stamp-m32r): Fix path to cpu files.
421 (stamp-m32r, stamp-iq2000): Likewise.
422 * Makefile.in: Regenerate.
423 * m32r-asm.c: Regenerate.
424 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
425 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
426
3ec2b351
NC		 4272005-07-05 Nick Clifton <nickc@redhat.com>
428
429 * iq2000-asm.c: Regenerate.
430 * ms1-asm.c: Regenerate.
431
30123838
JB		 4322005-07-05 Jan Beulich <jbeulich@novell.com>
433
434 * i386-dis.c (SVME_Fixup): New.
435 (grps): Use it for the lidt entry.
436 (PNI_Fixup): Call OP_M rather than OP_E.
437 (INVLPG_Fixup): Likewise.
438
b0eec63e
L		 4392005-07-04 H.J. Lu <hongjiu.lu@intel.com>
440
441 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
442
47b0e7ad
NC		 4432005-07-01 Nick Clifton <nickc@redhat.com>
444
445 * a29k-dis.c: Update to ISO C90 style function declarations and
446 fix formatting.
447 * alpha-opc.c: Likewise.
448 * arc-dis.c: Likewise.
449 * arc-opc.c: Likewise.
450 * avr-dis.c: Likewise.
451 * cgen-asm.in: Likewise.
452 * cgen-dis.in: Likewise.
453 * cgen-ibld.in: Likewise.
454 * cgen-opc.c: Likewise.
455 * cris-dis.c: Likewise.
456 * d10v-dis.c: Likewise.
457 * d30v-dis.c: Likewise.
458 * d30v-opc.c: Likewise.
459 * dis-buf.c: Likewise.
460 * dlx-dis.c: Likewise.
461 * h8300-dis.c: Likewise.
462 * h8500-dis.c: Likewise.
463 * hppa-dis.c: Likewise.
464 * i370-dis.c: Likewise.
465 * i370-opc.c: Likewise.
466 * m10200-dis.c: Likewise.
467 * m10300-dis.c: Likewise.
468 * m68k-dis.c: Likewise.
469 * m88k-dis.c: Likewise.
470 * mips-dis.c: Likewise.
471 * mmix-dis.c: Likewise.
472 * msp430-dis.c: Likewise.
473 * ns32k-dis.c: Likewise.
474 * or32-dis.c: Likewise.
475 * or32-opc.c: Likewise.
476 * pdp11-dis.c: Likewise.
477 * pj-dis.c: Likewise.
478 * s390-dis.c: Likewise.
479 * sh-dis.c: Likewise.
480 * sh64-dis.c: Likewise.
481 * sparc-dis.c: Likewise.
482 * sparc-opc.c: Likewise.
483 * sysdep.h: Likewise.
484 * tic30-dis.c: Likewise.
485 * tic4x-dis.c: Likewise.
486 * tic80-dis.c: Likewise.
487 * v850-dis.c: Likewise.
488 * v850-opc.c: Likewise.
489 * vax-dis.c: Likewise.
490 * w65-dis.c: Likewise.
491 * z8kgen.c: Likewise.
492
493 * fr30-*: Regenerate.
494 * frv-*: Regenerate.
495 * ip2k-*: Regenerate.
496 * iq2000-*: Regenerate.
497 * m32r-*: Regenerate.
498 * ms1-*: Regenerate.
499 * openrisc-*: Regenerate.
500 * xstormy16-*: Regenerate.
501
cc16ba8c
BE		 5022005-06-23 Ben Elliston <bje@gnu.org>
503
504 * m68k-dis.c: Use ISC C90.
505 * m68k-opc.c: Formatting fixes.
506
4b185e97
DU		 5072005-06-16 David Ung <davidu@mips.com>
508
509 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
510 instructions to the table; seb/seh/sew/zeb/zeh/zew.
511
ac188222
DB		 5122005-06-15 Dave Brolley <brolley@redhat.com>
513
514 Contribute Morpho ms1 on behalf of Red Hat
515 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
516 ms1-opc.h: New files, Morpho ms1 target.
517
518 2004-05-14 Stan Cox <scox@redhat.com>
519
520 * disassemble.c (ARCH_ms1): Define.
521 (disassembler): Handle bfd_arch_ms1
522
523 2004-05-13 Michael Snyder <msnyder@redhat.com>
524
525 * Makefile.am, Makefile.in: Add ms1 target.
526 * configure.in: Ditto.
527
6b5d3a4d
ZW		 5282005-06-08 Zack Weinberg <zack@codesourcery.com>
529
530 * arm-opc.h: Delete; fold contents into ...
531 * arm-dis.c: ... here. Move includes of internal COFF headers
532 next to includes of internal ELF headers.
533 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
534 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
535 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
536 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
537 (iwmmxt_wwnames, iwmmxt_wwssnames):
538 Make const.
539 (regnames): Remove iWMMXt coprocessor register sets.
540 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
541 (get_arm_regnames): Adjust fourth argument to match above changes.
542 (set_iwmmxt_regnames): Delete.
543 (print_insn_arm): Constify 'c'. Use ISO syntax for function
544 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
545 and iwmmxt_cregnames, not set_iwmmxt_regnames.
546 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
547 ISO syntax for function pointer calls.
548
4a5329c6
ZW		 5492005-06-07 Zack Weinberg <zack@codesourcery.com>
550
551 * arm-dis.c: Split up the comments describing the format codes, so
552 that the ARM and 16-bit Thumb opcode tables each have comments
553 preceding them that describe all the codes, and only the codes,
554 valid in those tables. (32-bit Thumb table is already like this.)
555 Reorder the lists in all three comments to match the order in
556 which the codes are implemented.
557 Remove all forward declarations of static functions. Convert all
558 function definitions to ISO C format.
559 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
560 Return nothing.
561 (print_insn_thumb16): Remove unused case 'I'.
562 (print_insn): Update for changed calling convention of subroutines.
563
3d456fa1
JB		 5642005-05-25 Jan Beulich <jbeulich@novell.com>
565
566 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
567 hex (but retain it being displayed as signed). Remove redundant
568 checks. Add handling of displacements for 16-bit addressing in Intel
569 mode.
570
2888cb7a
JB		 5712005-05-25 Jan Beulich <jbeulich@novell.com>
572
573 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
574 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
575 masking of 'rm' in 16-bit memory address handling.
576
1ed8e1e4
AM		 5772005-05-19 Anton Blanchard <anton@samba.org>
578
579 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
580 (print_ppc_disassembler_options): Document it.
581 * ppc-opc.c (SVC_LEV): Define.
582 (LEV): Allow optional operand.
583 (POWER5): Define.
584 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
585 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
586
49cc2e69
KC		 5872005-05-19 Kelley Cook <kcook@gcc.gnu.org>
588
589 * Makefile.in: Regenerate.
590
c19d1205
ZW		 5912005-05-17 Zack Weinberg <zack@codesourcery.com>
592
593 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
594 instructions. Adjust disassembly of some opcodes to match
595 unified syntax.
596 (thumb32_opcodes): New table.
597 (print_insn_thumb): Rename print_insn_thumb16; don't handle
598 two-halfword branches here.
599 (print_insn_thumb32): New function.
600 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
601 and print_insn_thumb32. Be consistent about order of
602 halfwords when printing 32-bit instructions.
603
003519a7
L		 6042005-05-07 H.J. Lu <hongjiu.lu@intel.com>
605
606 PR 843
607 * i386-dis.c (branch_v_mode): New.
608 (indirEv): Use branch_v_mode instead of v_mode.
609 (OP_E): Handle branch_v_mode.
610
920a34a7
L		 6112005-05-07 H.J. Lu <hongjiu.lu@intel.com>
612
613 * d10v-dis.c (dis_2_short): Support 64bit host.
614
5de773c1
NC		 6152005-05-07 Nick Clifton <nickc@redhat.com>
616
617 * po/nl.po: Updated translation.
618
f4321104
NC		 6192005-05-07 Nick Clifton <nickc@redhat.com>
620
621 * Update the address and phone number of the FSF organization in
622 the GPL notices in the following files:
623 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
624 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
625 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
626 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
627 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
628 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
629 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
630 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
631 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
632 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
633 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
634 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
635 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
636 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
637 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
638 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
639 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
640 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
641 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
642 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
643 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
644 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
645 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
646 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
647 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
648 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
649 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
650 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
651 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
652 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
653 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
654 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
655 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
656
10b076a2
JW		 6572005-05-05 James E Wilson <wilson@specifixinc.com>
658
659 * ia64-opc.c: Include sysdep.h before libiberty.h.
660
022716b6
NC		 6612005-05-05 Nick Clifton <nickc@redhat.com>
662
663 * configure.in (ALL_LINGUAS): Add vi.
664 * configure: Regenerate.
665 * po/vi.po: New.
666
db5152b4
JG		 6672005-04-26 Jerome Guitton <guitton@gnat.com>
668
669 * configure.in: Fix the check for basename declaration.
670 * configure: Regenerate.
671
eed0d89a
AM		 6722005-04-19 Alan Modra <amodra@bigpond.net.au>
673
674 * ppc-opc.c (RTO): Define.
675 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
676 entries to suit PPC440.
677
791fe849
MK		 6782005-04-18 Mark Kettenis <kettenis@gnu.org>
679
680 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
681 Add xcrypt-ctr.
682
ffe58f7c
NC		 6832005-04-14 Nick Clifton <nickc@redhat.com>
684
685 * po/fi.po: New translation: Finnish.
686 * configure.in (ALL_LINGUAS): Add fi.
687 * configure: Regenerate.
688
9e9b66a9
AM		 6892005-04-14 Alan Modra <amodra@bigpond.net.au>
690
691 * Makefile.am (NO_WERROR): Define.
692 * configure.in: Invoke AM_BINUTILS_WARNINGS.
693 * Makefile.in: Regenerate.
694 * aclocal.m4: Regenerate.
695 * configure: Regenerate.
696
9494d739
NC		 6972005-04-04 Nick Clifton <nickc@redhat.com>
698
699 * fr30-asm.c: Regenerate.
700 * frv-asm.c: Regenerate.
701 * iq2000-asm.c: Regenerate.
702 * m32r-asm.c: Regenerate.
703 * openrisc-asm.c: Regenerate.
704
6128c599
JB		 7052005-04-01 Jan Beulich <jbeulich@novell.com>
706
707 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
708 visible operands in Intel mode. The first operand of monitor is
709 %rax in 64-bit mode.
710
373ff435
JB		 7112005-04-01 Jan Beulich <jbeulich@novell.com>
712
713 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
714 easier future additions.
715
4bd60896
JG		 7162005-03-31 Jerome Guitton <guitton@gnat.com>
717
718 * configure.in: Check for basename.
719 * configure: Regenerate.
720 * config.in: Ditto.
721
4cc91dba
L		 7222005-03-29 H.J. Lu <hongjiu.lu@intel.com>
723
724 * i386-dis.c (SEG_Fixup): New.
725 (Sv): New.
726 (dis386): Use "Sv" for 0x8c and 0x8e.
727
ec72cfe5
NC		 7282005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
729 Nick Clifton <nickc@redhat.com>
c19d1205 730
ec72cfe5
NC		 731 * vax-dis.c: (entry_addr): New varible: An array of user supplied
732 function entry mask addresses.
733 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 734 elements in entry_addr.
ec72cfe5
NC		 735 (entry_addr_total_slots): New variable: The total number of
736 elements in entry_addr.
737 (parse_disassembler_options): New function. Fills in the entry_addr
738 array.
739 (free_entry_array): New function. Release the memory used by the
740 entry addr array. Suppressed because there is no way to call it.
741 (is_function_entry): Check if a given address is a function's
742 start address by looking at supplied entry mask addresses and
743 symbol information, if available.
744 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
745
85064c79
L		 7462005-03-23 H.J. Lu <hongjiu.lu@intel.com>
747
748 * cris-dis.c (print_with_operands): Use ~31L for long instead
749 of ~31.
750
de7141c7
L		 7512005-03-20 H.J. Lu <hongjiu.lu@intel.com>
752
753 * mmix-opc.c (O): Revert the last change.
754 (Z): Likewise.
755
e493ab45
L		 7562005-03-19 H.J. Lu <hongjiu.lu@intel.com>
757
758 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
759 (Z): Likewise.
760
d8d7c459
HPN		 7612005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
762
763 * mmix-opc.c (O, Z): Force expression as unsigned long.
764
ebdb0383
NC		 7652005-03-18 Nick Clifton <nickc@redhat.com>
766
767 * ip2k-asm.c: Regenerate.
768 * op/opcodes.pot: Regenerate.
769
1ad12f97
NC		 7702005-03-16 Nick Clifton <nickc@redhat.com>
771 Ben Elliston <bje@au.ibm.com>
772
569acd2c 773 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 774 compiler command line. Enabled by default. Disable via
569acd2c 775 --disable-werror.
1ad12f97
NC		 776 * configure: Regenerate.
777
4eb30afc
AM		 7782005-03-16 Alan Modra <amodra@bigpond.net.au>
779
780 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
781 BOOKE.
782
ea8409f7
AM		 7832005-03-15 Alan Modra <amodra@bigpond.net.au>
784
729ae8d2
AM		 785 * po/es.po: Commit new Spanish translation.
786
ea8409f7
AM		 787 * po/fr.po: Commit new French translation.
788
4f495e61
NC		 7892005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
790
791 * vax-dis.c: Fix spelling error
792 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
793 of just "Entry mask: < r1 ... >"
794
0a003adc
ZW		 7952005-03-12 Zack Weinberg <zack@codesourcery.com>
796
797 * arm-dis.c (arm_opcodes): Document %E and %V.
798 Add entries for v6T2 ARM instructions:
799 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
800 (print_insn_arm): Add support for %E and %V.
885fc257 801 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 802
da99ee72
AM		 8032005-03-10 Jeff Baker <jbaker@qnx.com>
804 Alan Modra <amodra@bigpond.net.au>
805
806 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
807 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
808 (SPRG_MASK): Delete.
809 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 810 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 811 mfsprg4..7 after msprg and consolidate.
812
220abb21
AM		 8132005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
814
815 * vax-dis.c (entry_mask_bit): New array.
816 (print_insn_vax): Decode function entry mask.
817
0e06657a
AH		 8182005-03-07 Aldy Hernandez <aldyh@redhat.com>
819
820 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
821
06647dfd
AM		 8222005-03-05 Alan Modra <amodra@bigpond.net.au>
823
824 * po/opcodes.pot: Regenerate.
825
82b829a7
RR		 8262005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
827
220abb21 828 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 829 (dsmOneArcInst): Use the enum values for the decoding class.
830 Remove redundant case in the switch for decodingClass value 11.
82b829a7 831
c4a530c5
JB		 8322005-03-02 Jan Beulich <jbeulich@novell.com>
833
834 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
835 accesses.
836 (OP_C): Consider lock prefix in non-64-bit modes.
837
47d8304e
AM		 8382005-02-24 Alan Modra <amodra@bigpond.net.au>
839
840 * cris-dis.c (format_hex): Remove ineffective warning fix.
841 * crx-dis.c (make_instruction): Warning fix.
842 * frv-asm.c: Regenerate.
843
ec36c4a4
NC		 8442005-02-23 Nick Clifton <nickc@redhat.com>
845
33b71eeb
NC		 846 * cgen-dis.in: Use bfd_byte for buffers that are passed to
847 read_memory.
06647dfd 848
33b71eeb 849 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 850
ec36c4a4
NC		 851 * crx-dis.c (make_instruction): Move argument structure into inner
852 scope and ensure that all of its fields are initialised before
853 they are used.
854
33b71eeb
NC		 855 * fr30-asm.c: Regenerate.
856 * fr30-dis.c: Regenerate.
857 * frv-asm.c: Regenerate.
858 * frv-dis.c: Regenerate.
859 * ip2k-asm.c: Regenerate.
860 * ip2k-dis.c: Regenerate.
861 * iq2000-asm.c: Regenerate.
862 * iq2000-dis.c: Regenerate.
863 * m32r-asm.c: Regenerate.
864 * m32r-dis.c: Regenerate.
865 * openrisc-asm.c: Regenerate.
866 * openrisc-dis.c: Regenerate.
867 * xstormy16-asm.c: Regenerate.
868 * xstormy16-dis.c: Regenerate.
869
53c9ebc5
AM		 8702005-02-22 Alan Modra <amodra@bigpond.net.au>
871
872 * arc-ext.c: Warning fixes.
873 * arc-ext.h: Likewise.
874 * cgen-opc.c: Likewise.
875 * ia64-gen.c: Likewise.
876 * maxq-dis.c: Likewise.
877 * ns32k-dis.c: Likewise.
878 * w65-dis.c: Likewise.
879 * ia64-asmtab.c: Regenerate.
880
610ad19b
AM		 8812005-02-22 Alan Modra <amodra@bigpond.net.au>
882
883 * fr30-desc.c: Regenerate.
884 * fr30-desc.h: Regenerate.
885 * fr30-opc.c: Regenerate.
886 * fr30-opc.h: Regenerate.
887 * frv-desc.c: Regenerate.
888 * frv-desc.h: Regenerate.
889 * frv-opc.c: Regenerate.
890 * frv-opc.h: Regenerate.
891 * ip2k-desc.c: Regenerate.
892 * ip2k-desc.h: Regenerate.
893 * ip2k-opc.c: Regenerate.
894 * ip2k-opc.h: Regenerate.
895 * iq2000-desc.c: Regenerate.
896 * iq2000-desc.h: Regenerate.
897 * iq2000-opc.c: Regenerate.
898 * iq2000-opc.h: Regenerate.
899 * m32r-desc.c: Regenerate.
900 * m32r-desc.h: Regenerate.
901 * m32r-opc.c: Regenerate.
902 * m32r-opc.h: Regenerate.
903 * m32r-opinst.c: Regenerate.
904 * openrisc-desc.c: Regenerate.
905 * openrisc-desc.h: Regenerate.
906 * openrisc-opc.c: Regenerate.
907 * openrisc-opc.h: Regenerate.
908 * xstormy16-desc.c: Regenerate.
909 * xstormy16-desc.h: Regenerate.
910 * xstormy16-opc.c: Regenerate.
911 * xstormy16-opc.h: Regenerate.
912
db9db6f2
AM		 9132005-02-21 Alan Modra <amodra@bigpond.net.au>
914
915 * Makefile.am: Run "make dep-am"
916 * Makefile.in: Regenerate.
917
bf143b25
NC		 9182005-02-15 Nick Clifton <nickc@redhat.com>
919
920 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
921 compile time warnings.
922 (print_keyword): Likewise.
923 (default_print_insn): Likewise.
924
925 * fr30-desc.c: Regenerated.
926 * fr30-desc.h: Regenerated.
927 * fr30-dis.c: Regenerated.
928 * fr30-opc.c: Regenerated.
929 * fr30-opc.h: Regenerated.
930 * frv-desc.c: Regenerated.
931 * frv-dis.c: Regenerated.
932 * frv-opc.c: Regenerated.
933 * ip2k-asm.c: Regenerated.
934 * ip2k-desc.c: Regenerated.
935 * ip2k-desc.h: Regenerated.
936 * ip2k-dis.c: Regenerated.
937 * ip2k-opc.c: Regenerated.
938 * ip2k-opc.h: Regenerated.
939 * iq2000-desc.c: Regenerated.
940 * iq2000-dis.c: Regenerated.
941 * iq2000-opc.c: Regenerated.
942 * m32r-asm.c: Regenerated.
943 * m32r-desc.c: Regenerated.
944 * m32r-desc.h: Regenerated.
945 * m32r-dis.c: Regenerated.
946 * m32r-opc.c: Regenerated.
947 * m32r-opc.h: Regenerated.
948 * m32r-opinst.c: Regenerated.
949 * openrisc-desc.c: Regenerated.
950 * openrisc-desc.h: Regenerated.
951 * openrisc-dis.c: Regenerated.
952 * openrisc-opc.c: Regenerated.
953 * openrisc-opc.h: Regenerated.
954 * xstormy16-desc.c: Regenerated.
955 * xstormy16-desc.h: Regenerated.
956 * xstormy16-dis.c: Regenerated.
957 * xstormy16-opc.c: Regenerated.
958 * xstormy16-opc.h: Regenerated.
959
d6098898
L		 9602005-02-14 H.J. Lu <hongjiu.lu@intel.com>
961
962 * dis-buf.c (perror_memory): Use sprintf_vma to print out
963 address.
964
5a84f3e0
NC		 9652005-02-11 Nick Clifton <nickc@redhat.com>
966
bc18c937
NC		 967 * iq2000-asm.c: Regenerate.
968
5a84f3e0
NC		 969 * frv-dis.c: Regenerate.
970
0a40490e
JB		 9712005-02-07 Jim Blandy <jimb@redhat.com>
972
973 * Makefile.am (CGEN): Load guile.scm before calling the main
974 application script.
975 * Makefile.in: Regenerated.
976 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
977 Simply pass the cgen-opc.scm path to ${cgen} as its first
978 argument; ${cgen} itself now contains the '-s', or whatever is
979 appropriate for the Scheme being used.
980
c46f8c51
AC		 9812005-01-31 Andrew Cagney <cagney@gnu.org>
982
983 * configure: Regenerate to track ../gettext.m4.
984
60b9a617
JB		 9852005-01-31 Jan Beulich <jbeulich@novell.com>
986
987 * ia64-gen.c (NELEMS): Define.
988 (shrink): Generate alias with missing second predicate register when
989 opcode has two outputs and these are both predicates.
990 * ia64-opc-i.c (FULL17): Define.
991 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
992 here to generate output template.
993 (TBITCM, TNATCM): Undefine after use.
994 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
995 first input. Add ld16 aliases without ar.csd as second output. Add
996 st16 aliases without ar.csd as second input. Add cmpxchg aliases
997 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
998 ar.ccv as third/fourth inputs. Consolidate through...
999 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1000 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1001 * ia64-asmtab.c: Regenerate.
1002
a53bf506
AC		 10032005-01-27 Andrew Cagney <cagney@gnu.org>
1004
1005 * configure: Regenerate to track ../gettext.m4 change.
1006
90219bd0
AO		 10072005-01-25 Alexandre Oliva <aoliva@redhat.com>
1008
1009 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1010 * frv-asm.c: Rebuilt.
1011 * frv-desc.c: Rebuilt.
1012 * frv-desc.h: Rebuilt.
1013 * frv-dis.c: Rebuilt.
1014 * frv-ibld.c: Rebuilt.
1015 * frv-opc.c: Rebuilt.
1016 * frv-opc.h: Rebuilt.
1017
45181ed1
AC		 10182005-01-24 Andrew Cagney <cagney@gnu.org>
1019
1020 * configure: Regenerate, ../gettext.m4 was updated.
1021
9e836e3d
FF		 10222005-01-21 Fred Fish <fnf@specifixinc.com>
1023
1024 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1025 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1026 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1027 * mips-dis.c: Ditto.
1028
5e8cb021
AM		 10292005-01-20 Alan Modra <amodra@bigpond.net.au>
1030
1031 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1032
986e18a5
FF		 10332005-01-19 Fred Fish <fnf@specifixinc.com>
1034
1035 * mips-dis.c (no_aliases): New disassembly option flag.
1036 (set_default_mips_dis_options): Init no_aliases to zero.
1037 (parse_mips_dis_option): Handle no-aliases option.
1038 (print_insn_mips): Ignore table entries that are aliases
1039 if no_aliases is set.
1040 (print_insn_mips16): Ditto.
1041 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1042 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1043 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1044 * mips16-opc.c (mips16_opcodes): Ditto.
1045
e38bc3b5
NC		 10462005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1047
1048 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1049 (inheritance diagram): Add missing edge.
1050 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1051 easier for the testsuite.
1052 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1053 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1054 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1055 arch_sh2a_or_sh4_up child.
1056 (sh_table): Do renaming as above.
1057 Correct comment for ldc.l for gas testsuite to read.
1058 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1059 Correct comments for movy.w and movy.l for gas testsuite to read.
1060 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1061
9df48ba9
L		 10622005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1063
1064 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1065
2033b4b9
L		 10662005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1067
1068 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1069
0bcb06d2
AS		 10702005-01-10 Andreas Schwab <schwab@suse.de>
1071
1072 * disassemble.c (disassemble_init_for_target) <case
1073 bfd_arch_ia64>: Set skip_zeroes to 16.
1074 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1075
47add74d
TL		 10762004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1077
1078 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1079
246f4c05
SS		 10802004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1081
1082 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1083 memory references. Convert avr_operand() to C90 formatting.
1084
0e1200e5
TL		 10852004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1086
1087 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1088
89a649f7
TL		 10892004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1090
1091 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1092 (no_op_insn): Initialize array with instructions that have no
1093 operands.
1094 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1095
6255809c
RE		 10962004-11-29 Richard Earnshaw <rearnsha@arm.com>
1097
1098 * arm-dis.c: Correct top-level comment.
1099
2fbad815
RE		 11002004-11-27 Richard Earnshaw <rearnsha@arm.com>
1101
1102 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1103 architecuture defining the insn.
1104 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1105 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1106 field.
2fbad815
RE		 1107 Also include opcode/arm.h.
1108 * Makefile.am (arm-dis.lo): Update dependency list.
1109 * Makefile.in: Regenerate.
1110
d81acc42
NC		 11112004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1112
1113 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1114 reflect the change to the short immediate syntax.
1115
ca4f2377
AM		 11162004-11-19 Alan Modra <amodra@bigpond.net.au>
1117
5da8bf1b
AM		 1118 * or32-opc.c (debug): Warning fix.
1119 * po/POTFILES.in: Regenerate.
1120
ca4f2377
AM		 1121 * maxq-dis.c: Formatting.
1122 (print_insn): Warning fix.
1123
b7693d02
DJ		 11242004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1125
1126 * arm-dis.c (WORD_ADDRESS): Define.
1127 (print_insn): Use it. Correct big-endian end-of-section handling.
1128
300dac7e
NC		 11292004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1130 Vineet Sharma <vineets@noida.hcltech.com>
1131
1132 * maxq-dis.c: New file.
1133 * disassemble.c (ARCH_maxq): Define.
610ad19b 1134 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1135 instructions..
1136 * configure.in: Add case for bfd_maxq_arch.
1137 * configure: Regenerate.
1138 * Makefile.am: Add support for maxq-dis.c
1139 * Makefile.in: Regenerate.
1140 * aclocal.m4: Regenerate.
1141
42048ee7
TL		 11422004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1143
1144 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1145 mode.
1146 * crx-dis.c: Likewise.
1147
bd21e58e
HPN		 11482004-11-04 Hans-Peter Nilsson <hp@axis.com>
1149
1150 Generally, handle CRISv32.
1151 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1152 (struct cris_disasm_data): New type.
1153 (format_reg, format_hex, cris_constraint, print_flags)
1154 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1155 callers changed.
1156 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1157 (print_insn_crisv32_without_register_prefix)
1158 (print_insn_crisv10_v32_with_register_prefix)
1159 (print_insn_crisv10_v32_without_register_prefix)
1160 (cris_parse_disassembler_options): New functions.
1161 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1162 parameter. All callers changed.
1163 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1164 failure.
1165 (cris_constraint) <case 'Y', 'U'>: New cases.
1166 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1167 for constraint 'n'.
1168 (print_with_operands) <case 'Y'>: New case.
1169 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1170 <case 'N', 'Y', 'Q'>: New cases.
1171 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1172 (print_insn_cris_with_register_prefix)
1173 (print_insn_cris_without_register_prefix): Call
1174 cris_parse_disassembler_options.
1175 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1176 for CRISv32 and the size of immediate operands. New v32-only
1177 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1178 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1179 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1180 Change brp to be v3..v10.
1181 (cris_support_regs): New vector.
1182 (cris_opcodes): Update head comment. New format characters '[',
1183 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1184 Add new opcodes for v32 and adjust existing opcodes to accommodate
1185 differences to earlier variants.
1186 (cris_cond15s): New vector.
1187
9306ca4a
JB		 11882004-11-04 Jan Beulich <jbeulich@novell.com>
1189
1190 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1191 (indirEb): Remove.
1192 (Mp): Use f_mode rather than none at all.
1193 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1194 replaces what previously was x_mode; x_mode now means 128-bit SSE
1195 operands.
1196 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1197 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1198 pinsrw's second operand is Edqw.
1199 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1200 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1201 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1202 mode when an operand size override is present or always suffixing.
1203 More instructions will need to be added to this group.
1204 (putop): Handle new macro chars 'C' (short/long suffix selector),
1205 'I' (Intel mode override for following macro char), and 'J' (for
1206 adding the 'l' prefix to far branches in AT&T mode). When an
1207 alternative was specified in the template, honor macro character when
1208 specified for Intel mode.
1209 (OP_E): Handle new *_mode values. Correct pointer specifications for
1210 memory operands. Consolidate output of index register.
1211 (OP_G): Handle new *_mode values.
1212 (OP_I): Handle const_1_mode.
1213 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1214 respective opcode prefix bits have been consumed.
1215 (OP_EM, OP_EX): Provide some default handling for generating pointer
1216 specifications.
1217
f39c96a9
TL		 12182004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1219
1220 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1221 COP_INST macro.
1222
812337be
TL		 12232004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1224
1225 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1226 (getregliststring): Support HI/LO and user registers.
610ad19b 1227 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1228 rearrangement done in CRX opcode header file.
1229 (crx_regtab): Likewise.
1230 (crx_optab): Likewise.
610ad19b 1231 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1232 formats.
1233 support new Co-Processor instruction 'cpi'.
1234
4030fa5a
NC		 12352004-10-27 Nick Clifton <nickc@redhat.com>
1236
1237 * opcodes/iq2000-asm.c: Regenerate.
1238 * opcodes/iq2000-desc.c: Regenerate.
1239 * opcodes/iq2000-desc.h: Regenerate.
1240 * opcodes/iq2000-dis.c: Regenerate.
1241 * opcodes/iq2000-ibld.c: Regenerate.
1242 * opcodes/iq2000-opc.c: Regenerate.
1243 * opcodes/iq2000-opc.h: Regenerate.
1244
fc3d45e8
TL		 12452004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1246
1247 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1248 us4, us5 (respectively).
1249 Remove unsupported 'popa' instruction.
1250 Reverse operands order in store co-processor instructions.
1251
3c55da70
AM		 12522004-10-15 Alan Modra <amodra@bigpond.net.au>
1253
1254 * Makefile.am: Run "make dep-am"
1255 * Makefile.in: Regenerate.
1256
7fa3d080
BW		 12572004-10-12 Bob Wilson <bob.wilson@acm.org>
1258
1259 * xtensa-dis.c: Use ISO C90 formatting.
1260
e612bb4d
AM		 12612004-10-09 Alan Modra <amodra@bigpond.net.au>
1262
1263 * ppc-opc.c: Revert 2004-09-09 change.
1264
43cd72b9
BW		 12652004-10-07 Bob Wilson <bob.wilson@acm.org>
1266
1267 * xtensa-dis.c (state_names): Delete.
1268 (fetch_data): Use xtensa_isa_maxlength.
1269 (print_xtensa_operand): Replace operand parameter with opcode/operand
1270 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1271 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1272 instruction bundles. Use xmalloc instead of malloc.
1273
bbac1f2a
NC		 12742004-10-07 David Gibson <david@gibson.dropbear.id.au>
1275
1276 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1277 initializers.
1278
48c9f030
NC		 12792004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1280
1281 * crx-opc.c (crx_instruction): Support Co-processor insns.
1282 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1283 (getregliststring): Change function to use the above enum.
1284 (print_arg): Handle CO-Processor insns.
1285 (crx_cinvs): Add 'b' option to invalidate the branch-target
1286 cache.
1287
12c64a4e
AH		 12882004-10-06 Aldy Hernandez <aldyh@redhat.com>
1289
1290 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1291 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1292 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1293 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1294 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1295
14127cc4
NC		 12962004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1297
1298 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1299 rather than add it.
1300
0dd132b6
NC		 13012004-09-30 Paul Brook <paul@codesourcery.com>
1302
1303 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1304 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1305
3f85e526
L		 13062004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1307
1308 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1309 (CONFIG_STATUS_DEPENDENCIES): New.
1310 (Makefile): Removed.
1311 (config.status): Likewise.
1312 * Makefile.in: Regenerated.
1313
8ae85421
AM		 13142004-09-17 Alan Modra <amodra@bigpond.net.au>
1315
1316 * Makefile.am: Run "make dep-am".
1317 * Makefile.in: Regenerate.
1318 * aclocal.m4: Regenerate.
1319 * configure: Regenerate.
1320 * po/POTFILES.in: Regenerate.
1321 * po/opcodes.pot: Regenerate.
1322
24443139
AS		 13232004-09-11 Andreas Schwab <schwab@suse.de>
1324
1325 * configure: Rebuild.
1326
2a309db0
AM		 13272004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1328
1329 * ppc-opc.c (L): Make this field not optional.
1330
42851540
NC		 13312004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1332
1333 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1334 Fix parameter to 'm[t|f]csr' insns.
1335
979273e3
NN		 13362004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1337
1338 * configure.in: Autoupdate to autoconf 2.59.
1339 * aclocal.m4: Rebuild with aclocal 1.4p6.
1340 * configure: Rebuild with autoconf 2.59.
1341 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1342 bfd changes for autoconf 2.59 on the way).
1343 * config.in: Rebuild with autoheader 2.59.
1344
ac28a1cb
RS		 13452004-08-27 Richard Sandiford <rsandifo@redhat.com>
1346
1347 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1348
30d1c836
ML		 13492004-07-30 Michal Ludvig <mludvig@suse.cz>
1350
1351 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1352 (GRPPADLCK2): New define.
1353 (twobyte_has_modrm): True for 0xA6.
1354 (grps): GRPPADLCK2 for opcode 0xA6.
1355
0b0ac059
AO		 13562004-07-29 Alexandre Oliva <aoliva@redhat.com>
1357
1358 Introduce SH2a support.
1359 * sh-opc.h (arch_sh2a_base): Renumber.
1360 (arch_sh2a_nofpu_base): Remove.
1361 (arch_sh_base_mask): Adjust.
1362 (arch_opann_mask): New.
1363 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1364 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1365 (sh_table): Adjust whitespace.
1366 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1367 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1368 instruction list throughout.
1369 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1370 of arch_sh2a in instruction list throughout.
1371 (arch_sh2e_up): Accomodate above changes.
1372 (arch_sh2_up): Ditto.
1373 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1374 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1375 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1376 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1377 * sh-opc.h (arch_sh2a_nofpu): New.
1378 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1379 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1380 instruction.
1381 2004-01-20 DJ Delorie <dj@redhat.com>
1382 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1383 2003-12-29 DJ Delorie <dj@redhat.com>
1384 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1385 sh_opcode_info, sh_table): Add sh2a support.
1386 (arch_op32): New, to tag 32-bit opcodes.
1387 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1388 2003-12-02 Michael Snyder <msnyder@redhat.com>
1389 * sh-opc.h (arch_sh2a): Add.
1390 * sh-dis.c (arch_sh2a): Handle.
1391 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1392
670ec21d
NC		 13932004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1394
1395 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1396
ed049af3
NC		 13972004-07-22 Nick Clifton <nickc@redhat.com>
1398
1399 PR/280
1400 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1401 insns - this is done by objdump itself.
1402 * h8500-dis.c (print_insn_h8500): Likewise.
1403
20f0a1fc
NC		 14042004-07-21 Jan Beulich <jbeulich@novell.com>
1405
1406 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1407 regardless of address size prefix in effect.
1408 (ptr_reg): Size or address registers does not depend on rex64, but
1409 on the presence of an address size override.
1410 (OP_MMX): Use rex.x only for xmm registers.
1411 (OP_EM): Use rex.z only for xmm registers.
1412
6f14957b
MR		 14132004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1414
1415 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1416 move/branch operations to the bottom so that VR5400 multimedia
1417 instructions take precedence in disassembly.
1418
1586d91e
MR		 14192004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1420
1421 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1422 ISA-specific "break" encoding.
1423
982de27a
NC		 14242004-07-13 Elvis Chiang <elvisfb@gmail.com>
1425
1426 * arm-opc.h: Fix typo in comment.
1427
4300ab10
AS		 14282004-07-11 Andreas Schwab <schwab@suse.de>
1429
1430 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1431
8577e690
AS		 14322004-07-09 Andreas Schwab <schwab@suse.de>
1433
1434 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1435
1fe1f39c
NC		 14362004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1437
1438 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1439 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1440 (crx-dis.lo): New target.
1441 (crx-opc.lo): Likewise.
1442 * Makefile.in: Regenerate.
1443 * configure.in: Handle bfd_crx_arch.
1444 * configure: Regenerate.
1445 * crx-dis.c: New file.
1446 * crx-opc.c: New file.
1447 * disassemble.c (ARCH_crx): Define.
1448 (disassembler): Handle ARCH_crx.
1449
7a33b495
JW		 14502004-06-29 James E Wilson <wilson@specifixinc.com>
1451
1452 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1453 * ia64-asmtab.c: Regnerate.
1454
98e69875
AM		 14552004-06-28 Alan Modra <amodra@bigpond.net.au>
1456
1457 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1458 (extract_fxm): Don't test dialect.
1459 (XFXFXM_MASK): Include the power4 bit.
1460 (XFXM): Add p4 param.
1461 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1462
a53b85e2
AO		 14632004-06-27 Alexandre Oliva <aoliva@redhat.com>
1464
1465 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1466 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1467
d0618d1c
AM		 14682004-06-26 Alan Modra <amodra@bigpond.net.au>
1469
1470 * ppc-opc.c (BH, XLBH_MASK): Define.
1471 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1472
1d9f512f
AM		 14732004-06-24 Alan Modra <amodra@bigpond.net.au>
1474
1475 * i386-dis.c (x_mode): Comment.
1476 (two_source_ops): File scope.
1477 (float_mem): Correct fisttpll and fistpll.
1478 (float_mem_mode): New table.
1479 (dofloat): Use it.
1480 (OP_E): Correct intel mode PTR output.
1481 (ptr_reg): Use open_char and close_char.
1482 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1483 operands. Set two_source_ops.
1484
52886d70
AM		 14852004-06-15 Alan Modra <amodra@bigpond.net.au>
1486
1487 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1488 instead of _raw_size.
1489
bad9ceea
JJ		 14902004-06-08 Jakub Jelinek <jakub@redhat.com>
1491
1492 * ia64-gen.c (in_iclass): Handle more postinc st
1493 and ld variants.
1494 * ia64-asmtab.c: Rebuilt.
1495
0451f5df
MS		 14962004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1497
1498 * s390-opc.txt: Correct architecture mask for some opcodes.
1499 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1500 in the esa mode as well.
1501
f6f9408f
JR		 15022004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1503
1504 * sh-dis.c (target_arch): Make unsigned.
1505 (print_insn_sh): Replace (most of) switch with a call to
1506 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1507 * sh-opc.h: Redefine architecture flags values.
1508 Add sh3-nommu architecture.
1509 Reorganise <arch>_up macros so they make more visual sense.
1510 (SH_MERGE_ARCH_SET): Define new macro.
1511 (SH_VALID_BASE_ARCH_SET): Likewise.
1512 (SH_VALID_MMU_ARCH_SET): Likewise.
1513 (SH_VALID_CO_ARCH_SET): Likewise.
1514 (SH_VALID_ARCH_SET): Likewise.
1515 (SH_MERGE_ARCH_SET_VALID): Likewise.
1516 (SH_ARCH_SET_HAS_FPU): Likewise.
1517 (SH_ARCH_SET_HAS_DSP): Likewise.
1518 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1519 (sh_get_arch_from_bfd_mach): Add prototype.
1520 (sh_get_arch_up_from_bfd_mach): Likewise.
1521 (sh_get_bfd_mach_from_arch_set): Likewise.
1522 (sh_merge_bfd_arc): Likewise.
1523
be8c092b
NC		 15242004-05-24 Peter Barada <peter@the-baradas.com>
1525
1526 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1527 into new match_insn_m68k function. Loop over canidate
1528 matches and select first that completely matches.
be8c092b
NC		 1529 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1530 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1531 to verify addressing for MAC/EMAC.
be8c092b
NC		 1532 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1533 reigster halves since 'fpu' and 'spl' look misleading.
1534 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1535 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1536 first, tighten up match masks.
1537 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1538 'size' from special case code in print_insn_m68k to
1539 determine decode size of insns.
1540
a30e9cc4
AM		 15412004-05-19 Alan Modra <amodra@bigpond.net.au>
1542
1543 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1544 well as when -mpower4.
1545
9598fbe5
NC		 15462004-05-13 Nick Clifton <nickc@redhat.com>
1547
1548 * po/fr.po: Updated French translation.
1549
6b6e92f4
NC		 15502004-05-05 Peter Barada <peter@the-baradas.com>
1551
1552 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1553 variants in arch_mask. Only set m68881/68851 for 68k chips.
1554 * m68k-op.c: Switch from ColdFire chips to core variants.
1555
a404d431
AM		 15562004-05-05 Alan Modra <amodra@bigpond.net.au>
1557
a30e9cc4 1558 PR 147.
a404d431
AM		 1559 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1560
f3806e43
BE		 15612004-04-29 Ben Elliston <bje@au.ibm.com>
1562
520ceea4
BE		 1563 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1564 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1565
1f1799d5
KK		 15662004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1567
1568 * sh-dis.c (print_insn_sh): Print the value in constant pool
1569 as a symbol if it looks like a symbol.
1570
fd99574b
NC		 15712004-04-22 Peter Barada <peter@the-baradas.com>
1572
1573 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1574 appropriate ColdFire architectures.
1575 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1576 mask addressing.
1577 Add EMAC instructions, fix MAC instructions. Remove
1578 macmw/macml/msacmw/msacml instructions since mask addressing now
1579 supported.
1580
b4781d44
JJ		 15812004-04-20 Jakub Jelinek <jakub@redhat.com>
1582
1583 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1584 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1585 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1586 macro. Adjust all users.
1587
91809fda 15882004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1589
91809fda
NC		 1590 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1591 separately.
1592
f4453dfa
NC		 15932004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1594
1595 * m32r-asm.c: Regenerate.
1596
9b0de91a
SS		 15972004-03-29 Stan Shebs <shebs@apple.com>
1598
1599 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1600 used.
1601
e20c0b3d
AM		 16022004-03-19 Alan Modra <amodra@bigpond.net.au>
1603
1604 * aclocal.m4: Regenerate.
1605 * config.in: Regenerate.
1606 * configure: Regenerate.
1607 * po/POTFILES.in: Regenerate.
1608 * po/opcodes.pot: Regenerate.
1609
fdd12ef3
AM		 16102004-03-16 Alan Modra <amodra@bigpond.net.au>
1611
1612 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1613 PPC_OPERANDS_GPR_0.
1614 * ppc-opc.c (RA0): Define.
1615 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1616 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1617 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1618
2dc111b3 16192004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1620
1621 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1622
7bfeee7b
AM		 16232004-03-15 Alan Modra <amodra@bigpond.net.au>
1624
1625 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1626
7ffdda93
ML		 16272004-03-12 Michal Ludvig <mludvig@suse.cz>
1628
1629 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1630 (grps): Delete GRPPLOCK entry.
7ffdda93 1631
cc0ec051
AM		 16322004-03-12 Alan Modra <amodra@bigpond.net.au>
1633
1634 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1635 (M, Mp): Use OP_M.
1636 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1637 (GRPPADLCK): Define.
1638 (dis386): Use NOP_Fixup on "nop".
1639 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1640 (twobyte_has_modrm): Set for 0xa7.
1641 (padlock_table): Delete. Move to..
1642 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1643 and clflush.
1644 (print_insn): Revert PADLOCK_SPECIAL code.
1645 (OP_E): Delete sfence, lfence, mfence checks.
1646
4fd61dcb
JJ		 16472004-03-12 Jakub Jelinek <jakub@redhat.com>
1648
1649 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1650 (INVLPG_Fixup): New function.
1651 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1652
0f10071e
ML		 16532004-03-12 Michal Ludvig <mludvig@suse.cz>
1654
1655 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1656 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1657 (padlock_table): New struct with PadLock instructions.
1658 (print_insn): Handle PADLOCK_SPECIAL.
1659
c02908d2
AM		 16602004-03-12 Alan Modra <amodra@bigpond.net.au>
1661
1662 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1663 (OP_E): Twiddle clflush to sfence here.
1664
d5bb7600
NC		 16652004-03-08 Nick Clifton <nickc@redhat.com>
1666
1667 * po/de.po: Updated German translation.
1668
ae51a426
JR		 16692003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1670
1671 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1672 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1673 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1674 accordingly.
1675
676a64f4
RS		 16762004-03-01 Richard Sandiford <rsandifo@redhat.com>
1677
1678 * frv-asm.c: Regenerate.
1679 * frv-desc.c: Regenerate.
1680 * frv-desc.h: Regenerate.
1681 * frv-dis.c: Regenerate.
1682 * frv-ibld.c: Regenerate.
1683 * frv-opc.c: Regenerate.
1684 * frv-opc.h: Regenerate.
1685
c7a48b9a
RS		 16862004-03-01 Richard Sandiford <rsandifo@redhat.com>
1687
1688 * frv-desc.c, frv-opc.c: Regenerate.
1689
8ae0baa2
RS		 16902004-03-01 Richard Sandiford <rsandifo@redhat.com>
1691
1692 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1693
ce11586c
JR		 16942004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1695
1696 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1697 Also correct mistake in the comment.
1698
6a5709a5
JR		 16992004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1700
1701 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1702 ensure that double registers have even numbers.
1703 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1704 that reserved instruction 0xfffd does not decode the same
1705 as 0xfdfd (ftrv).
1706 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1707 REG_N refers to a double register.
1708 Add REG_N_B01 nibble type and use it instead of REG_NM
1709 in ftrv.
1710 Adjust the bit patterns in a few comments.
1711
e5d2b64f 17122004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1713
1714 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1715
1f04b05f
AH		 17162004-02-20 Aldy Hernandez <aldyh@redhat.com>
1717
1718 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1719
2f3b8700
AH		 17202004-02-20 Aldy Hernandez <aldyh@redhat.com>
1721
1722 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1723
f0b26da6 17242004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1725
1726 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1727 mtivor32, mtivor33, mtivor34.
f0b26da6 1728
23d59c56 17292004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1730
1731 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1732
34920d91
NC		 17332004-02-10 Petko Manolov <petkan@nucleusys.com>
1734
1735 * arm-opc.h Maverick accumulator register opcode fixes.
1736
44d86481
BE		 17372004-02-13 Ben Elliston <bje@wasabisystems.com>
1738
1739 * m32r-dis.c: Regenerate.
1740
17707c23
MS		 17412004-01-27 Michael Snyder <msnyder@redhat.com>
1742
1743 * sh-opc.h (sh_table): "fsrra", not "fssra".
1744
fe3a9bc4
NC		 17452004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1746
1747 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1748 contraints.
1749
ff24f124
JJ		 17502004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1751
1752 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1753
a02a862a
AM		 17542004-01-19 Alan Modra <amodra@bigpond.net.au>
1755
1756 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1757 1. Don't print scale factor on AT&T mode when index missing.
1758
d164ea7f
AO		 17592004-01-16 Alexandre Oliva <aoliva@redhat.com>
1760
1761 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1762 when loaded into XR registers.
1763
cb10e79a
RS		 17642004-01-14 Richard Sandiford <rsandifo@redhat.com>
1765
1766 * frv-desc.h: Regenerate.
1767 * frv-desc.c: Regenerate.
1768 * frv-opc.c: Regenerate.
1769
f532f3fa
MS		 17702004-01-13 Michael Snyder <msnyder@redhat.com>
1771
1772 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1773
e45d0630
PB		 17742004-01-09 Paul Brook <paul@codesourcery.com>
1775
1776 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1777 specific opcodes.
1778
3ba7a1aa
DJ		 17792004-01-07 Daniel Jacobowitz <drow@mvista.com>
1780
1781 * Makefile.am (libopcodes_la_DEPENDENCIES)
1782 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1783 comment about the problem.
1784 * Makefile.in: Regenerate.
1785
ba2d3f07
AO		 17862004-01-06 Alexandre Oliva <aoliva@redhat.com>
1787
1788 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1789 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1790 cut&paste errors in shifting/truncating numerical operands.
1791 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1792 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1793 (parse_uslo16): Likewise.
1794 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1795 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1796 (parse_s12): Likewise.
1797 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1798 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1799 (parse_uslo16): Likewise.
1800 (parse_uhi16): Parse gothi and gotfuncdeschi.
1801 (parse_d12): Parse got12 and gotfuncdesc12.
1802 (parse_s12): Likewise.
1803
3ab48931
NC		 18042004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1805
1806 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1807 instruction which looks similar to an 'rla' instruction.
a0bd404e 1808
c9e214e5 1809For older changes see ChangeLog-0203
252b5132
RH		 1810\f
1811Local Variables:
2f6d2f85
NC		 1812mode: change-log
1813left-margin: 8
1814fill-column: 74
252b5132
RH		 1815version-control: never
1816End:
GDB Binutils - Deliverables
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