* bfd-in.h (struct stab_info): Move from stabs.c.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
a53b85e2
AO
12004-06-27 Alexandre Oliva <aoliva@redhat.com>
2
3 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
4 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
5
d0618d1c
AM
62004-06-26 Alan Modra <amodra@bigpond.net.au>
7
8 * ppc-opc.c (BH, XLBH_MASK): Define.
9 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
10
1d9f512f
AM
112004-06-24 Alan Modra <amodra@bigpond.net.au>
12
13 * i386-dis.c (x_mode): Comment.
14 (two_source_ops): File scope.
15 (float_mem): Correct fisttpll and fistpll.
16 (float_mem_mode): New table.
17 (dofloat): Use it.
18 (OP_E): Correct intel mode PTR output.
19 (ptr_reg): Use open_char and close_char.
20 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
21 operands. Set two_source_ops.
22
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232004-06-15 Alan Modra <amodra@bigpond.net.au>
24
25 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
26 instead of _raw_size.
27
bad9ceea
JJ
282004-06-08 Jakub Jelinek <jakub@redhat.com>
29
30 * ia64-gen.c (in_iclass): Handle more postinc st
31 and ld variants.
32 * ia64-asmtab.c: Rebuilt.
33
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342004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
35
36 * s390-opc.txt: Correct architecture mask for some opcodes.
37 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
38 in the esa mode as well.
39
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402004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
41
42 * sh-dis.c (target_arch): Make unsigned.
43 (print_insn_sh): Replace (most of) switch with a call to
44 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
45 * sh-opc.h: Redefine architecture flags values.
46 Add sh3-nommu architecture.
47 Reorganise <arch>_up macros so they make more visual sense.
48 (SH_MERGE_ARCH_SET): Define new macro.
49 (SH_VALID_BASE_ARCH_SET): Likewise.
50 (SH_VALID_MMU_ARCH_SET): Likewise.
51 (SH_VALID_CO_ARCH_SET): Likewise.
52 (SH_VALID_ARCH_SET): Likewise.
53 (SH_MERGE_ARCH_SET_VALID): Likewise.
54 (SH_ARCH_SET_HAS_FPU): Likewise.
55 (SH_ARCH_SET_HAS_DSP): Likewise.
56 (SH_ARCH_UNKNOWN_ARCH): Likewise.
57 (sh_get_arch_from_bfd_mach): Add prototype.
58 (sh_get_arch_up_from_bfd_mach): Likewise.
59 (sh_get_bfd_mach_from_arch_set): Likewise.
60 (sh_merge_bfd_arc): Likewise.
61
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622004-05-24 Peter Barada <peter@the-baradas.com>
63
64 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
65 into new match_insn_m68k function. Loop over canidate
66 matches and select first that completely matches.
67 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
68 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
69 to verify addressing for MAC/EMAC.
70 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
71 reigster halves since 'fpu' and 'spl' look misleading.
72 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
73 * m68k-opc.c: Rearragne mac/emac cases to use longest for
74 first, tighten up match masks.
75 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
76 'size' from special case code in print_insn_m68k to
77 determine decode size of insns.
78
a30e9cc4
AM
792004-05-19 Alan Modra <amodra@bigpond.net.au>
80
81 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
82 well as when -mpower4.
83
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842004-05-13 Nick Clifton <nickc@redhat.com>
85
86 * po/fr.po: Updated French translation.
87
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882004-05-05 Peter Barada <peter@the-baradas.com>
89
90 * m68k-dis.c(print_insn_m68k): Add new chips, use core
91 variants in arch_mask. Only set m68881/68851 for 68k chips.
92 * m68k-op.c: Switch from ColdFire chips to core variants.
93
a404d431
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942004-05-05 Alan Modra <amodra@bigpond.net.au>
95
a30e9cc4 96 PR 147.
a404d431
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97 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
98
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992004-04-29 Ben Elliston <bje@au.ibm.com>
100
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101 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
102 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 103
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KK
1042004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
105
106 * sh-dis.c (print_insn_sh): Print the value in constant pool
107 as a symbol if it looks like a symbol.
108
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1092004-04-22 Peter Barada <peter@the-baradas.com>
110
111 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
112 appropriate ColdFire architectures.
113 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
114 mask addressing.
115 Add EMAC instructions, fix MAC instructions. Remove
116 macmw/macml/msacmw/msacml instructions since mask addressing now
117 supported.
118
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1192004-04-20 Jakub Jelinek <jakub@redhat.com>
120
121 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
122 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
123 suffix. Use fmov*x macros, create all 3 fpsize variants in one
124 macro. Adjust all users.
125
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1262004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
127
128 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
129 separately.
130
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1312004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
132
133 * m32r-asm.c: Regenerate.
134
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1352004-03-29 Stan Shebs <shebs@apple.com>
136
137 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
138 used.
139
e20c0b3d
AM
1402004-03-19 Alan Modra <amodra@bigpond.net.au>
141
142 * aclocal.m4: Regenerate.
143 * config.in: Regenerate.
144 * configure: Regenerate.
145 * po/POTFILES.in: Regenerate.
146 * po/opcodes.pot: Regenerate.
147
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AM
1482004-03-16 Alan Modra <amodra@bigpond.net.au>
149
150 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
151 PPC_OPERANDS_GPR_0.
152 * ppc-opc.c (RA0): Define.
153 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
154 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 155 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 156
2dc111b3 1572004-03-15 Aldy Hernandez <aldyh@redhat.com>
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158
159 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 160
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1612004-03-15 Alan Modra <amodra@bigpond.net.au>
162
163 * sparc-dis.c (print_insn_sparc): Update getword prototype.
164
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1652004-03-12 Michal Ludvig <mludvig@suse.cz>
166
167 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 168 (grps): Delete GRPPLOCK entry.
7ffdda93 169
cc0ec051
AM
1702004-03-12 Alan Modra <amodra@bigpond.net.au>
171
172 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
173 (M, Mp): Use OP_M.
174 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
175 (GRPPADLCK): Define.
176 (dis386): Use NOP_Fixup on "nop".
177 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
178 (twobyte_has_modrm): Set for 0xa7.
179 (padlock_table): Delete. Move to..
180 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
181 and clflush.
182 (print_insn): Revert PADLOCK_SPECIAL code.
183 (OP_E): Delete sfence, lfence, mfence checks.
184
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JJ
1852004-03-12 Jakub Jelinek <jakub@redhat.com>
186
187 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
188 (INVLPG_Fixup): New function.
189 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
190
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ML
1912004-03-12 Michal Ludvig <mludvig@suse.cz>
192
193 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
194 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
195 (padlock_table): New struct with PadLock instructions.
196 (print_insn): Handle PADLOCK_SPECIAL.
197
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AM
1982004-03-12 Alan Modra <amodra@bigpond.net.au>
199
200 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
201 (OP_E): Twiddle clflush to sfence here.
202
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NC
2032004-03-08 Nick Clifton <nickc@redhat.com>
204
205 * po/de.po: Updated German translation.
206
ae51a426
JR
2072003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
208
209 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
210 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
211 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
212 accordingly.
213
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RS
2142004-03-01 Richard Sandiford <rsandifo@redhat.com>
215
216 * frv-asm.c: Regenerate.
217 * frv-desc.c: Regenerate.
218 * frv-desc.h: Regenerate.
219 * frv-dis.c: Regenerate.
220 * frv-ibld.c: Regenerate.
221 * frv-opc.c: Regenerate.
222 * frv-opc.h: Regenerate.
223
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RS
2242004-03-01 Richard Sandiford <rsandifo@redhat.com>
225
226 * frv-desc.c, frv-opc.c: Regenerate.
227
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RS
2282004-03-01 Richard Sandiford <rsandifo@redhat.com>
229
230 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
231
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JR
2322004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
233
234 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
235 Also correct mistake in the comment.
236
6a5709a5
JR
2372004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
238
239 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
240 ensure that double registers have even numbers.
241 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
242 that reserved instruction 0xfffd does not decode the same
243 as 0xfdfd (ftrv).
244 * sh-opc.h: Add REG_N_D nibble type and use it whereever
245 REG_N refers to a double register.
246 Add REG_N_B01 nibble type and use it instead of REG_NM
247 in ftrv.
248 Adjust the bit patterns in a few comments.
249
e5d2b64f 2502004-02-25 Aldy Hernandez <aldyh@redhat.com>
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251
252 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 253
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AH
2542004-02-20 Aldy Hernandez <aldyh@redhat.com>
255
256 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
257
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AH
2582004-02-20 Aldy Hernandez <aldyh@redhat.com>
259
260 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
261
f0b26da6 2622004-02-20 Aldy Hernandez <aldyh@redhat.com>
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263
264 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
265 mtivor32, mtivor33, mtivor34.
f0b26da6 266
23d59c56 2672004-02-19 Aldy Hernandez <aldyh@redhat.com>
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268
269 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 270
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2712004-02-10 Petko Manolov <petkan@nucleusys.com>
272
273 * arm-opc.h Maverick accumulator register opcode fixes.
274
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BE
2752004-02-13 Ben Elliston <bje@wasabisystems.com>
276
277 * m32r-dis.c: Regenerate.
278
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MS
2792004-01-27 Michael Snyder <msnyder@redhat.com>
280
281 * sh-opc.h (sh_table): "fsrra", not "fssra".
282
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2832004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
284
285 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
286 contraints.
287
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JJ
2882004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
289
290 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
291
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AM
2922004-01-19 Alan Modra <amodra@bigpond.net.au>
293
294 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
295 1. Don't print scale factor on AT&T mode when index missing.
296
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AO
2972004-01-16 Alexandre Oliva <aoliva@redhat.com>
298
299 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
300 when loaded into XR registers.
301
cb10e79a
RS
3022004-01-14 Richard Sandiford <rsandifo@redhat.com>
303
304 * frv-desc.h: Regenerate.
305 * frv-desc.c: Regenerate.
306 * frv-opc.c: Regenerate.
307
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MS
3082004-01-13 Michael Snyder <msnyder@redhat.com>
309
310 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
311
e45d0630
PB
3122004-01-09 Paul Brook <paul@codesourcery.com>
313
314 * arm-opc.h (arm_opcodes): Move generic mcrr after known
315 specific opcodes.
316
3ba7a1aa
DJ
3172004-01-07 Daniel Jacobowitz <drow@mvista.com>
318
319 * Makefile.am (libopcodes_la_DEPENDENCIES)
320 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
321 comment about the problem.
322 * Makefile.in: Regenerate.
323
ba2d3f07
AO
3242004-01-06 Alexandre Oliva <aoliva@redhat.com>
325
326 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
327 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
328 cut&paste errors in shifting/truncating numerical operands.
329 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
330 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
331 (parse_uslo16): Likewise.
332 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
333 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
334 (parse_s12): Likewise.
335 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
336 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
337 (parse_uslo16): Likewise.
338 (parse_uhi16): Parse gothi and gotfuncdeschi.
339 (parse_d12): Parse got12 and gotfuncdesc12.
340 (parse_s12): Likewise.
341
3ab48931
NC
3422004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
343
344 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
345 instruction which looks similar to an 'rla' instruction.
a0bd404e 346
c9e214e5 347For older changes see ChangeLog-0203
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348\f
349Local Variables:
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350mode: change-log
351left-margin: 8
352fill-column: 74
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353version-control: never
354End:
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