Commit | Line | Data |
---|---|---|
3cf79a01 DD |
1 | 2010-07-27 DJ Delorie <dj@redhat.com> |
2 | ||
3 | * rx-decode.opc (store_flags): Remove, replace with F_* macros. | |
4 | (rx_decode_opcode): Likewise. | |
5 | * rx-decode.c: Regenerate. | |
6 | ||
1cd986c5 NC |
7 | 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com> |
8 | Ina Pandit <ina.pandit@kpitcummins.com> | |
9 | ||
10 | * v850-dis.c (v850_sreg_names): Updated structure for system | |
11 | registers. | |
12 | (float_cc_names): new structure for condition codes. | |
13 | (print_value): Update the function that prints value. | |
14 | (get_operand_value): New function to get the operand value. | |
15 | (disassemble): Updated to handle the disassembly of instructions. | |
16 | (print_insn_v850): Updated function to print instruction for different | |
17 | families. | |
18 | * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1, | |
19 | extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3, | |
20 | extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6, | |
21 | insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop, | |
22 | extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16, | |
23 | extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22, | |
24 | extract_d22, insert_d23, extract_d23, insert_i9, extract_i9, | |
25 | insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New. | |
26 | (insert_d8_7, insert_d5_4, insert_i5div): Remove. | |
27 | (v850_operands): Update with the relocation name. Also update | |
28 | the instructions with specific set of processors. | |
29 | ||
52e7f43d RE |
30 | 2010-07-08 Tejas Belagod <tejas.belagod@arm.com> |
31 | ||
32 | * arm-dis.c (print_insn_arm): Add cases for printing more | |
33 | symbolic operands. | |
34 | (print_insn_thumb32): Likewise. | |
35 | ||
c680e7f6 MR |
36 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
37 | ||
38 | * mips-dis.c (print_insn_mips): Correct branch instruction type | |
39 | determination. | |
40 | ||
9a2c7088 MR |
41 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
42 | ||
43 | * mips-dis.c (print_mips16_insn_arg): Remove branch instruction | |
44 | type and delay slot determination. | |
45 | (print_insn_mips16): Extend branch instruction type and delay | |
46 | slot determination to cover all instructions. | |
47 | * mips16-opc.c (BR): Remove macro. | |
48 | (UBR, CBR): New macros. | |
49 | (mips16_opcodes): Update branch annotation for "b", "beqz", | |
50 | "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc" | |
51 | and "jrc". | |
52 | ||
d7d9a9f8 L |
53 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
54 | ||
55 | AVX Programming Reference (June, 2010) | |
56 | * i386-dis.c (mod_table): Replace rdrnd with rdrand. | |
57 | * i386-opc.tbl: Likewise. | |
58 | * i386-tbl.h: Regenerated. | |
59 | ||
77321f53 L |
60 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
61 | ||
62 | * i386-opc.h (CpuFSGSBase): Fix a typo in comments. | |
63 | ||
7102e95e AS |
64 | 2010-07-03 Andreas Schwab <schwab@linux-m68k.org> |
65 | ||
66 | * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to | |
67 | ppc_cpu_t before inverting. | |
3a5530ea AS |
68 | (ppc_parse_cpu): Likewise. |
69 | (print_insn_powerpc): Likewise. | |
7102e95e | 70 | |
bdc70b4a AM |
71 | 2010-07-03 Alan Modra <amodra@gmail.com> |
72 | ||
73 | * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags. | |
74 | * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete. | |
75 | (PPC64, MFDEC2): Update. | |
76 | (NON32, NO371): Define. | |
77 | (powerpc_opcode): Update to not use old opcode flags, and avoid | |
78 | -m601 duplicates. | |
79 | ||
21375995 DD |
80 | 2010-07-03 DJ Delorie <dj@delorie.com> |
81 | ||
82 | * m32c-ibld.c: Regenerate. | |
83 | ||
81a0b7e2 AM |
84 | 2010-07-03 Alan Modra <amodra@gmail.com> |
85 | ||
86 | * ppc-opc.c (PWR2COM): Define. | |
87 | (PPCPWR2): Add PPC_OPCODE_COMMON. | |
88 | (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.", | |
89 | "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst", | |
90 | "rac" from -mcom. | |
91 | ||
c7b8aa3a L |
92 | 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> |
93 | ||
94 | AVX Programming Reference (June, 2010) | |
95 | * i386-dis.c (PREFIX_0FAE_REG_0): New. | |
96 | (PREFIX_0FAE_REG_1): Likewise. | |
97 | (PREFIX_0FAE_REG_2): Likewise. | |
98 | (PREFIX_0FAE_REG_3): Likewise. | |
99 | (PREFIX_VEX_3813): Likewise. | |
100 | (PREFIX_VEX_3A1D): Likewise. | |
101 | (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
102 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and | |
103 | PREFIX_VEX_3A1D. | |
104 | (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D. | |
105 | (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
106 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd. | |
107 | ||
108 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS, | |
109 | CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS. | |
110 | (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C. | |
111 | ||
112 | * i386-opc.h (CpuXsaveopt): New. | |
77321f53 | 113 | (CpuFSGSBase): Likewise. |
c7b8aa3a L |
114 | (CpuRdRnd): Likewise. |
115 | (CpuF16C): Likewise. | |
116 | (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and | |
117 | cpuf16c. | |
118 | ||
119 | * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd, | |
120 | wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph. | |
a00eb5e8 L |
121 | * i386-init.h: Regenerated. |
122 | * i386-tbl.h: Likewise. | |
c7b8aa3a | 123 | |
09a8ad8d AM |
124 | 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
125 | ||
126 | * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf | |
127 | and mtocrf on EFS. | |
128 | ||
360cfc9c AM |
129 | 2010-06-29 Alan Modra <amodra@gmail.com> |
130 | ||
131 | * maxq-dis.c: Delete file. | |
132 | * Makefile.am: Remove references to maxq. | |
133 | * configure.in: Likewise. | |
134 | * disassemble.c: Likewise. | |
135 | * Makefile.in: Regenerate. | |
136 | * configure: Regenerate. | |
137 | * po/POTFILES.in: Regenerate. | |
138 | ||
dc898d5e AM |
139 | 2010-06-29 Alan Modra <amodra@gmail.com> |
140 | ||
141 | * mep-dis.c: Regenerate. | |
142 | ||
8e560766 MGD |
143 | 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
144 | ||
145 | * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax. | |
146 | ||
c7e2358a AM |
147 | 2010-06-27 Alan Modra <amodra@gmail.com> |
148 | ||
149 | * arc-dis.c (arc_sprintf): Delete set but unused variables. | |
150 | (decodeInstr): Likewise. | |
151 | * dlx-dis.c (print_insn_dlx): Likewise. | |
152 | * h8300-dis.c (bfd_h8_disassemble_init): Likewise. | |
153 | * maxq-dis.c (check_move, print_insn): Likewise. | |
154 | * mep-dis.c (mep_examine_ivc2_insns): Likewise. | |
155 | * msp430-dis.c (msp430_branchinstr): Likewise. | |
156 | * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning. | |
157 | * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise. | |
158 | * sparc-dis.c (print_insn_sparc): Likewise. | |
159 | * fr30-asm.c: Regenerate. | |
160 | * frv-asm.c: Regenerate. | |
161 | * ip2k-asm.c: Regenerate. | |
162 | * iq2000-asm.c: Regenerate. | |
163 | * lm32-asm.c: Regenerate. | |
164 | * m32c-asm.c: Regenerate. | |
165 | * m32r-asm.c: Regenerate. | |
166 | * mep-asm.c: Regenerate. | |
167 | * mt-asm.c: Regenerate. | |
168 | * openrisc-asm.c: Regenerate. | |
169 | * xc16x-asm.c: Regenerate. | |
170 | * xstormy16-asm.c: Regenerate. | |
171 | ||
6ffe3d99 NC |
172 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
173 | ||
174 | PR gas/11673 | |
175 | * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later. | |
176 | ||
09ec0d17 NC |
177 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
178 | ||
179 | PR binutils/11676 | |
180 | * m68k-dis.c (print_insn_arg): Prefix float constants with #0e. | |
181 | ||
e01d869a AM |
182 | 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
183 | ||
184 | * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and | |
185 | e500x2. Add PPC_OPCODE_E500 to e500 and e500x2 | |
186 | * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which | |
187 | touch floating point regs and are enabled by COM, PPC or PPCCOM. | |
188 | Treat sync as msync on e500. Treat eieio as mbar 1 on e500. | |
189 | Treat lwsync as msync on e500. | |
190 | ||
1f4e4950 MGD |
191 | 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
192 | ||
193 | * arm-dis.c (thumb-opcodes): Add disassembly for movs. | |
194 | ||
9d82ec38 MGD |
195 | 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
196 | ||
e01d869a | 197 | * arm-dis.c (print_insn_neon): Ensure disassembly of Neon |
9d82ec38 MGD |
198 | constants is the same on 32-bit and 64-bit hosts. |
199 | ||
c3a6ea62 | 200 | 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com> |
d8b24b95 NC |
201 | |
202 | * m68k-dis.c (print_insn_m68k): Emit undefined instructions as | |
203 | .short directives so that they can be reassembled. | |
204 | ||
9db8dccb CM |
205 | 2010-05-26 Catherine Moore <clm@codesourcery.com> |
206 | David Ung <davidu@mips.com> | |
207 | ||
208 | * mips-opc.c: Change membership to I1 for instructions ssnop and | |
209 | ehb. | |
210 | ||
dfc8cf43 L |
211 | 2010-05-26 H.J. Lu <hongjiu.lu@intel.com> |
212 | ||
213 | * i386-dis.c (sib): New. | |
214 | (get_sib): Likewise. | |
215 | (print_insn): Call get_sib. | |
216 | OP_E_memory): Use sib. | |
217 | ||
f79e2745 CM |
218 | 2010-05-26 Catherine Moore <clm@codesoourcery.com> |
219 | ||
220 | * mips-dis.c (mips_arch): Remove INSN_MIPS16. | |
221 | * mips-opc.c (I16): Remove. | |
222 | (mips_builtin_op): Reclassify jalx. | |
223 | ||
51b5d4a8 AM |
224 | 2010-05-19 Alan Modra <amodra@gmail.com> |
225 | ||
226 | * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde, | |
227 | divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx. | |
228 | ||
85d4ac0b AM |
229 | 2010-05-13 Alan Modra <amodra@gmail.com> |
230 | ||
231 | * ppc-opc.c (powerpc_opcodes): Correct wclr encoding. | |
232 | ||
4547cb56 NC |
233 | 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
234 | ||
235 | * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W | |
236 | format. | |
237 | (print_insn_thumb16): Add support for new %W format. | |
238 | ||
6540b386 TG |
239 | 2010-05-07 Tristan Gingold <gingold@adacore.com> |
240 | ||
241 | * Makefile.in: Regenerate with automake 1.11.1. | |
242 | * aclocal.m4: Ditto. | |
243 | ||
3e01a7fd NC |
244 | 2010-05-05 Nick Clifton <nickc@redhat.com> |
245 | ||
246 | * po/es.po: Updated Spanish translation. | |
247 | ||
9c9c98a5 NC |
248 | 2010-04-22 Nick Clifton <nickc@redhat.com> |
249 | ||
250 | * po/opcodes.pot: Updated by the Translation project. | |
251 | * po/vi.po: Updated Vietnamese translation. | |
252 | ||
f07af43e L |
253 | 2010-04-16 H.J. Lu <hongjiu.lu@intel.com> |
254 | ||
255 | * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown | |
256 | bits in opcode. | |
257 | ||
3d540e93 NC |
258 | 2010-04-09 Nick Clifton <nickc@redhat.com> |
259 | ||
260 | * i386-dis.c (print_insn): Remove unused variable op. | |
261 | (OP_sI): Remove unused variable mask. | |
262 | ||
397841b5 AM |
263 | 2010-04-07 Alan Modra <amodra@gmail.com> |
264 | ||
265 | * configure: Regenerate. | |
266 | ||
cee62821 PB |
267 | 2010-04-06 Peter Bergner <bergner@vnet.ibm.com> |
268 | ||
269 | * ppc-opc.c (RBOPT): New define. | |
270 | ("dccci"): Enable for PPCA2. Make operands optional. | |
271 | ("iccci"): Likewise. Do not deprecate for PPC476. | |
272 | ||
accf4463 NC |
273 | 2010-04-02 Masaki Muranaka <monaka@monami-software.com> |
274 | ||
275 | * cr16-opc.c (cr16_instruction): Fix typo in comment. | |
276 | ||
40b36596 JM |
277 | 2010-03-25 Joseph Myers <joseph@codesourcery.com> |
278 | ||
279 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. | |
280 | * Makefile.in: Regenerate. | |
281 | * configure.in (bfd_tic6x_arch): New. | |
282 | * configure: Regenerate. | |
283 | * disassemble.c (ARCH_tic6x): Define if ARCH_all. | |
284 | (disassembler): Handle TI C6X. | |
285 | * tic6x-dis.c: New. | |
286 | ||
1985c81c MF |
287 | 2010-03-24 Mike Frysinger <vapier@gentoo.org> |
288 | ||
289 | * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2. | |
290 | ||
f66187fd JM |
291 | 2010-03-23 Joseph Myers <joseph@codesourcery.com> |
292 | ||
293 | * dis-buf.c (buffer_read_memory): Give error for reading just | |
294 | before the start of memory. | |
295 | ||
ce7d077e SP |
296 | 2010-03-22 Sebastian Pop <sebastian.pop@amd.com> |
297 | Quentin Neill <quentin.neill@amd.com> | |
298 | ||
299 | * i386-dis.c (OP_LWP_I): Removed. | |
300 | (reg_table): Do not use OP_LWP_I, use Iq. | |
301 | (OP_LWPCB_E): Remove use of names16. | |
302 | (OP_LWP_E): Same. | |
303 | * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns | |
304 | should not set the Vex.length bit. | |
305 | * i386-tbl.h: Regenerated. | |
306 | ||
63d0fa4e AM |
307 | 2010-02-25 Edmar Wienskoski <edmar@freescale.com> |
308 | ||
309 | * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64". | |
310 | ||
c060226a NC |
311 | 2010-02-24 Nick Clifton <nickc@redhat.com> |
312 | ||
313 | PR binutils/6773 | |
314 | * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with | |
315 | <prefix>asx. Replace <prefix>subaddx with <prefix>sax. | |
316 | (thumb32_opcodes): Likewise. | |
317 | ||
ab7875de NC |
318 | 2010-02-15 Nick Clifton <nickc@redhat.com> |
319 | ||
320 | * po/vi.po: Updated Vietnamese translation. | |
321 | ||
fee1d3e8 DE |
322 | 2010-02-12 Doug Evans <dje@sebabeach.org> |
323 | ||
324 | * lm32-opinst.c: Regenerate. | |
325 | ||
37ec9240 DE |
326 | 2010-02-11 Doug Evans <dje@sebabeach.org> |
327 | ||
9468ae89 DE |
328 | * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL. |
329 | (print_address): Delete CGEN_PRINT_ADDRESS. | |
330 | * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, | |
331 | * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, | |
332 | * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, | |
333 | * xc16x-dis.c, * xstormy16-dis.c: Regenerate. | |
334 | ||
37ec9240 DE |
335 | * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, |
336 | * frv-desc.c, * frv-desc.h, * frv-opc.c, | |
337 | * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, | |
338 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, | |
339 | * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c, | |
340 | * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, | |
341 | * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c, | |
342 | * mep-desc.c, * mep-desc.h, * mep-opc.c, | |
343 | * mt-desc.c, * mt-desc.h, * mt-opc.c, | |
344 | * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c, | |
345 | * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c, | |
346 | * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate. | |
347 | ||
c75ef631 L |
348 | 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> |
349 | ||
350 | * i386-dis.c: Update copyright. | |
351 | * i386-gen.c: Likewise. | |
352 | * i386-opc.h: Likewise. | |
353 | * i386-opc.tbl: Likewise. | |
354 | ||
a683cc34 SP |
355 | 2010-02-10 Quentin Neill <quentin.neill@amd.com> |
356 | Sebastian Pop <sebastian.pop@amd.com> | |
357 | ||
358 | * i386-dis.c (OP_EX_VexImmW): Reintroduced | |
359 | function to handle 5th imm8 operand. | |
360 | (PREFIX_VEX_3A48): Added. | |
361 | (PREFIX_VEX_3A49): Added. | |
362 | (VEX_W_3A48_P_2): Added. | |
363 | (VEX_W_3A49_P_2): Added. | |
364 | (prefix table): Added entries for PREFIX_VEX_3A48 | |
365 | and PREFIX_VEX_3A49. | |
366 | (vex table): Added entries for VEX_W_3A48_P_2 and | |
367 | and VEX_W_3A49_P_2. | |
368 | * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4 | |
369 | for Vec_Imm4 operands. | |
370 | * i386-opc.h (enum): Added Vec_Imm4. | |
371 | (i386_operand_type): Added vec_imm4. | |
372 | * i386-opc.tbl: Add entries for vpermilp[ds]. | |
373 | * i386-init.h: Regenerated. | |
374 | * i386-tbl.h: Regenerated. | |
375 | ||
cdc51b07 RS |
376 | 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com> |
377 | ||
378 | * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6" | |
379 | and "pwr7". Move "a2" into alphabetical order. | |
380 | ||
ce3d2015 AM |
381 | 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
382 | ||
383 | * ppc-dis.c (ppc_opts): Add titan entry. | |
384 | * ppc-opc.c (TITAN, MULHW): Define. | |
385 | (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). | |
386 | ||
68339fdf SP |
387 | 2010-02-03 Quentin Neill <quentin.neill@amd.com> |
388 | ||
389 | * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS | |
390 | to CPU_BDVER1_FLAGS | |
391 | * i386-init.h: Regenerated. | |
392 | ||
f3d55a94 AG |
393 | 2010-02-03 Anthony Green <green@moxielogic.com> |
394 | ||
395 | * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to | |
396 | 0x0f, and make 0x00 an illegal instruction. | |
397 | ||
b0e28b39 DJ |
398 | 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com> |
399 | ||
400 | * opcodes/arm-dis.c (struct arm_private_data): New. | |
401 | (print_insn_coprocessor, print_insn_arm): Update to use struct | |
402 | arm_private_data. | |
403 | (is_mapping_symbol, get_map_sym_type): New functions. | |
404 | (get_sym_code_type): Check the symbol's section. Do not check | |
405 | mapping symbols. | |
406 | (print_insn): Default to disassembling ARM mode code. Check | |
407 | for mapping symbols separately from other symbols. Use | |
408 | struct arm_private_data. | |
409 | ||
1c480963 L |
410 | 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> |
411 | ||
412 | * i386-dis.c (EXVexWdqScalar): New. | |
413 | (vex_scalar_w_dq_mode): Likewise. | |
414 | (prefix_table): Update entries for PREFIX_VEX_3899, | |
415 | PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F, | |
416 | PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD, | |
417 | PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB, | |
418 | PREFIX_VEX_38BD and PREFIX_VEX_38BF. | |
419 | (intel_operand_size): Handle vex_scalar_w_dq_mode. | |
420 | (OP_EX): Likewise. | |
421 | ||
539f890d L |
422 | 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> |
423 | ||
424 | * i386-dis.c (XMScalar): New. | |
425 | (EXdScalar): Likewise. | |
426 | (EXqScalar): Likewise. | |
427 | (EXqScalarS): Likewise. | |
428 | (VexScalar): Likewise. | |
429 | (EXdVexScalarS): Likewise. | |
430 | (EXqVexScalarS): Likewise. | |
431 | (XMVexScalar): Likewise. | |
432 | (scalar_mode): Likewise. | |
433 | (d_scalar_mode): Likewise. | |
434 | (d_scalar_swap_mode): Likewise. | |
435 | (q_scalar_mode): Likewise. | |
436 | (q_scalar_swap_mode): Likewise. | |
437 | (vex_scalar_mode): Likewise. | |
438 | (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, | |
439 | VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, | |
440 | VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, | |
441 | VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, | |
442 | VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, | |
443 | VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, | |
444 | VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, | |
445 | VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, | |
446 | VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, | |
447 | VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. | |
448 | (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, | |
449 | VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, | |
450 | VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, | |
451 | VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, | |
452 | VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, | |
453 | VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, | |
454 | VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, | |
455 | VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, | |
456 | VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. | |
457 | (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, | |
458 | q_scalar_mode, q_scalar_swap_mode. | |
459 | (OP_XMM): Handle scalar_mode. | |
460 | (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode | |
461 | and q_scalar_swap_mode. | |
462 | (OP_VEX): Handle vex_scalar_mode. | |
463 | ||
208b4d78 L |
464 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
465 | ||
466 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
467 | ||
448b213a L |
468 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
469 | ||
470 | * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }. | |
471 | ||
47cf8fa0 L |
472 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
473 | ||
474 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
475 | ||
592d1631 L |
476 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
477 | ||
478 | * i386-dis.c (Bad_Opcode): New. | |
479 | (bad_opcode): Likewise. | |
480 | (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }. | |
481 | (dis386_twobyte): Likewise. | |
482 | (reg_table): Likewise. | |
483 | (prefix_table): Likewise. | |
484 | (x86_64_table): Likewise. | |
485 | (vex_len_table): Likewise. | |
486 | (vex_w_table): Likewise. | |
487 | (mod_table): Likewise. | |
488 | (rm_table): Likewise. | |
489 | (float_reg): Likewise. | |
490 | (reg_table): Remove trailing "(bad)" entries. | |
491 | (prefix_table): Likewise. | |
492 | (x86_64_table): Likewise. | |
493 | (vex_len_table): Likewise. | |
494 | (vex_w_table): Likewise. | |
495 | (mod_table): Likewise. | |
496 | (rm_table): Likewise. | |
497 | (get_valid_dis386): Handle bytemode 0. | |
498 | ||
712366da L |
499 | 2010-01-23 H.J. Lu <hongjiu.lu@intel.com> |
500 | ||
501 | * i386-opc.h (VEXScalar): New. | |
502 | ||
503 | * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar | |
504 | instructions. | |
505 | * i386-tbl.h: Regenerated. | |
506 | ||
706e8205 | 507 | 2010-01-21 H.J. Lu <hongjiu.lu@intel.com> |
73bb6729 L |
508 | |
509 | * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor. | |
510 | ||
511 | * i386-opc.tbl: Add xsave64 and xrstor64. | |
512 | * i386-tbl.h: Regenerated. | |
513 | ||
99ea83aa NC |
514 | 2010-01-20 Nick Clifton <nickc@redhat.com> |
515 | ||
516 | PR 11170 | |
517 | * arm-dis.c (print_arm_address): Do not ignore negative bit in PC | |
518 | based post-indexed addressing. | |
519 | ||
a6461c02 SP |
520 | 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> |
521 | ||
522 | * i386-opc.tbl: Support all the possible aliases for VPCOM* insns. | |
523 | * i386-tbl.h: Regenerated. | |
524 | ||
a2a7d12c L |
525 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
526 | ||
527 | * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in | |
528 | comments. | |
529 | ||
b9733481 L |
530 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
531 | ||
532 | * i386-dis.c (names_mm): New. | |
533 | (intel_names_mm): Likewise. | |
534 | (att_names_mm): Likewise. | |
535 | (names_xmm): Likewise. | |
536 | (intel_names_xmm): Likewise. | |
537 | (att_names_xmm): Likewise. | |
538 | (names_ymm): Likewise. | |
539 | (intel_names_ymm): Likewise. | |
540 | (att_names_ymm): Likewise. | |
541 | (print_insn): Set names_mm, names_xmm and names_ymm. | |
542 | (OP_MMX): Use names_mm, names_xmm and names_ymm. | |
543 | (OP_XMM): Likewise. | |
544 | (OP_EM): Likewise. | |
545 | (OP_EMC): Likewise. | |
546 | (OP_MXC): Likewise. | |
547 | (OP_EX): Likewise. | |
548 | (XMM_Fixup): Likewise. | |
549 | (OP_VEX): Likewise. | |
550 | (OP_EX_VexReg): Likewise. | |
551 | (OP_Vex_2src): Likewise. | |
552 | (OP_Vex_2src_1): Likewise. | |
553 | (OP_Vex_2src_2): Likewise. | |
554 | (OP_REG_VexI4): Likewise. | |
555 | ||
5e6718e4 L |
556 | 2010-01-13 H.J. Lu <hongjiu.lu@intel.com> |
557 | ||
558 | * i386-dis.c (print_insn): Update comments. | |
559 | ||
d869730d L |
560 | 2010-01-12 H.J. Lu <hongjiu.lu@intel.com> |
561 | ||
562 | * i386-dis.c (rex_original): Removed. | |
563 | (ckprefix): Remove rex_original. | |
564 | (print_insn): Update comments. | |
565 | ||
3725885a RW |
566 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
567 | ||
568 | * Makefile.in: Regenerate. | |
569 | * configure: Regenerate. | |
570 | ||
b7cd1872 DE |
571 | 2010-01-07 Doug Evans <dje@sebabeach.org> |
572 | ||
573 | * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup. | |
574 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
575 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
576 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
577 | * xstormy16-ibld.c: Regenerate. | |
578 | ||
69dd9865 SP |
579 | 2010-01-06 Quentin Neill <quentin.neill@amd.com> |
580 | ||
581 | * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. | |
582 | * i386-init.h: Regenerated. | |
583 | ||
e3e535bc NC |
584 | 2010-01-06 Daniel Gutson <dgutson@codesourcery.com> |
585 | ||
586 | * arm-dis.c (print_insn): Fixed search for next symbol and data | |
587 | dumping condition, and the initial mapping symbol state. | |
588 | ||
fe8afbc4 DE |
589 | 2010-01-05 Doug Evans <dje@sebabeach.org> |
590 | ||
591 | * cgen-ibld.in: #include "cgen/basic-modes.h". | |
592 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
593 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
594 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
595 | * xstormy16-ibld.c: Regenerate. | |
596 | ||
2edcd244 NC |
597 | 2010-01-04 Nick Clifton <nickc@redhat.com> |
598 | ||
599 | PR 11123 | |
600 | * arm-dis.c (print_insn_coprocessor): Initialise value. | |
601 | ||
0dc93057 AM |
602 | 2010-01-04 Edmar Wienskoski <edmar@freescale.com> |
603 | ||
604 | * ppc-dis.c (ppc_opts): Add entry for "e500mc64". | |
605 | ||
05994f45 DE |
606 | 2010-01-02 Doug Evans <dje@sebabeach.org> |
607 | ||
608 | * cgen-asm.in: Update copyright year. | |
609 | * cgen-dis.in: Update copyright year. | |
610 | * cgen-ibld.in: Update copyright year. | |
611 | * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, | |
612 | * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, | |
613 | * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, | |
614 | * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, | |
615 | * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, | |
616 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, | |
617 | * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, | |
618 | * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, | |
619 | * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, | |
620 | * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, | |
621 | * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, | |
622 | * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, | |
623 | * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, | |
624 | * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, | |
625 | * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, | |
626 | * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, | |
627 | * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, | |
628 | * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, | |
629 | * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, | |
630 | * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, | |
631 | * xstormy16-opc.c, * xstormy16-opc.h: Regenerate. | |
2426c15f | 632 | |
43ecc30f | 633 | For older changes see ChangeLog-2009 |
252b5132 RH |
634 | \f |
635 | Local Variables: | |
2f6d2f85 NC |
636 | mode: change-log |
637 | left-margin: 8 | |
638 | fill-column: 74 | |
252b5132 RH |
639 | version-control: never |
640 | End: |