[cgen]
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
45be3704
DD
12009-04-17 DJ Delorie <dj@redhat.com
2
3 * mep-desc.c: Regenerate.
4 * mep-ibld.c: Regenerate.
5 * mep-opc.c: Regenerate.
6 * mep-opc.h: Regenerate.
7
20135e4c
NC
82009-04-15 Anthony Green <green@moxielogic.com>
9
10 * moxie-opc.c, moxie-dis.c: Created.
11 * Makefile.am: Build the moxie source files.
12 * configure.in: Add moxie support.
13 * Makefile.in, configure: Rebuilt.
14 * disassemble.c (disassembler): Add moxie support.
15 (ARCH_moxie): Define.
16
ac5c19e6
JB
172009-04-15 Jan Beulich <jbeulich@novell.com>
18
19 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
20 extension to None.
21 (pshab, pshaw, pshad, pshaq): Likewise.
22 * i386-tbl.h: Re-generate.
23
52de720d
DD
242009-04-08 DJ Delorie <dj@redhat.com
25
26 * mep-asm.c: Regenerate.
27 * mep-desc.c: Regenerate.
28 * mep-desc.h: Regenerate.
29 * mep-dis.c: Regenerate.
30 * mep-ibld.c: Regenerate.
31 * mep-opc.c: Regenerate.
32 * mep-opc.h: Regenerate.
33
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PB
342009-04-07 Peter Bergner <bergner@vnet.ibm.com>
35
36 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
37 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
38 Reorder entries so the extended mnemonics are listed before tlbilx.
39
70dc4e32
PB
402009-04-02 Peter Bergner <bergner@vnet.ibm.com>
41
42 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
43 due to -many/-Many.
44 (print_insn_powerpc): Make sure we only deprecate instructions using
45 the original dialect and not a modified dialect due to -Many handling.
46 Move the handling of the condition register and default operands to
47 the end of the if/else if/else chain.
48 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
49 instructions from newer processors are listed before older ones.
50 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
51 that have instructions with conflicting opcodes.
52
e401b04c
PB
532009-04-01 Peter Bergner <bergner@vnet.ibm.com>
54
55 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
56 E500MC entries.
57
b8f9ee44
CL
582009-04-01 Christophe Lyon <christophe.lyon@st.com>
59
60 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
61
d460e92e
JM
622009-03-30 Joseph Myers <joseph@codesourcery.com>
63
64 * arm-dis.c (print_insn): Also check section matches in backwards
65 search for mapping symbol.
66
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672009-03-26 H.J. Lu <hongjiu.lu@intel.com>
68
69 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
70
8d25cc3d
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712009-03-18 Alan Modra <amodra@bigpond.net.au>
72
3889c459 73 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM
74 * Makefile.am: Run "make dep-am".
75 * Makefile.in: Regenerate.
76 * openrisc-opc.c: Regenerate.
77
34dd024a
NC
782009-03-10 Nick Clifton <nickc@redhat.com>
79
80 * po/id.po: Updated Indonesian translation.
81
69fe9ce5
AM
822009-03-10 Alan Modra <amodra@bigpond.net.au>
83
84 * ppc-dis.c: Include "opintl.h".
85 (struct ppc_mopt, ppc_opts): New.
86 (ppc_parse_cpu): New function.
87 (powerpc_init_dialect): Use it.
88 (print_ppc_disassembler_options): Dump options from ppc_opts.
89 Internationalize message.
90
d11fd249
NC
912009-03-06 Nick Clifton <nickc@redhat.com>
92
93 * po/es.po: Updated Spanish translation.
94
51dec227
AM
952009-03-04 Alan Modra <amodra@bigpond.net.au>
96
97 PR 6768
98 * configure.in: Test for ld --as-needed support. Link shared
99 libopcodes against libm.
100 * configure: Regenerate.
101
c72ab5f2
PB
1022009-03-03 Peter Bergner <bergner@vnet.ibm.com>
103
104 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
105 instructions from newer processors are listed before older ones.
106
a1f7ca36
AM
1072009-03-03 Alan Modra <amodra@bigpond.net.au>
108
109 * Makefile.am: Run "make dep-am".
110 (HFILES): Move lm32-desc.h and lm32-opc.h from..
111 (CFILES): ..here.
112 * Makefile.in: Regenerate.
113
c3b7224a
NC
1142009-03-02 Qinwei <qinwei@sunnorth.com.cn>
115
116 * score7-dis.c: New file.
117 * Makefile.am: Add dependencies for score7-dis.c.
118 * Makefile.in: Regenerate.
119 * configure.in: Add score7-dis to score files.
120 * configure: Regenerate.
121 * score-dis.c: Add support for score7 architecture.
122 * score-opc.h: Likewise.
123
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RW
1242009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
125
126 * configure: Regenerate.
127
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1282009-02-27 H.J. Lu <hongjiu.lu@intel.com>
129
130 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
131
066be9f7
PB
1322009-02-26 Peter Bergner <bergner@vnet.ibm.com>
133
134 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
135 the power7 and the isel instructions.
136 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
137 (insert_dm, extract_dm): Likewise.
138 (XB6): Update comment to include XX2 form.
139 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
140 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
141 (RemoveXX3DM): Delete.
142 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
143 "mftgpr">: Deprecate for POWER7.
144 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
145 "frsqrte.">: Deprecate the three operand form and enable the two
146 operand form for POWER7 and later.
147 <"wait">: Extend to accept optional parameter. Enable for POWER7.
148 <"waitsrv", "waitimpl">: Add extended opcodes.
149 <"ldbrx", "stdbrx">: Enable for POWER7.
150 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
151 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
152 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
153 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
154 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
155 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
156 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
157 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
158 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
159 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
160 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
161 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
162 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
163 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
164 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
165 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
166 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
167 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
168 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
169 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
170 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
171 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
172 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
173 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
174 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
175 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
176 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
177 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
178 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
179 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
180 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
181 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
182 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
183 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
184 "xxspltw", "xxswapd">: Add VSX opcodes.
185
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1862009-02-23 H.J. Lu <hongjiu.lu@intel.com>
187
188 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
189 (operand_types): Remove Vex_Imm4.
190
191 * i386-opc.h (Vex_Imm4): Removed.
192 (OTMax): Updated.
193 (i386_operand_type): Remove vex_imm4.
194
195 * i386-opc.tbl: Remove Vex_Imm4 comments.
196 * i386-init.h: Regenerated.
197 * i386-tbl.h: Likewise.
198
4ce8808b
RE
1992009-02-23 Richard Earnshaw <rearnsha@arm.com>
200
201 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
202 vq{r}shr{u}n.s64 insnstructions.
203
0e55be16
PB
2042009-02-19 Peter Bergner <bergner@vnet.ibm.com>
205
206 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
207 operand to be a float point register (FRT/FRS).
208
b1c9882d
AN
2092009-02-18 Adam Nemet <anemet@caviumnetworks.com>
210
211 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
212 dmfc2 and dmtc2 before the architecture-level variants.
213
137f2437
NC
2142009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
215
216 * fr30-opc.c: Regenerate.
217 * frv-opc.c: Regenerate.
218 * ip2k-opc.c: Regenerate.
219 * iq2000-opc.c: Regenerate.
220 * lm32-opc.c: Regenerate.
221 * m32c-opc.c: Regenerate.
222 * m32r-opc.c: Regenerate.
223 * mep-opc.c: Regenerate.
224 * mt-opc.c: Regenerate.
225 * xc16x-opc.c: Regenerate.
226 * xstormy16-opc.c: Regenerate.
227 * tic54x-dis.c (print_instruction): Avoid compiler warning on
228 sprintf call.
229
87298967
NS
2302009-02-12 Nathan Sidwell <nathan@codesourcery.com>
231
232 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
233
80890a61
PB
2342009-02-05 Peter Bergner <bergner@vnet.ibm.com>
235
236 * ppc-opc.c: Update copyright year.
237 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
238 ordering for POWER4 and later and use the correct Server ordering.
239
ce2f5b3c
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2402009-02-04 H.J. Lu <hongjiu.lu@intel.com>
241
242 AVX Programming Reference (January, 2009)
243 * i386-dis.c (PREFIX_VEX_3A44): New.
244 (VEX_LEN_3A44_P_2): Likewise.
245 (PREFIX_VEX_3A48): Updated.
246 (VEX_LEN_3A4C_P_2): Likewise.
247 (prefix_table): Add PREFIX_VEX_3A44.
248 (vex_table): Likewise.
249 (vex_len_table): Add VEX_LEN_3A44_P_2.
250
251 * i386-opc.tbl: Add PCLMUL + AVX instructions.
252 * i386-tbl.h: Regenerated.
253
52b6b6b9
JM
2542009-02-03 Sandip Matte <sandip@rmicorp.com>
255
256 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
257 (mips_arch_choices): Add XLR entry.
258 * mips-opc.c (XLR): Define.
259 (mips_builtin_opcodes): Add XLR instructions.
260
31dd3154
JM
2612009-02-03 Carlos O'Donell <carlos@codesourcery.com>
262
263 * Makefile.am: Add install-pdf target.
264 * po/Make-in: Add install-pdf target.
265 * Makefile.in: Regenerate.
266
c1a0a41f
DD
2672009-02-02 DJ Delorie <dj@redhat.com>
268
269 * mep-asm.c: Regenerate.
270 * mep-desc.c: Regenerate.
271 * mep-desc.h: Regenerate.
272 * mep-dis.c: Regenerate.
273 * mep-ibld.c: Regenerate.
274 * mep-opc.c: Regenerate.
275 * mep-opc.h: Regenerate.
276
087b80de
JM
2772009-01-29 Mark Mitchell <mark@codesourcery.com>
278
279 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
280 qsub, and qdsub.
281
159073e6
NC
2822009-01-28 Chao-ying Fu <fu@mips.com>
283
284 * mips-opc.c (suxc1): Add the flag of FP_D.
285
6f3b91a6
AM
2862009-01-20 Alan Modra <amodra@bigpond.net.au>
287
288 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
289 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
290 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
291 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
292 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
293 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
294 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
295 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
296
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2972009-01-16 Alan Modra <amodra@bigpond.net.au>
298
299 * configure.in (commonbfdlib): Delete.
300 (SHARED_LIBADD): Add pic libiberty if such is available.
301 * configure: Regenerate.
302 * po/POTFILES.in: Regenerate.
303
21169fcf
PB
3042009-01-14 Peter Bergner <bergner@vnet.ibm.com>
305
306 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
307 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
308 operand form and enable the four operand form for POWER6 and later.
309 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
310 three operand form for POWER6 and later.
311
4ca47a51
MF
3122009-01-14 Mike Frysinger <vapier@gentoo.org>
313
314 * bfin-dis.c (OUTS): Use "%s" as format string.
315
8acd5377
L
3162009-01-13 H.J. Lu <hongjiu.lu@intel.com>
317
318 * i386-gen.c (cpu_flag_init): Remove a white space.
319 (operand_type_init): Likewise.
320
c1ec1875
L
3212009-01-12 H.J. Lu <hongjiu.lu@intel.com>
322
323 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
324 * i386-tbl.h: Regenerated.
325
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L
3262009-01-12 H.J. Lu <hongjiu.lu@intel.com>
327
328 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
329 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
330 subS, xorS and cmpS.
331
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3322009-01-10 H.J. Lu <hongjiu.lu@intel.com>
333
334 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
335 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
336 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
337 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
338 and CpuSYSCALL.
339 (lineno): Removed.
340 (set_bitfield): Take an argument, lineno. Don't report lineno
341 on error if it is -1.
342 (process_i386_cpu_flag): Take an argument, lineno.
343 (process_i386_opcode_modifier): Likewise.
344 (process_i386_operand_type): Likewise.
345 (output_i386_opcode): Likewise.
346 (opcode_hash_entry): Add lineno.
347 (process_i386_opcodes): Updated.
348 (process_i386_registers): Likewise.
349 (process_i386_initializers): Likewise.
350
351 * i386-opc.h (CpuP4): Removed.
352 (CpuK6): Likewise.
353 (CpuK8): Likewise.
354 (CpuClflush): New.
355 (CpuSYSCALL): Likewise.
356 (CpuMMX): Updated.
357 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
358 cpuclflush and cpusyscall.
359
360 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
361 syscall and sysret.
362 * i386-init.h: Regenerated.
363 * i386-tbl.h: Likewise.
364
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3652009-01-09 H.J. Lu <hongjiu.lu@intel.com>
366
367 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
368 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
369 (cpu_flags): Add CpuRdtscp.
370 (set_bitfield): Remove CpuSledgehammer check.
371
372 * i386-opc.h (CpuRdtscp): New.
373 (CpuLM): Updated.
374 (i386_cpu_flags): Add cpurdtscp.
375
376 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
377 * i386-init.h: Regenerated.
378 * i386-tbl.h: Likewise.
379
1cb0a767
PB
3802009-01-09 Peter Bergner <bergner@vnet.ibm.com>
381
382 * ppc-opc.c (PPCNONE): Define.
383 (NOPOWER4): Delete.
384 (powerpc_opcodes): Initialize the new "deprecated" field.
385
168e3097
L
3862009-01-06 H.J. Lu <hongjiu.lu@intel.com>
387
388 AVX Programming Reference (December, 2008)
389 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
390 (VEX_LEN_E7_P_2_M_0): Likewise.
391 (VEX_LEN_2C_P_1): Updated.
392 (VEX_LEN_E8_P_2): Likewise.
393 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
394 (mod_table): Likewise.
395
396 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
397 * i386-tbl.h: Regenerated.
398
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3992009-01-05 H.J. Lu <hongjiu.lu@intel.com>
400
401 * i386-gen.c (process_copyright): Update for 2009.
402
403 * i386-init.h: Regenerated.
404 * i386-tbl.h: Likewise.
405
0bfee649 4062009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 407
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408 AVX Programming Reference (December, 2008)
409 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 410 (OP_EX_VexW): Likewise.
0bfee649 411 (OP_EX_VexImmW): Likewise.
c0f3af97 412 (OP_XMM_VexW): Likewise.
c0f3af97 413 (VEXI4_Fixup): Likewise.
c0f3af97 414 (VPERMIL2_Fixup): Likewise.
c0f3af97 415 (VexI4): Likewise.
0bfee649
L
416 (VexFMA): Likewise.
417 (Vex128FMA): Likewise.
c0f3af97
L
418 (EXVexW): Likewise.
419 (EXdVexW): Likewise.
420 (EXqVexW): Likewise.
0bfee649 421 (EXVexImmW): Likewise.
c0f3af97 422 (XMVexW): Likewise.
c0f3af97 423 (VPERMIL2): Likewise.
0bfee649
L
424 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
425 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
426 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
427 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
428 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
429 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
430 (get_vex_imm8): Likewise.
431 (OP_EX_VexReg): Likewise.
432 vpermil2_op): Likewise.
433 (EXVexWdq): New.
434 (vex_w_dq_mode): Likewise.
435 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
436 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
437 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
438 (es_reg): Updated.
439 (PREFIX_VEX_38DB): Likewise.
440 (PREFIX_VEX_3A4A): Likewise.
441 (PREFIX_VEX_3A60): Likewise.
442 (PREFIX_VEX_3ADF): Likewise.
443 (VEX_LEN_3ADF_P_2): Likewise.
444 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
445 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
446 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
447 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
448 PREFIX_VEX_3896...PREFIX_VEX_389F,
449 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
450 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 451 (vex_table): Likewise.
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452 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
453 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
454 (putop): Support "%XW".
455 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 456
0bfee649 457 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 458
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459 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
460 instructions. Add new FMA instructions.
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461 * i386-tbl.h: Regenerated.
462
0bfee649 4632009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 464
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465 * or32-opc.c (or32_print_register, or32_print_immediate,
466 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 467
0bfee649 468For older changes see ChangeLog-2008
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469\f
470Local Variables:
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471mode: change-log
472left-margin: 8
473fill-column: 74
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474version-control: never
475End:
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