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* expr.c (operand <case '$'>): Use DOLLAR_AMBIGU rather than flag_mri_m68k
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
6f84a2a6
NS		 12005-11-08 Nathan Sidwell <nathan@codesourcery.com>
2
3 Add ms2.
4 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
5 ms1-opc.c, ms1-opc.h: Regenerated.
6
a541e3ce
SE		 72005-11-07 Steve Ellcey <sje@cup.hp.com>
8
9 * configure: Regenerate after modifying bfd/warning.m4.
10
3e7d61b2
AM		 112005-11-07 Alan Modra <amodra@bigpond.net.au>
12
13 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
14 ignored rex prefixes here.
15 (print_insn): Instead, handle them similarly to fwait followed
16 by non-fp insns.
17
a92e0d0a
L		 182005-11-02 H.J. Lu <hongjiu.lu@intel.com>
19
20 * iq2000-desc.c: Regenerated.
21 * iq2000-desc.h: Likewise.
22 * iq2000-dis.c: Likewise.
23 * iq2000-opc.c: Likewise.
24
36b0c57d
PB		 252005-11-02 Paul Brook <paul@codesourcery.com>
26
27 * arm-dis.c (print_insn_thumb32): Word align blx target address.
28
9a2ff3f5
AM		 292005-10-31 Alan Modra <amodra@bigpond.net.au>
30
31 * arm-dis.c (print_insn): Warning fix.
32
9e5169a8
L		 332005-10-30 H.J. Lu <hongjiu.lu@intel.com>
34
35 * Makefile.am: Run "make dep-am".
36 * Makefile.in: Regenerated.
37
38 * dep-in.sed: Replace " ./" with " ".
39
fb53f5a8
DB		 402005-10-28 Dave Brolley <brolley@redhat.com>
41
42 * All CGEN-generated sources: Regenerate.
43
44 Contribute the following changes:
45 2005-09-19 Dave Brolley <brolley@redhat.com>
46
47 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
48 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
49 bfd_arch_m32c case.
50
51 2005-02-16 Dave Brolley <brolley@redhat.com>
52
53 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
54 cgen_isa_mask_* to cgen_bitset_*.
55 * cgen-opc.c: Likewise.
56
57 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
58
59 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
60 * *-dis.c: Regenerate.
61
62 2003-06-05 DJ Delorie <dj@redhat.com>
63
64 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
65 it, as it may point to a reused buffer. Set prev_isas when we
66 change cpus.
67
68 2002-12-13 Dave Brolley <brolley@redhat.com>
69
70 * cgen-opc.c (cgen_isa_mask_create): New support function for
71 CGEN_ISA_MASK.
72 (cgen_isa_mask_init): Ditto.
73 (cgen_isa_mask_clear): Ditto.
74 (cgen_isa_mask_add): Ditto.
75 (cgen_isa_mask_set): Ditto.
76 (cgen_isa_supported): Ditto.
77 (cgen_isa_mask_compare): Ditto.
78 (cgen_isa_mask_intersection): Ditto.
79 (cgen_isa_mask_copy): Ditto.
80 (cgen_isa_mask_combine): Ditto.
81 * cgen-dis.in (libiberty.h): #include it.
82 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
83 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
84 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
85 * Makefile.in: Regenerated.
86
c6552317
DD		 872005-10-27 DJ Delorie <dj@redhat.com>
88
89 * m32c-asm.c: Regenerate.
90 * m32c-desc.c: Regenerate.
91 * m32c-desc.h: Regenerate.
92 * m32c-dis.c: Regenerate.
93 * m32c-ibld.c: Regenerate.
94 * m32c-opc.c: Regenerate.
95 * m32c-opc.h: Regenerate.
96
f75eb1c0
DD		 972005-10-26 DJ Delorie <dj@redhat.com>
98
99 * m32c-asm.c: Regenerate.
100 * m32c-desc.c: Regenerate.
101 * m32c-desc.h: Regenerate.
102 * m32c-dis.c: Regenerate.
103 * m32c-ibld.c: Regenerate.
104 * m32c-opc.c: Regenerate.
105 * m32c-opc.h: Regenerate.
106
f1022c90
PB		 1072005-10-26 Paul Brook <paul@codesourcery.com>
108
109 * arm-dis.c (arm_opcodes): Correct "sel" entry.
110
e277c00b
AM		 1112005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
112
113 * m32r-asm.c: Regenerate.
114
92e0a941
DD		 1152005-10-25 DJ Delorie <dj@redhat.com>
116
117 * m32c-asm.c: Regenerate.
118 * m32c-desc.c: Regenerate.
119 * m32c-desc.h: Regenerate.
120 * m32c-dis.c: Regenerate.
121 * m32c-ibld.c: Regenerate.
122 * m32c-opc.c: Regenerate.
123 * m32c-opc.h: Regenerate.
124
3c9b82ba
NC		 1252005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
126
127 * configure.in: Add target architecture bfd_arch_z80.
128 * configure: Regenerated.
3e7d61b2 129 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 130 bfd_arch_z80.
131 * z80-dis.c: New file.
132
3caac5b8
AM		 1332005-10-25 Alan Modra <amodra@bigpond.net.au>
134
135 * po/POTFILES.in: Regenerate.
136 * po/opcodes.pot: Regenerate.
137
6a2375c6
JB		 1382005-10-24 Jan Beulich <jbeulich@novell.com>
139
140 * ia64-asmtab.c: Regenerate.
141
a1a280bb
DD		 1422005-10-21 DJ Delorie <dj@redhat.com>
143
144 * m32c-asm.c: Regenerate.
145 * m32c-desc.c: Regenerate.
146 * m32c-desc.h: Regenerate.
147 * m32c-dis.c: Regenerate.
148 * m32c-ibld.c: Regenerate.
149 * m32c-opc.c: Regenerate.
150 * m32c-opc.h: Regenerate.
151
b7d48530
NC		 1522005-10-21 Nick Clifton <nickc@redhat.com>
153
154 * bfin-dis.c: Tidy up code, removing redundant constructs.
155
8dd744b6
MS		 1562005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
157
158 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
159 instructions.
160
e74eb924
NC		 1612005-10-18 Nick Clifton <nickc@redhat.com>
162
163 * m32r-asm.c: Regenerate after updating m32r.opc.
164
471e4e36
JZ		 1652005-10-18 Jie Zhang <jie.zhang@analog.com>
166
167 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
168 reading instruction from memory.
169
5e03663f
NC		 1702005-10-18 Nick Clifton <nickc@redhat.com>
171
172 * m32r-asm.c: Regenerate after updating m32r.opc.
173
ab7c9a26
NC		 1742005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
175
176 * m32r-asm.c: Regenerate after updating m32r.opc.
177
19590ef7
RE		 1782005-10-08 James Lemke <jim@wasabisystems.com>
179
180 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
181 operations.
182
6edfbbad
DJ		 1832005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
184
185 * ppc-dis.c (struct dis_private): Remove.
186 (powerpc_dialect): Avoid aliasing warnings.
187 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
188
095f2843
NC		 1892005-09-30 Nick Clifton <nickc@redhat.com>
190
191 * po/ga.po: New Irish translation.
192 * configure.in (ALL_LINGUAS): Add "ga".
193 * configure: Regenerate.
194
fdd3b9b3
L		 1952005-09-30 H.J. Lu <hongjiu.lu@intel.com>
196
197 * Makefile.am: Run "make dep-am".
198 * Makefile.in: Regenerated.
199 * aclocal.m4: Likewise.
200 * configure: Likewise.
201
4b7f6baa
CM		 2022005-09-30 Catherine Moore <clm@cm00re.com>
203
204 * Makefile.am: Bfin support.
205 * Makefile.in: Regenerated.
206 * aclocal.m4: Regenerated.
207 * bfin-dis.c: New file.
208 * configure.in: Bfin support.
209 * configure: Regenerated.
210 * disassemble.c (ARCH_bfin): Define.
211 (disassembler): Add case for bfd_arch_bfin.
212
1a114b12
JB		 2132005-09-28 Jan Beulich <jbeulich@novell.com>
214
215 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
216 (indirEv): Use it.
217 (stackEv): New.
218 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
219 (dis386): Document and use new 'V' meta character. Use it for
220 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
221 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
222 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
223 data prefix as used whenever DFLAG was examined. Handle 'V'.
224 (intel_operand_size): Use stack_v_mode.
225 (OP_E): Use stack_v_mode, but handle only the special case of
226 64-bit mode without operand size override here; fall through to
227 v_mode case otherwise.
228 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
229 and no operand size override is present.
230 (OP_J): Use get32s for obtaining the displacement also when rex64
231 is present.
232
3eb17e6b
PB		 2332005-09-08 Paul Brook <paul@codesourcery.com>
234
235 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
236
61cc0267
CF		 2372005-09-06 Chao-ying Fu <fu@mips.com>
238
239 * mips-opc.c (MT32): New define.
240 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
241 bottom to avoid opcode collision with "mftr" and "mttr".
242 Add MT instructions.
243 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
244 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
245 formats.
246
b13dd07a
PB		 2472005-09-02 Paul Brook <paul@codesourcery.com>
248
249 * arm-dis.c (coprocessor_opcodes): Add null terminator.
250
8f06b2d8
PB		 2512005-09-02 Paul Brook <paul@codesourcery.com>
252
253 * arm-dis.c (coprocessor_opcodes): New.
254 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
255 (print_insn_coprocessor): New function.
256 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
257 format characters.
258 (print_insn_thumb32): Use print_insn_coprocessor.
259
a2dfd01f
PB		 2602005-08-30 Paul Brook <paul@codesourcery.com>
261
262 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
263
3f31e633
JB		 2642005-08-26 Jan Beulich <jbeulich@novell.com>
265
266 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
267 re-use.
268 (OP_E): Call intel_operand_size, move call site out of mode
269 dependent code.
270 (OP_OFF): Call intel_operand_size if suffix_always. Remove
271 ATTRIBUTE_UNUSED from parameters.
272 (OP_OFF64): Likewise.
273 (OP_ESreg): Call intel_operand_size.
274 (OP_DSreg): Likewise.
275 (OP_DIR): Use colon rather than semicolon as separator of far
276 jump/call operands.
277
fd25c5a9
CF		 2782005-08-25 Chao-ying Fu <fu@mips.com>
279
280 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
281 (mips_builtin_opcodes): Add DSP instructions.
282 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
283 mips64, mips64r2.
284 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
285 operand formats.
286
dd8b7c22
DU		 2872005-08-23 David Ung <davidu@mips.com>
288
289 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 290 instructions to the table.
dd8b7c22 291
c17ae8a2
AM		 2922005-08-18 Alan Modra <amodra@bigpond.net.au>
293
848cf006 294 * a29k-dis.c: Delete.
c17ae8a2
AM		 295 * Makefile.am: Remove a29k support.
296 * configure.in: Likewise.
297 * disassemble.c: Likewise.
298 * Makefile.in: Regenerate.
299 * configure: Regenerate.
300 * po/POTFILES.in: Regenerate.
301
36ae0db3
DJ		 3022005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
303
304 * ppc-dis.c (powerpc_dialect): Handle e300.
305 (print_ppc_disassembler_options): Likewise.
306 * ppc-opc.c (PPCE300): Define.
307 (powerpc_opcodes): Mark icbt as available for the e300.
308
63a3357b
DA		 3092005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
310
311 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
312 Use "rp" instead of "%r2" in "b,l" insns.
313
ad101263
MS		 3142005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
315
316 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
317 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
318 (main): Likewise.
319 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
320 and 4 bit optional masks.
321 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
322 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
323 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
324 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
325 (s390_opformats): Likewise.
326 * s390-opc.txt: Add new instructions for cpu type z9-109.
327
f1fa1093
DA		 3282005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
329
330 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
331
e9f89963
PB		 3322005-07-29 Paul Brook <paul@codesourcery.com>
333
334 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
335
92e90b6e
PB		 3362005-07-29 Paul Brook <paul@codesourcery.com>
337
338 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
339 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
340
fd54057a
DD		 3412005-07-25 DJ Delorie <dj@redhat.com>
342
343 * m32c-asm.c Regenerate.
344 * m32c-dis.c Regenerate.
345
760c0f6a
DD		 3462005-07-20 DJ Delorie <dj@redhat.com>
347
348 * disassemble.c (disassemble_init_for_target): M32C ISAs are
349 enums, so convert them to bit masks, which attributes are.
350
85da3a56
NC		 3512005-07-18 Nick Clifton <nickc@redhat.com>
352
353 * configure.in: Restore alpha ordering to list of arches.
354 * configure: Regenerate.
355 * disassemble.c: Restore alpha ordering to list of arches.
356
3572005-07-18 Nick Clifton <nickc@redhat.com>
358
359 * m32c-asm.c: Regenerate.
360 * m32c-desc.c: Regenerate.
361 * m32c-desc.h: Regenerate.
362 * m32c-dis.c: Regenerate.
363 * m32c-ibld.h: Regenerate.
364 * m32c-opc.c: Regenerate.
365 * m32c-opc.h: Regenerate.
366
22cbf2e7
L		 3672005-07-18 H.J. Lu <hongjiu.lu@intel.com>
368
369 * i386-dis.c (PNI_Fixup): Update comment.
370 (VMX_Fixup): Properly handle the suffix check.
371
0aea0460
DA		 3722005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
373
374 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
375 mfctl disassembly.
376
0f82ff91
AM		 3772005-07-16 Alan Modra <amodra@bigpond.net.au>
378
379 * Makefile.am: Run "make dep-am".
380 (stamp-m32c): Fix cpu dependencies.
381 * Makefile.in: Regenerate.
382 * ip2k-dis.c: Regenerate.
383
90700ea2
L		 3842007-07-15 H.J. Lu <hongjiu.lu@intel.com>
385
386 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
387 (VMX_Fixup): New. Fix up Intel VMX Instructions.
388 (Em): New.
389 (Gm): New.
390 (VM): New.
391 (dis386_twobyte): Updated entries 0x78 and 0x79.
392 (twobyte_has_modrm): Likewise.
393 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
394 (OP_G): Handle m_mode.
395
49f58d10
JB		 3962005-07-14 Jim Blandy <jimb@redhat.com>
397
398 Add support for the Renesas M32C and M16C.
399 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
400 * m32c-desc.h, m32c-opc.h: New.
401 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
402 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
403 m32c-opc.c.
404 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
405 m32c-ibld.lo, m32c-opc.lo.
406 (CLEANFILES): List stamp-m32c.
407 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
408 (CGEN_CPUS): Add m32c.
409 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
410 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
411 (m32c_opc_h): New variable.
412 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
413 (m32c-opc.lo): New rules.
414 * Makefile.in: Regenerated.
415 * configure.in: Add case for bfd_m32c_arch.
416 * configure: Regenerated.
417 * disassemble.c (ARCH_m32c): New.
418 [ARCH_m32c]: #include "m32c-desc.h".
419 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
420 (disassemble_init_for_target) [ARCH_m32c]: Same.
421
422 * cgen-ops.h, cgen-types.h: New files.
423 * Makefile.am (HFILES): List them.
424 * Makefile.in: Regenerated.
3e7d61b2 425
0fd3a477
JW		 4262005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
427
428 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
429 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
430 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
431 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
432 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
433 v850-dis.c: Fix format bugs.
434 * ia64-gen.c (fail, warn): Add format attribute.
435 * or32-opc.c (debug): Likewise.
436
22f8fcbd
NC		 4372005-07-07 Khem Raj <kraj@mvista.com>
438
439 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
440 disassembly pattern.
441
d125c27b
AM		 4422005-07-06 Alan Modra <amodra@bigpond.net.au>
443
444 * Makefile.am (stamp-m32r): Fix path to cpu files.
445 (stamp-m32r, stamp-iq2000): Likewise.
446 * Makefile.in: Regenerate.
447 * m32r-asm.c: Regenerate.
448 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
449 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
450
3ec2b351
NC		 4512005-07-05 Nick Clifton <nickc@redhat.com>
452
453 * iq2000-asm.c: Regenerate.
454 * ms1-asm.c: Regenerate.
455
30123838
JB		 4562005-07-05 Jan Beulich <jbeulich@novell.com>
457
458 * i386-dis.c (SVME_Fixup): New.
459 (grps): Use it for the lidt entry.
460 (PNI_Fixup): Call OP_M rather than OP_E.
461 (INVLPG_Fixup): Likewise.
462
b0eec63e
L		 4632005-07-04 H.J. Lu <hongjiu.lu@intel.com>
464
465 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
466
47b0e7ad
NC		 4672005-07-01 Nick Clifton <nickc@redhat.com>
468
469 * a29k-dis.c: Update to ISO C90 style function declarations and
470 fix formatting.
471 * alpha-opc.c: Likewise.
472 * arc-dis.c: Likewise.
473 * arc-opc.c: Likewise.
474 * avr-dis.c: Likewise.
475 * cgen-asm.in: Likewise.
476 * cgen-dis.in: Likewise.
477 * cgen-ibld.in: Likewise.
478 * cgen-opc.c: Likewise.
479 * cris-dis.c: Likewise.
480 * d10v-dis.c: Likewise.
481 * d30v-dis.c: Likewise.
482 * d30v-opc.c: Likewise.
483 * dis-buf.c: Likewise.
484 * dlx-dis.c: Likewise.
485 * h8300-dis.c: Likewise.
486 * h8500-dis.c: Likewise.
487 * hppa-dis.c: Likewise.
488 * i370-dis.c: Likewise.
489 * i370-opc.c: Likewise.
490 * m10200-dis.c: Likewise.
491 * m10300-dis.c: Likewise.
492 * m68k-dis.c: Likewise.
493 * m88k-dis.c: Likewise.
494 * mips-dis.c: Likewise.
495 * mmix-dis.c: Likewise.
496 * msp430-dis.c: Likewise.
497 * ns32k-dis.c: Likewise.
498 * or32-dis.c: Likewise.
499 * or32-opc.c: Likewise.
500 * pdp11-dis.c: Likewise.
501 * pj-dis.c: Likewise.
502 * s390-dis.c: Likewise.
503 * sh-dis.c: Likewise.
504 * sh64-dis.c: Likewise.
505 * sparc-dis.c: Likewise.
506 * sparc-opc.c: Likewise.
507 * sysdep.h: Likewise.
508 * tic30-dis.c: Likewise.
509 * tic4x-dis.c: Likewise.
510 * tic80-dis.c: Likewise.
511 * v850-dis.c: Likewise.
512 * v850-opc.c: Likewise.
513 * vax-dis.c: Likewise.
514 * w65-dis.c: Likewise.
515 * z8kgen.c: Likewise.
3e7d61b2 516
47b0e7ad
NC		 517 * fr30-*: Regenerate.
518 * frv-*: Regenerate.
519 * ip2k-*: Regenerate.
520 * iq2000-*: Regenerate.
521 * m32r-*: Regenerate.
522 * ms1-*: Regenerate.
523 * openrisc-*: Regenerate.
524 * xstormy16-*: Regenerate.
525
cc16ba8c
BE		 5262005-06-23 Ben Elliston <bje@gnu.org>
527
528 * m68k-dis.c: Use ISC C90.
529 * m68k-opc.c: Formatting fixes.
530
4b185e97
DU		 5312005-06-16 David Ung <davidu@mips.com>
532
3e7d61b2
AM		 533 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
534 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 535
ac188222
DB		 5362005-06-15 Dave Brolley <brolley@redhat.com>
537
538 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 539 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 540 ms1-opc.h: New files, Morpho ms1 target.
541
542 2004-05-14 Stan Cox <scox@redhat.com>
543
544 * disassemble.c (ARCH_ms1): Define.
545 (disassembler): Handle bfd_arch_ms1
546
547 2004-05-13 Michael Snyder <msnyder@redhat.com>
548
549 * Makefile.am, Makefile.in: Add ms1 target.
550 * configure.in: Ditto.
551
6b5d3a4d
ZW		 5522005-06-08 Zack Weinberg <zack@codesourcery.com>
553
554 * arm-opc.h: Delete; fold contents into ...
555 * arm-dis.c: ... here. Move includes of internal COFF headers
556 next to includes of internal ELF headers.
557 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
558 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
559 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
560 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
561 (iwmmxt_wwnames, iwmmxt_wwssnames):
562 Make const.
563 (regnames): Remove iWMMXt coprocessor register sets.
564 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
565 (get_arm_regnames): Adjust fourth argument to match above changes.
566 (set_iwmmxt_regnames): Delete.
567 (print_insn_arm): Constify 'c'. Use ISO syntax for function
568 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
569 and iwmmxt_cregnames, not set_iwmmxt_regnames.
570 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
571 ISO syntax for function pointer calls.
572
4a5329c6
ZW		 5732005-06-07 Zack Weinberg <zack@codesourcery.com>
574
575 * arm-dis.c: Split up the comments describing the format codes, so
576 that the ARM and 16-bit Thumb opcode tables each have comments
577 preceding them that describe all the codes, and only the codes,
578 valid in those tables. (32-bit Thumb table is already like this.)
579 Reorder the lists in all three comments to match the order in
580 which the codes are implemented.
581 Remove all forward declarations of static functions. Convert all
582 function definitions to ISO C format.
583 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
584 Return nothing.
585 (print_insn_thumb16): Remove unused case 'I'.
586 (print_insn): Update for changed calling convention of subroutines.
587
3d456fa1
JB		 5882005-05-25 Jan Beulich <jbeulich@novell.com>
589
590 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
591 hex (but retain it being displayed as signed). Remove redundant
592 checks. Add handling of displacements for 16-bit addressing in Intel
593 mode.
594
2888cb7a
JB		 5952005-05-25 Jan Beulich <jbeulich@novell.com>
596
597 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
598 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
599 masking of 'rm' in 16-bit memory address handling.
600
1ed8e1e4
AM		 6012005-05-19 Anton Blanchard <anton@samba.org>
602
603 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
604 (print_ppc_disassembler_options): Document it.
605 * ppc-opc.c (SVC_LEV): Define.
606 (LEV): Allow optional operand.
607 (POWER5): Define.
608 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
609 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
610
49cc2e69
KC		 6112005-05-19 Kelley Cook <kcook@gcc.gnu.org>
612
613 * Makefile.in: Regenerate.
614
c19d1205
ZW		 6152005-05-17 Zack Weinberg <zack@codesourcery.com>
616
617 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
618 instructions. Adjust disassembly of some opcodes to match
619 unified syntax.
620 (thumb32_opcodes): New table.
621 (print_insn_thumb): Rename print_insn_thumb16; don't handle
622 two-halfword branches here.
623 (print_insn_thumb32): New function.
624 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
625 and print_insn_thumb32. Be consistent about order of
626 halfwords when printing 32-bit instructions.
627
003519a7
L		 6282005-05-07 H.J. Lu <hongjiu.lu@intel.com>
629
630 PR 843
631 * i386-dis.c (branch_v_mode): New.
632 (indirEv): Use branch_v_mode instead of v_mode.
633 (OP_E): Handle branch_v_mode.
634
920a34a7
L		 6352005-05-07 H.J. Lu <hongjiu.lu@intel.com>
636
637 * d10v-dis.c (dis_2_short): Support 64bit host.
638
5de773c1
NC		 6392005-05-07 Nick Clifton <nickc@redhat.com>
640
641 * po/nl.po: Updated translation.
642
f4321104
NC		 6432005-05-07 Nick Clifton <nickc@redhat.com>
644
645 * Update the address and phone number of the FSF organization in
646 the GPL notices in the following files:
647 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
648 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
649 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
650 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
651 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
652 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
653 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
654 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
655 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
656 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
657 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
658 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
659 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
660 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
661 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
662 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
663 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
664 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
665 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
666 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
667 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
668 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
669 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
670 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
671 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
672 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
673 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
674 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
675 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
676 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
677 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
678 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
679 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
680
10b076a2
JW		 6812005-05-05 James E Wilson <wilson@specifixinc.com>
682
683 * ia64-opc.c: Include sysdep.h before libiberty.h.
684
022716b6
NC		 6852005-05-05 Nick Clifton <nickc@redhat.com>
686
687 * configure.in (ALL_LINGUAS): Add vi.
688 * configure: Regenerate.
689 * po/vi.po: New.
690
db5152b4
JG		 6912005-04-26 Jerome Guitton <guitton@gnat.com>
692
693 * configure.in: Fix the check for basename declaration.
694 * configure: Regenerate.
695
eed0d89a
AM		 6962005-04-19 Alan Modra <amodra@bigpond.net.au>
697
698 * ppc-opc.c (RTO): Define.
699 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
700 entries to suit PPC440.
701
791fe849
MK		 7022005-04-18 Mark Kettenis <kettenis@gnu.org>
703
704 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
705 Add xcrypt-ctr.
706
ffe58f7c
NC		 7072005-04-14 Nick Clifton <nickc@redhat.com>
708
709 * po/fi.po: New translation: Finnish.
710 * configure.in (ALL_LINGUAS): Add fi.
711 * configure: Regenerate.
712
9e9b66a9
AM		 7132005-04-14 Alan Modra <amodra@bigpond.net.au>
714
715 * Makefile.am (NO_WERROR): Define.
716 * configure.in: Invoke AM_BINUTILS_WARNINGS.
717 * Makefile.in: Regenerate.
718 * aclocal.m4: Regenerate.
719 * configure: Regenerate.
720
9494d739
NC		 7212005-04-04 Nick Clifton <nickc@redhat.com>
722
723 * fr30-asm.c: Regenerate.
724 * frv-asm.c: Regenerate.
725 * iq2000-asm.c: Regenerate.
726 * m32r-asm.c: Regenerate.
727 * openrisc-asm.c: Regenerate.
728
6128c599
JB		 7292005-04-01 Jan Beulich <jbeulich@novell.com>
730
731 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
732 visible operands in Intel mode. The first operand of monitor is
733 %rax in 64-bit mode.
734
373ff435
JB		 7352005-04-01 Jan Beulich <jbeulich@novell.com>
736
737 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
738 easier future additions.
739
4bd60896
JG		 7402005-03-31 Jerome Guitton <guitton@gnat.com>
741
742 * configure.in: Check for basename.
743 * configure: Regenerate.
744 * config.in: Ditto.
745
4cc91dba
L		 7462005-03-29 H.J. Lu <hongjiu.lu@intel.com>
747
748 * i386-dis.c (SEG_Fixup): New.
749 (Sv): New.
750 (dis386): Use "Sv" for 0x8c and 0x8e.
751
ec72cfe5
NC		 7522005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
753 Nick Clifton <nickc@redhat.com>
c19d1205 754
ec72cfe5
NC		 755 * vax-dis.c: (entry_addr): New varible: An array of user supplied
756 function entry mask addresses.
757 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 758 elements in entry_addr.
ec72cfe5
NC		 759 (entry_addr_total_slots): New variable: The total number of
760 elements in entry_addr.
761 (parse_disassembler_options): New function. Fills in the entry_addr
762 array.
763 (free_entry_array): New function. Release the memory used by the
764 entry addr array. Suppressed because there is no way to call it.
765 (is_function_entry): Check if a given address is a function's
766 start address by looking at supplied entry mask addresses and
767 symbol information, if available.
768 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
769
85064c79
L		 7702005-03-23 H.J. Lu <hongjiu.lu@intel.com>
771
772 * cris-dis.c (print_with_operands): Use ~31L for long instead
773 of ~31.
774
de7141c7
L		 7752005-03-20 H.J. Lu <hongjiu.lu@intel.com>
776
777 * mmix-opc.c (O): Revert the last change.
778 (Z): Likewise.
779
e493ab45
L		 7802005-03-19 H.J. Lu <hongjiu.lu@intel.com>
781
782 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
783 (Z): Likewise.
784
d8d7c459
HPN		 7852005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
786
787 * mmix-opc.c (O, Z): Force expression as unsigned long.
788
ebdb0383
NC		 7892005-03-18 Nick Clifton <nickc@redhat.com>
790
791 * ip2k-asm.c: Regenerate.
792 * op/opcodes.pot: Regenerate.
793
1ad12f97
NC		 7942005-03-16 Nick Clifton <nickc@redhat.com>
795 Ben Elliston <bje@au.ibm.com>
796
569acd2c 797 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 798 compiler command line. Enabled by default. Disable via
569acd2c 799 --disable-werror.
1ad12f97
NC		 800 * configure: Regenerate.
801
4eb30afc
AM		 8022005-03-16 Alan Modra <amodra@bigpond.net.au>
803
804 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
805 BOOKE.
806
ea8409f7
AM		 8072005-03-15 Alan Modra <amodra@bigpond.net.au>
808
729ae8d2
AM		 809 * po/es.po: Commit new Spanish translation.
810
ea8409f7
AM		 811 * po/fr.po: Commit new French translation.
812
4f495e61
NC		 8132005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
814
815 * vax-dis.c: Fix spelling error
816 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
817 of just "Entry mask: < r1 ... >"
818
0a003adc
ZW		 8192005-03-12 Zack Weinberg <zack@codesourcery.com>
820
821 * arm-dis.c (arm_opcodes): Document %E and %V.
822 Add entries for v6T2 ARM instructions:
823 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
824 (print_insn_arm): Add support for %E and %V.
885fc257 825 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 826
da99ee72
AM		 8272005-03-10 Jeff Baker <jbaker@qnx.com>
828 Alan Modra <amodra@bigpond.net.au>
829
830 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
831 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
832 (SPRG_MASK): Delete.
833 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 834 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 835 mfsprg4..7 after msprg and consolidate.
836
220abb21
AM		 8372005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
838
839 * vax-dis.c (entry_mask_bit): New array.
840 (print_insn_vax): Decode function entry mask.
841
0e06657a
AH		 8422005-03-07 Aldy Hernandez <aldyh@redhat.com>
843
844 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
845
06647dfd
AM		 8462005-03-05 Alan Modra <amodra@bigpond.net.au>
847
848 * po/opcodes.pot: Regenerate.
849
82b829a7
RR		 8502005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
851
220abb21 852 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 853 (dsmOneArcInst): Use the enum values for the decoding class.
854 Remove redundant case in the switch for decodingClass value 11.
82b829a7 855
c4a530c5
JB		 8562005-03-02 Jan Beulich <jbeulich@novell.com>
857
858 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
859 accesses.
860 (OP_C): Consider lock prefix in non-64-bit modes.
861
47d8304e
AM		 8622005-02-24 Alan Modra <amodra@bigpond.net.au>
863
864 * cris-dis.c (format_hex): Remove ineffective warning fix.
865 * crx-dis.c (make_instruction): Warning fix.
866 * frv-asm.c: Regenerate.
867
ec36c4a4
NC		 8682005-02-23 Nick Clifton <nickc@redhat.com>
869
33b71eeb
NC		 870 * cgen-dis.in: Use bfd_byte for buffers that are passed to
871 read_memory.
06647dfd 872
33b71eeb 873 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 874
ec36c4a4
NC		 875 * crx-dis.c (make_instruction): Move argument structure into inner
876 scope and ensure that all of its fields are initialised before
877 they are used.
878
33b71eeb
NC		 879 * fr30-asm.c: Regenerate.
880 * fr30-dis.c: Regenerate.
881 * frv-asm.c: Regenerate.
882 * frv-dis.c: Regenerate.
883 * ip2k-asm.c: Regenerate.
884 * ip2k-dis.c: Regenerate.
885 * iq2000-asm.c: Regenerate.
886 * iq2000-dis.c: Regenerate.
887 * m32r-asm.c: Regenerate.
888 * m32r-dis.c: Regenerate.
889 * openrisc-asm.c: Regenerate.
890 * openrisc-dis.c: Regenerate.
891 * xstormy16-asm.c: Regenerate.
892 * xstormy16-dis.c: Regenerate.
893
53c9ebc5
AM		 8942005-02-22 Alan Modra <amodra@bigpond.net.au>
895
896 * arc-ext.c: Warning fixes.
897 * arc-ext.h: Likewise.
898 * cgen-opc.c: Likewise.
899 * ia64-gen.c: Likewise.
900 * maxq-dis.c: Likewise.
901 * ns32k-dis.c: Likewise.
902 * w65-dis.c: Likewise.
903 * ia64-asmtab.c: Regenerate.
904
610ad19b
AM		 9052005-02-22 Alan Modra <amodra@bigpond.net.au>
906
907 * fr30-desc.c: Regenerate.
908 * fr30-desc.h: Regenerate.
909 * fr30-opc.c: Regenerate.
910 * fr30-opc.h: Regenerate.
911 * frv-desc.c: Regenerate.
912 * frv-desc.h: Regenerate.
913 * frv-opc.c: Regenerate.
914 * frv-opc.h: Regenerate.
915 * ip2k-desc.c: Regenerate.
916 * ip2k-desc.h: Regenerate.
917 * ip2k-opc.c: Regenerate.
918 * ip2k-opc.h: Regenerate.
919 * iq2000-desc.c: Regenerate.
920 * iq2000-desc.h: Regenerate.
921 * iq2000-opc.c: Regenerate.
922 * iq2000-opc.h: Regenerate.
923 * m32r-desc.c: Regenerate.
924 * m32r-desc.h: Regenerate.
925 * m32r-opc.c: Regenerate.
926 * m32r-opc.h: Regenerate.
927 * m32r-opinst.c: Regenerate.
928 * openrisc-desc.c: Regenerate.
929 * openrisc-desc.h: Regenerate.
930 * openrisc-opc.c: Regenerate.
931 * openrisc-opc.h: Regenerate.
932 * xstormy16-desc.c: Regenerate.
933 * xstormy16-desc.h: Regenerate.
934 * xstormy16-opc.c: Regenerate.
935 * xstormy16-opc.h: Regenerate.
936
db9db6f2
AM		 9372005-02-21 Alan Modra <amodra@bigpond.net.au>
938
939 * Makefile.am: Run "make dep-am"
940 * Makefile.in: Regenerate.
941
bf143b25
NC		 9422005-02-15 Nick Clifton <nickc@redhat.com>
943
944 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
945 compile time warnings.
946 (print_keyword): Likewise.
947 (default_print_insn): Likewise.
948
949 * fr30-desc.c: Regenerated.
950 * fr30-desc.h: Regenerated.
951 * fr30-dis.c: Regenerated.
952 * fr30-opc.c: Regenerated.
953 * fr30-opc.h: Regenerated.
954 * frv-desc.c: Regenerated.
955 * frv-dis.c: Regenerated.
956 * frv-opc.c: Regenerated.
957 * ip2k-asm.c: Regenerated.
958 * ip2k-desc.c: Regenerated.
959 * ip2k-desc.h: Regenerated.
960 * ip2k-dis.c: Regenerated.
961 * ip2k-opc.c: Regenerated.
962 * ip2k-opc.h: Regenerated.
963 * iq2000-desc.c: Regenerated.
964 * iq2000-dis.c: Regenerated.
965 * iq2000-opc.c: Regenerated.
966 * m32r-asm.c: Regenerated.
967 * m32r-desc.c: Regenerated.
968 * m32r-desc.h: Regenerated.
969 * m32r-dis.c: Regenerated.
970 * m32r-opc.c: Regenerated.
971 * m32r-opc.h: Regenerated.
972 * m32r-opinst.c: Regenerated.
973 * openrisc-desc.c: Regenerated.
974 * openrisc-desc.h: Regenerated.
975 * openrisc-dis.c: Regenerated.
976 * openrisc-opc.c: Regenerated.
977 * openrisc-opc.h: Regenerated.
978 * xstormy16-desc.c: Regenerated.
979 * xstormy16-desc.h: Regenerated.
980 * xstormy16-dis.c: Regenerated.
981 * xstormy16-opc.c: Regenerated.
982 * xstormy16-opc.h: Regenerated.
983
d6098898
L		 9842005-02-14 H.J. Lu <hongjiu.lu@intel.com>
985
986 * dis-buf.c (perror_memory): Use sprintf_vma to print out
987 address.
988
5a84f3e0
NC		 9892005-02-11 Nick Clifton <nickc@redhat.com>
990
bc18c937
NC		 991 * iq2000-asm.c: Regenerate.
992
5a84f3e0
NC		 993 * frv-dis.c: Regenerate.
994
0a40490e
JB		 9952005-02-07 Jim Blandy <jimb@redhat.com>
996
997 * Makefile.am (CGEN): Load guile.scm before calling the main
998 application script.
999 * Makefile.in: Regenerated.
1000 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1001 Simply pass the cgen-opc.scm path to ${cgen} as its first
1002 argument; ${cgen} itself now contains the '-s', or whatever is
1003 appropriate for the Scheme being used.
1004
c46f8c51
AC		 10052005-01-31 Andrew Cagney <cagney@gnu.org>
1006
1007 * configure: Regenerate to track ../gettext.m4.
1008
60b9a617
JB		 10092005-01-31 Jan Beulich <jbeulich@novell.com>
1010
1011 * ia64-gen.c (NELEMS): Define.
1012 (shrink): Generate alias with missing second predicate register when
1013 opcode has two outputs and these are both predicates.
1014 * ia64-opc-i.c (FULL17): Define.
1015 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1016 here to generate output template.
1017 (TBITCM, TNATCM): Undefine after use.
1018 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1019 first input. Add ld16 aliases without ar.csd as second output. Add
1020 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1021 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1022 ar.ccv as third/fourth inputs. Consolidate through...
1023 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1024 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1025 * ia64-asmtab.c: Regenerate.
1026
a53bf506
AC		 10272005-01-27 Andrew Cagney <cagney@gnu.org>
1028
1029 * configure: Regenerate to track ../gettext.m4 change.
1030
90219bd0
AO		 10312005-01-25 Alexandre Oliva <aoliva@redhat.com>
1032
1033 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1034 * frv-asm.c: Rebuilt.
1035 * frv-desc.c: Rebuilt.
1036 * frv-desc.h: Rebuilt.
1037 * frv-dis.c: Rebuilt.
1038 * frv-ibld.c: Rebuilt.
1039 * frv-opc.c: Rebuilt.
1040 * frv-opc.h: Rebuilt.
1041
45181ed1
AC		 10422005-01-24 Andrew Cagney <cagney@gnu.org>
1043
1044 * configure: Regenerate, ../gettext.m4 was updated.
1045
9e836e3d
FF		 10462005-01-21 Fred Fish <fnf@specifixinc.com>
1047
1048 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1049 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1050 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1051 * mips-dis.c: Ditto.
1052
5e8cb021
AM		 10532005-01-20 Alan Modra <amodra@bigpond.net.au>
1054
1055 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1056
986e18a5
FF		 10572005-01-19 Fred Fish <fnf@specifixinc.com>
1058
1059 * mips-dis.c (no_aliases): New disassembly option flag.
1060 (set_default_mips_dis_options): Init no_aliases to zero.
1061 (parse_mips_dis_option): Handle no-aliases option.
1062 (print_insn_mips): Ignore table entries that are aliases
1063 if no_aliases is set.
1064 (print_insn_mips16): Ditto.
1065 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1066 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1067 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1068 * mips16-opc.c (mips16_opcodes): Ditto.
1069
e38bc3b5
NC		 10702005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1071
1072 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1073 (inheritance diagram): Add missing edge.
1074 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1075 easier for the testsuite.
1076 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1077 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1078 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1079 arch_sh2a_or_sh4_up child.
1080 (sh_table): Do renaming as above.
1081 Correct comment for ldc.l for gas testsuite to read.
1082 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1083 Correct comments for movy.w and movy.l for gas testsuite to read.
1084 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1085
9df48ba9
L		 10862005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1087
1088 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1089
2033b4b9
L		 10902005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1093
0bcb06d2
AS		 10942005-01-10 Andreas Schwab <schwab@suse.de>
1095
1096 * disassemble.c (disassemble_init_for_target) <case
1097 bfd_arch_ia64>: Set skip_zeroes to 16.
1098 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1099
47add74d
TL		 11002004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1101
1102 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1103
246f4c05
SS		 11042004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1105
1106 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1107 memory references. Convert avr_operand() to C90 formatting.
1108
0e1200e5
TL		 11092004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1110
1111 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1112
89a649f7
TL		 11132004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1114
1115 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1116 (no_op_insn): Initialize array with instructions that have no
1117 operands.
1118 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1119
6255809c
RE		 11202004-11-29 Richard Earnshaw <rearnsha@arm.com>
1121
1122 * arm-dis.c: Correct top-level comment.
1123
2fbad815
RE		 11242004-11-27 Richard Earnshaw <rearnsha@arm.com>
1125
1126 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1127 architecuture defining the insn.
1128 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1129 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1130 field.
2fbad815
RE		 1131 Also include opcode/arm.h.
1132 * Makefile.am (arm-dis.lo): Update dependency list.
1133 * Makefile.in: Regenerate.
1134
d81acc42
NC		 11352004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1136
1137 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1138 reflect the change to the short immediate syntax.
1139
ca4f2377
AM		 11402004-11-19 Alan Modra <amodra@bigpond.net.au>
1141
5da8bf1b
AM		 1142 * or32-opc.c (debug): Warning fix.
1143 * po/POTFILES.in: Regenerate.
1144
ca4f2377
AM		 1145 * maxq-dis.c: Formatting.
1146 (print_insn): Warning fix.
1147
b7693d02
DJ		 11482004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1149
1150 * arm-dis.c (WORD_ADDRESS): Define.
1151 (print_insn): Use it. Correct big-endian end-of-section handling.
1152
300dac7e
NC		 11532004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1154 Vineet Sharma <vineets@noida.hcltech.com>
1155
1156 * maxq-dis.c: New file.
1157 * disassemble.c (ARCH_maxq): Define.
610ad19b 1158 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1159 instructions..
1160 * configure.in: Add case for bfd_maxq_arch.
1161 * configure: Regenerate.
1162 * Makefile.am: Add support for maxq-dis.c
1163 * Makefile.in: Regenerate.
1164 * aclocal.m4: Regenerate.
1165
42048ee7
TL		 11662004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1167
1168 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1169 mode.
1170 * crx-dis.c: Likewise.
1171
bd21e58e
HPN		 11722004-11-04 Hans-Peter Nilsson <hp@axis.com>
1173
1174 Generally, handle CRISv32.
1175 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1176 (struct cris_disasm_data): New type.
1177 (format_reg, format_hex, cris_constraint, print_flags)
1178 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1179 callers changed.
1180 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1181 (print_insn_crisv32_without_register_prefix)
1182 (print_insn_crisv10_v32_with_register_prefix)
1183 (print_insn_crisv10_v32_without_register_prefix)
1184 (cris_parse_disassembler_options): New functions.
1185 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1186 parameter. All callers changed.
1187 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1188 failure.
1189 (cris_constraint) <case 'Y', 'U'>: New cases.
1190 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1191 for constraint 'n'.
1192 (print_with_operands) <case 'Y'>: New case.
1193 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1194 <case 'N', 'Y', 'Q'>: New cases.
1195 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1196 (print_insn_cris_with_register_prefix)
1197 (print_insn_cris_without_register_prefix): Call
1198 cris_parse_disassembler_options.
1199 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1200 for CRISv32 and the size of immediate operands. New v32-only
1201 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1202 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1203 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1204 Change brp to be v3..v10.
1205 (cris_support_regs): New vector.
1206 (cris_opcodes): Update head comment. New format characters '[',
1207 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1208 Add new opcodes for v32 and adjust existing opcodes to accommodate
1209 differences to earlier variants.
1210 (cris_cond15s): New vector.
1211
9306ca4a
JB		 12122004-11-04 Jan Beulich <jbeulich@novell.com>
1213
1214 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1215 (indirEb): Remove.
1216 (Mp): Use f_mode rather than none at all.
1217 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1218 replaces what previously was x_mode; x_mode now means 128-bit SSE
1219 operands.
1220 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1221 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1222 pinsrw's second operand is Edqw.
1223 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1224 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1225 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1226 mode when an operand size override is present or always suffixing.
1227 More instructions will need to be added to this group.
1228 (putop): Handle new macro chars 'C' (short/long suffix selector),
1229 'I' (Intel mode override for following macro char), and 'J' (for
1230 adding the 'l' prefix to far branches in AT&T mode). When an
1231 alternative was specified in the template, honor macro character when
1232 specified for Intel mode.
1233 (OP_E): Handle new *_mode values. Correct pointer specifications for
1234 memory operands. Consolidate output of index register.
1235 (OP_G): Handle new *_mode values.
1236 (OP_I): Handle const_1_mode.
1237 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1238 respective opcode prefix bits have been consumed.
1239 (OP_EM, OP_EX): Provide some default handling for generating pointer
1240 specifications.
1241
f39c96a9
TL		 12422004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1243
1244 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1245 COP_INST macro.
1246
812337be
TL		 12472004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1248
1249 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1250 (getregliststring): Support HI/LO and user registers.
610ad19b 1251 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1252 rearrangement done in CRX opcode header file.
1253 (crx_regtab): Likewise.
1254 (crx_optab): Likewise.
610ad19b 1255 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1256 formats.
1257 support new Co-Processor instruction 'cpi'.
1258
4030fa5a
NC		 12592004-10-27 Nick Clifton <nickc@redhat.com>
1260
1261 * opcodes/iq2000-asm.c: Regenerate.
1262 * opcodes/iq2000-desc.c: Regenerate.
1263 * opcodes/iq2000-desc.h: Regenerate.
1264 * opcodes/iq2000-dis.c: Regenerate.
1265 * opcodes/iq2000-ibld.c: Regenerate.
1266 * opcodes/iq2000-opc.c: Regenerate.
1267 * opcodes/iq2000-opc.h: Regenerate.
1268
fc3d45e8
TL		 12692004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1270
1271 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1272 us4, us5 (respectively).
1273 Remove unsupported 'popa' instruction.
1274 Reverse operands order in store co-processor instructions.
1275
3c55da70
AM		 12762004-10-15 Alan Modra <amodra@bigpond.net.au>
1277
1278 * Makefile.am: Run "make dep-am"
1279 * Makefile.in: Regenerate.
1280
7fa3d080
BW		 12812004-10-12 Bob Wilson <bob.wilson@acm.org>
1282
1283 * xtensa-dis.c: Use ISO C90 formatting.
1284
e612bb4d
AM		 12852004-10-09 Alan Modra <amodra@bigpond.net.au>
1286
1287 * ppc-opc.c: Revert 2004-09-09 change.
1288
43cd72b9
BW		 12892004-10-07 Bob Wilson <bob.wilson@acm.org>
1290
1291 * xtensa-dis.c (state_names): Delete.
1292 (fetch_data): Use xtensa_isa_maxlength.
1293 (print_xtensa_operand): Replace operand parameter with opcode/operand
1294 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1295 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1296 instruction bundles. Use xmalloc instead of malloc.
1297
bbac1f2a
NC		 12982004-10-07 David Gibson <david@gibson.dropbear.id.au>
1299
1300 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1301 initializers.
1302
48c9f030
NC		 13032004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1304
1305 * crx-opc.c (crx_instruction): Support Co-processor insns.
1306 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1307 (getregliststring): Change function to use the above enum.
1308 (print_arg): Handle CO-Processor insns.
1309 (crx_cinvs): Add 'b' option to invalidate the branch-target
1310 cache.
1311
12c64a4e
AH		 13122004-10-06 Aldy Hernandez <aldyh@redhat.com>
1313
1314 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1315 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1316 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1317 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1318 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1319
14127cc4
NC		 13202004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1321
1322 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1323 rather than add it.
1324
0dd132b6
NC		 13252004-09-30 Paul Brook <paul@codesourcery.com>
1326
1327 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1328 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1329
3f85e526
L		 13302004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1331
1332 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1333 (CONFIG_STATUS_DEPENDENCIES): New.
1334 (Makefile): Removed.
1335 (config.status): Likewise.
1336 * Makefile.in: Regenerated.
1337
8ae85421
AM		 13382004-09-17 Alan Modra <amodra@bigpond.net.au>
1339
1340 * Makefile.am: Run "make dep-am".
1341 * Makefile.in: Regenerate.
1342 * aclocal.m4: Regenerate.
1343 * configure: Regenerate.
1344 * po/POTFILES.in: Regenerate.
1345 * po/opcodes.pot: Regenerate.
1346
24443139
AS		 13472004-09-11 Andreas Schwab <schwab@suse.de>
1348
1349 * configure: Rebuild.
1350
2a309db0
AM		 13512004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1352
1353 * ppc-opc.c (L): Make this field not optional.
1354
42851540
NC		 13552004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1356
1357 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1358 Fix parameter to 'm[t|f]csr' insns.
1359
979273e3
NN		 13602004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1361
1362 * configure.in: Autoupdate to autoconf 2.59.
1363 * aclocal.m4: Rebuild with aclocal 1.4p6.
1364 * configure: Rebuild with autoconf 2.59.
1365 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1366 bfd changes for autoconf 2.59 on the way).
1367 * config.in: Rebuild with autoheader 2.59.
1368
ac28a1cb
RS		 13692004-08-27 Richard Sandiford <rsandifo@redhat.com>
1370
1371 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1372
30d1c836
ML		 13732004-07-30 Michal Ludvig <mludvig@suse.cz>
1374
1375 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1376 (GRPPADLCK2): New define.
1377 (twobyte_has_modrm): True for 0xA6.
1378 (grps): GRPPADLCK2 for opcode 0xA6.
1379
0b0ac059
AO		 13802004-07-29 Alexandre Oliva <aoliva@redhat.com>
1381
1382 Introduce SH2a support.
1383 * sh-opc.h (arch_sh2a_base): Renumber.
1384 (arch_sh2a_nofpu_base): Remove.
1385 (arch_sh_base_mask): Adjust.
1386 (arch_opann_mask): New.
1387 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1388 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1389 (sh_table): Adjust whitespace.
1390 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1391 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1392 instruction list throughout.
1393 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1394 of arch_sh2a in instruction list throughout.
1395 (arch_sh2e_up): Accomodate above changes.
1396 (arch_sh2_up): Ditto.
1397 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1398 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1399 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1400 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1401 * sh-opc.h (arch_sh2a_nofpu): New.
1402 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1403 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1404 instruction.
1405 2004-01-20 DJ Delorie <dj@redhat.com>
1406 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1407 2003-12-29 DJ Delorie <dj@redhat.com>
1408 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1409 sh_opcode_info, sh_table): Add sh2a support.
1410 (arch_op32): New, to tag 32-bit opcodes.
1411 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1412 2003-12-02 Michael Snyder <msnyder@redhat.com>
1413 * sh-opc.h (arch_sh2a): Add.
1414 * sh-dis.c (arch_sh2a): Handle.
1415 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1416
670ec21d
NC		 14172004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1418
1419 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1420
ed049af3
NC		 14212004-07-22 Nick Clifton <nickc@redhat.com>
1422
1423 PR/280
1424 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1425 insns - this is done by objdump itself.
1426 * h8500-dis.c (print_insn_h8500): Likewise.
1427
20f0a1fc
NC		 14282004-07-21 Jan Beulich <jbeulich@novell.com>
1429
1430 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1431 regardless of address size prefix in effect.
1432 (ptr_reg): Size or address registers does not depend on rex64, but
1433 on the presence of an address size override.
1434 (OP_MMX): Use rex.x only for xmm registers.
1435 (OP_EM): Use rex.z only for xmm registers.
1436
6f14957b
MR		 14372004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1438
1439 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1440 move/branch operations to the bottom so that VR5400 multimedia
1441 instructions take precedence in disassembly.
1442
1586d91e
MR		 14432004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1444
1445 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1446 ISA-specific "break" encoding.
1447
982de27a
NC		 14482004-07-13 Elvis Chiang <elvisfb@gmail.com>
1449
1450 * arm-opc.h: Fix typo in comment.
1451
4300ab10
AS		 14522004-07-11 Andreas Schwab <schwab@suse.de>
1453
1454 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1455
8577e690
AS		 14562004-07-09 Andreas Schwab <schwab@suse.de>
1457
1458 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1459
1fe1f39c
NC		 14602004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1461
1462 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1463 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1464 (crx-dis.lo): New target.
1465 (crx-opc.lo): Likewise.
1466 * Makefile.in: Regenerate.
1467 * configure.in: Handle bfd_crx_arch.
1468 * configure: Regenerate.
1469 * crx-dis.c: New file.
1470 * crx-opc.c: New file.
1471 * disassemble.c (ARCH_crx): Define.
1472 (disassembler): Handle ARCH_crx.
1473
7a33b495
JW		 14742004-06-29 James E Wilson <wilson@specifixinc.com>
1475
1476 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1477 * ia64-asmtab.c: Regnerate.
1478
98e69875
AM		 14792004-06-28 Alan Modra <amodra@bigpond.net.au>
1480
1481 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1482 (extract_fxm): Don't test dialect.
1483 (XFXFXM_MASK): Include the power4 bit.
1484 (XFXM): Add p4 param.
1485 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1486
a53b85e2
AO		 14872004-06-27 Alexandre Oliva <aoliva@redhat.com>
1488
1489 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1490 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1491
d0618d1c
AM		 14922004-06-26 Alan Modra <amodra@bigpond.net.au>
1493
1494 * ppc-opc.c (BH, XLBH_MASK): Define.
1495 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1496
1d9f512f
AM		 14972004-06-24 Alan Modra <amodra@bigpond.net.au>
1498
1499 * i386-dis.c (x_mode): Comment.
1500 (two_source_ops): File scope.
1501 (float_mem): Correct fisttpll and fistpll.
1502 (float_mem_mode): New table.
1503 (dofloat): Use it.
1504 (OP_E): Correct intel mode PTR output.
1505 (ptr_reg): Use open_char and close_char.
1506 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1507 operands. Set two_source_ops.
1508
52886d70
AM		 15092004-06-15 Alan Modra <amodra@bigpond.net.au>
1510
1511 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1512 instead of _raw_size.
1513
bad9ceea
JJ		 15142004-06-08 Jakub Jelinek <jakub@redhat.com>
1515
1516 * ia64-gen.c (in_iclass): Handle more postinc st
1517 and ld variants.
1518 * ia64-asmtab.c: Rebuilt.
1519
0451f5df
MS		 15202004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1521
1522 * s390-opc.txt: Correct architecture mask for some opcodes.
1523 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1524 in the esa mode as well.
1525
f6f9408f
JR		 15262004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1527
1528 * sh-dis.c (target_arch): Make unsigned.
1529 (print_insn_sh): Replace (most of) switch with a call to
1530 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1531 * sh-opc.h: Redefine architecture flags values.
1532 Add sh3-nommu architecture.
1533 Reorganise <arch>_up macros so they make more visual sense.
1534 (SH_MERGE_ARCH_SET): Define new macro.
1535 (SH_VALID_BASE_ARCH_SET): Likewise.
1536 (SH_VALID_MMU_ARCH_SET): Likewise.
1537 (SH_VALID_CO_ARCH_SET): Likewise.
1538 (SH_VALID_ARCH_SET): Likewise.
1539 (SH_MERGE_ARCH_SET_VALID): Likewise.
1540 (SH_ARCH_SET_HAS_FPU): Likewise.
1541 (SH_ARCH_SET_HAS_DSP): Likewise.
1542 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1543 (sh_get_arch_from_bfd_mach): Add prototype.
1544 (sh_get_arch_up_from_bfd_mach): Likewise.
1545 (sh_get_bfd_mach_from_arch_set): Likewise.
1546 (sh_merge_bfd_arc): Likewise.
1547
be8c092b
NC		 15482004-05-24 Peter Barada <peter@the-baradas.com>
1549
1550 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1551 into new match_insn_m68k function. Loop over canidate
1552 matches and select first that completely matches.
be8c092b
NC		 1553 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1554 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1555 to verify addressing for MAC/EMAC.
be8c092b
NC		 1556 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1557 reigster halves since 'fpu' and 'spl' look misleading.
1558 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1559 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1560 first, tighten up match masks.
1561 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1562 'size' from special case code in print_insn_m68k to
1563 determine decode size of insns.
1564
a30e9cc4
AM		 15652004-05-19 Alan Modra <amodra@bigpond.net.au>
1566
1567 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1568 well as when -mpower4.
1569
9598fbe5
NC		 15702004-05-13 Nick Clifton <nickc@redhat.com>
1571
1572 * po/fr.po: Updated French translation.
1573
6b6e92f4
NC		 15742004-05-05 Peter Barada <peter@the-baradas.com>
1575
1576 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1577 variants in arch_mask. Only set m68881/68851 for 68k chips.
1578 * m68k-op.c: Switch from ColdFire chips to core variants.
1579
a404d431
AM		 15802004-05-05 Alan Modra <amodra@bigpond.net.au>
1581
a30e9cc4 1582 PR 147.
a404d431
AM		 1583 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1584
f3806e43
BE		 15852004-04-29 Ben Elliston <bje@au.ibm.com>
1586
520ceea4
BE		 1587 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1588 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1589
1f1799d5
KK		 15902004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1591
1592 * sh-dis.c (print_insn_sh): Print the value in constant pool
1593 as a symbol if it looks like a symbol.
1594
fd99574b
NC		 15952004-04-22 Peter Barada <peter@the-baradas.com>
1596
1597 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1598 appropriate ColdFire architectures.
1599 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1600 mask addressing.
1601 Add EMAC instructions, fix MAC instructions. Remove
1602 macmw/macml/msacmw/msacml instructions since mask addressing now
1603 supported.
1604
b4781d44
JJ		 16052004-04-20 Jakub Jelinek <jakub@redhat.com>
1606
1607 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1608 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1609 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1610 macro. Adjust all users.
1611
91809fda 16122004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1613
91809fda
NC		 1614 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1615 separately.
1616
f4453dfa
NC		 16172004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1618
1619 * m32r-asm.c: Regenerate.
1620
9b0de91a
SS		 16212004-03-29 Stan Shebs <shebs@apple.com>
1622
1623 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1624 used.
1625
e20c0b3d
AM		 16262004-03-19 Alan Modra <amodra@bigpond.net.au>
1627
1628 * aclocal.m4: Regenerate.
1629 * config.in: Regenerate.
1630 * configure: Regenerate.
1631 * po/POTFILES.in: Regenerate.
1632 * po/opcodes.pot: Regenerate.
1633
fdd12ef3
AM		 16342004-03-16 Alan Modra <amodra@bigpond.net.au>
1635
1636 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1637 PPC_OPERANDS_GPR_0.
1638 * ppc-opc.c (RA0): Define.
1639 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1640 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1641 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1642
2dc111b3 16432004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1644
1645 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1646
7bfeee7b
AM		 16472004-03-15 Alan Modra <amodra@bigpond.net.au>
1648
1649 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1650
7ffdda93
ML		 16512004-03-12 Michal Ludvig <mludvig@suse.cz>
1652
1653 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1654 (grps): Delete GRPPLOCK entry.
7ffdda93 1655
cc0ec051
AM		 16562004-03-12 Alan Modra <amodra@bigpond.net.au>
1657
1658 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1659 (M, Mp): Use OP_M.
1660 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1661 (GRPPADLCK): Define.
1662 (dis386): Use NOP_Fixup on "nop".
1663 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1664 (twobyte_has_modrm): Set for 0xa7.
1665 (padlock_table): Delete. Move to..
1666 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1667 and clflush.
1668 (print_insn): Revert PADLOCK_SPECIAL code.
1669 (OP_E): Delete sfence, lfence, mfence checks.
1670
4fd61dcb
JJ		 16712004-03-12 Jakub Jelinek <jakub@redhat.com>
1672
1673 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1674 (INVLPG_Fixup): New function.
1675 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1676
0f10071e
ML		 16772004-03-12 Michal Ludvig <mludvig@suse.cz>
1678
1679 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1680 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1681 (padlock_table): New struct with PadLock instructions.
1682 (print_insn): Handle PADLOCK_SPECIAL.
1683
c02908d2
AM		 16842004-03-12 Alan Modra <amodra@bigpond.net.au>
1685
1686 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1687 (OP_E): Twiddle clflush to sfence here.
1688
d5bb7600
NC		 16892004-03-08 Nick Clifton <nickc@redhat.com>
1690
1691 * po/de.po: Updated German translation.
1692
ae51a426
JR		 16932003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1694
1695 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1696 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1697 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1698 accordingly.
1699
676a64f4
RS		 17002004-03-01 Richard Sandiford <rsandifo@redhat.com>
1701
1702 * frv-asm.c: Regenerate.
1703 * frv-desc.c: Regenerate.
1704 * frv-desc.h: Regenerate.
1705 * frv-dis.c: Regenerate.
1706 * frv-ibld.c: Regenerate.
1707 * frv-opc.c: Regenerate.
1708 * frv-opc.h: Regenerate.
1709
c7a48b9a
RS		 17102004-03-01 Richard Sandiford <rsandifo@redhat.com>
1711
1712 * frv-desc.c, frv-opc.c: Regenerate.
1713
8ae0baa2
RS		 17142004-03-01 Richard Sandiford <rsandifo@redhat.com>
1715
1716 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1717
ce11586c
JR		 17182004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1719
1720 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1721 Also correct mistake in the comment.
1722
6a5709a5
JR		 17232004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1724
1725 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1726 ensure that double registers have even numbers.
1727 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1728 that reserved instruction 0xfffd does not decode the same
1729 as 0xfdfd (ftrv).
1730 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1731 REG_N refers to a double register.
1732 Add REG_N_B01 nibble type and use it instead of REG_NM
1733 in ftrv.
1734 Adjust the bit patterns in a few comments.
1735
e5d2b64f 17362004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1737
1738 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1739
1f04b05f
AH		 17402004-02-20 Aldy Hernandez <aldyh@redhat.com>
1741
1742 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1743
2f3b8700
AH		 17442004-02-20 Aldy Hernandez <aldyh@redhat.com>
1745
1746 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1747
f0b26da6 17482004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1749
1750 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1751 mtivor32, mtivor33, mtivor34.
f0b26da6 1752
23d59c56 17532004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1754
1755 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1756
34920d91
NC		 17572004-02-10 Petko Manolov <petkan@nucleusys.com>
1758
1759 * arm-opc.h Maverick accumulator register opcode fixes.
1760
44d86481
BE		 17612004-02-13 Ben Elliston <bje@wasabisystems.com>
1762
1763 * m32r-dis.c: Regenerate.
1764
17707c23
MS		 17652004-01-27 Michael Snyder <msnyder@redhat.com>
1766
1767 * sh-opc.h (sh_table): "fsrra", not "fssra".
1768
fe3a9bc4
NC		 17692004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1770
1771 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1772 contraints.
1773
ff24f124
JJ		 17742004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1775
1776 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1777
a02a862a
AM		 17782004-01-19 Alan Modra <amodra@bigpond.net.au>
1779
1780 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1781 1. Don't print scale factor on AT&T mode when index missing.
1782
d164ea7f
AO		 17832004-01-16 Alexandre Oliva <aoliva@redhat.com>
1784
1785 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1786 when loaded into XR registers.
1787
cb10e79a
RS		 17882004-01-14 Richard Sandiford <rsandifo@redhat.com>
1789
1790 * frv-desc.h: Regenerate.
1791 * frv-desc.c: Regenerate.
1792 * frv-opc.c: Regenerate.
1793
f532f3fa
MS		 17942004-01-13 Michael Snyder <msnyder@redhat.com>
1795
1796 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1797
e45d0630
PB		 17982004-01-09 Paul Brook <paul@codesourcery.com>
1799
1800 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1801 specific opcodes.
1802
3ba7a1aa
DJ		 18032004-01-07 Daniel Jacobowitz <drow@mvista.com>
1804
1805 * Makefile.am (libopcodes_la_DEPENDENCIES)
1806 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1807 comment about the problem.
1808 * Makefile.in: Regenerate.
1809
ba2d3f07
AO		 18102004-01-06 Alexandre Oliva <aoliva@redhat.com>
1811
1812 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1813 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1814 cut&paste errors in shifting/truncating numerical operands.
1815 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1816 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1817 (parse_uslo16): Likewise.
1818 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1819 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1820 (parse_s12): Likewise.
1821 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1822 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1823 (parse_uslo16): Likewise.
1824 (parse_uhi16): Parse gothi and gotfuncdeschi.
1825 (parse_d12): Parse got12 and gotfuncdesc12.
1826 (parse_s12): Likewise.
1827
3ab48931
NC		 18282004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1829
1830 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1831 instruction which looks similar to an 'rla' instruction.
a0bd404e 1832
c9e214e5 1833For older changes see ChangeLog-0203
252b5132
RH		 1834\f
1835Local Variables:
2f6d2f85
NC		 1836mode: change-log
1837left-margin: 8
1838fill-column: 74
252b5132
RH		 1839version-control: never
1840End:
GDB Binutils - Deliverables
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