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* gas/config/tc-arm.c (T16_32_TAB): Add _sevl.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
53c4b28b
MGD		 12012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
2
3 * arm-dis.c (arm_opcodes): Add SEVL.
4 (thumb_opcodes): Likewise.
5 (thumb32_opcodes): Likewise.
6
e797f7e0
MGD		 72012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
8
9 * arm-dis.c (data_barrier_option): New function.
10 (print_insn_arm): Use data_barrier_option.
11 (print_insn_thumb32): Use data_barrier_option.
12
e2efe87d
MGD		 132012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
14
15 * arm-dis.c (COND_UNCOND): New constant.
16 (print_insn_coprocessor): Add support for %u format specifier.
17 (print_insn_neon): Likewise.
18
2c63854f
DM		 192012-08-21 David S. Miller <davem@davemloft.net>
20
21 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
22 F3F4 macro.
23
e67ed0e8
AM		 242012-08-20 Edmar Wienskoski <edmar@freescale.com>
25
26 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
27 vabsduh, vabsduw, mviwsplt.
28
7b458c12
L		 292012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
30
31 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
32 CPU_BTVER2_FLAGS.
33
e67ed0e8 34 * i386-opc.h: Update CpuPRFCHW comment.
7b458c12
L		 35
36 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
37 * i386-init.h: Regenerated.
38 * i386-tbl.h: Likewise.
39
eb80cb87
NC		 402012-08-17 Nick Clifton <nickc@redhat.com>
41
42 * po/uk.po: New Ukranian translation.
43 * configure.in (ALL_LINGUAS): Add uk.
44 * configure: Regenerate.
45
8baf7b78
PB		 462012-08-16 Peter Bergner <bergner@vnet.ibm.com>
47
48 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
49 RBX for the third operand.
50 <"lswi">: Use RAX for second and NBI for the third operand.
51
3d557b4c
DD		 522012-08-15 DJ Delorie <dj@redhat.com>
53
54 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
55 operands, so that data addresses can be corrected when not
56 ES-overridden.
57 * rl78-decode.c: Regenerate.
58 * rl78-dis.c (print_insn_rl78): Make order of modifiers
59 irrelevent. When the 'e' specifier is used on an operand and no
60 ES prefix is provided, adjust address to make it absolute.
61
588925d0
PB		 622012-08-15 Peter Bergner <bergner@vnet.ibm.com>
63
64 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
65
9f6a6cc0
PB		 662012-08-15 Peter Bergner <bergner@vnet.ibm.com>
67
68 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
69
fc8c4fd1
MR		 702012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
71
72 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
73 macros, use local variables for info struct member accesses,
74 update the type of the variable used to hold the instruction
75 word.
76 (print_insn_mips, print_mips16_insn_arg): Likewise.
77 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
78 local variables for info struct member accesses.
79 (print_insn_micromips): Add GET_OP_S local macro.
80 (_print_insn_mips): Update the type of the variable used to hold
81 the instruction word.
82
a06ea964 832012-08-13 Ian Bolton <ian.bolton@arm.com>
e67ed0e8
AM		 84 Laurent Desnogues <laurent.desnogues@arm.com>
85 Jim MacArthur <jim.macarthur@arm.com>
86 Marcus Shawcroft <marcus.shawcroft@arm.com>
87 Nigel Stephens <nigel.stephens@arm.com>
88 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
89 Richard Earnshaw <rearnsha@arm.com>
90 Sofiane Naci <sofiane.naci@arm.com>
91 Tejas Belagod <tejas.belagod@arm.com>
92 Yufeng Zhang <yufeng.zhang@arm.com>
a06ea964
NC		 93
94 * Makefile.am: Add AArch64.
95 * Makefile.in: Regenerate.
96 * aarch64-asm.c: New file.
97 * aarch64-asm.h: New file.
98 * aarch64-dis.c: New file.
99 * aarch64-dis.h: New file.
100 * aarch64-gen.c: New file.
101 * aarch64-opc.c: New file.
102 * aarch64-opc.h: New file.
103 * aarch64-tbl.h: New file.
104 * configure.in: Add AArch64.
105 * configure: Regenerate.
106 * disassemble.c: Add AArch64.
107 * aarch64-asm-2.c: New file (automatically generated).
108 * aarch64-dis-2.c: New file (automatically generated).
109 * aarch64-opc-2.c: New file (automatically generated).
110 * po/POTFILES.in: Regenerate.
111
35d0a169
MR		 1122012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
113
114 * micromips-opc.c (micromips_opcodes): Update comment.
115 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
116 instructions for IOCT as appropriate.
117 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
118 opcode_is_member.
119 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
120 the result of a check for the -Wno-missing-field-initializers
121 GCC option.
122 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
123 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
124 compilation.
125 (mips16-opc.lo): Likewise.
126 (micromips-opc.lo): Likewise.
127 * aclocal.m4: Regenerate.
128 * configure: Regenerate.
129 * Makefile.in: Regenerate.
130
5c5acbbd
L		 1312012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
132
133 PR gas/14423
134 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
135 * i386-init.h: Regenerated.
136
3c892704
NC		 1372012-08-09 Nick Clifton <nickc@redhat.com>
138
139 * po/vi.po: Updated Vietnamese translation.
140
d7189fa5
RM		 1412012-08-07 Roland McGrath <mcgrathr@google.com>
142
143 * i386-dis.c (reg_table): Fill out REG_0F0D table with
144 AMD-reserved cases as "prefetch".
145 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
146 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
147 (reg_table): Use those under REG_0F18.
148 (mod_table): Add those cases as "nop/reserved".
149
4c692bc7
JB		 1502012-08-07 Jan Beulich <jbeulich@suse.com>
151
152 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
153
de882298
RM		 1542012-08-06 Roland McGrath <mcgrathr@google.com>
155
156 * i386-dis.c (print_insn): Print spaces between multiple excess
157 prefixes. Return actual number of excess prefixes consumed,
158 not always one.
159
160 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
161
7bb15c6f
RM		 1622012-08-06 Roland McGrath <mcgrathr@google.com>
163 Victor Khimenko <khim@google.com>
164 H.J. Lu <hongjiu.lu@intel.com>
165
166 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
167 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
168 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
169 (OP_E_register): Likewise.
170 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
171
3843081d
JBG		 1722012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
173
174 * configure.in: Formatting.
175 * configure: Regenerate.
176
48891606
AM		 1772012-08-01 Alan Modra <amodra@gmail.com>
178
179 * h8300-dis.c: Fix printf arg warnings.
180 * i960-dis.c: Likewise.
181 * mips-dis.c: Likewise.
182 * pdp11-dis.c: Likewise.
183 * sh-dis.c: Likewise.
184 * v850-dis.c: Likewise.
185 * configure.in: Formatting.
186 * configure: Regenerate.
187 * rl78-decode.c: Regenerate.
188 * po/POTFILES.in: Regenerate.
189
03f66e8a 1902012-07-31 Chao-Ying Fu <fu@mips.com>
e67ed0e8
AM		 191 Catherine Moore <clm@codesourcery.com>
192 Maciej W. Rozycki <macro@codesourcery.com>
03f66e8a
MR		 193
194 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
195 (DSP_VOLA): Likewise.
196 (D32, D33): Likewise.
197 (micromips_opcodes): Add DSP ASE instructions.
48891606 198 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
03f66e8a
MR		 199 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
200
94948e64
JB		 2012012-07-31 Jan Beulich <jbeulich@suse.com>
202
203 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
204 instruction group. Mark as requiring AVX2.
205 * i386-tbl.h: Re-generate.
206
a6dc81d2
NC		 2072012-07-30 Nick Clifton <nickc@redhat.com>
208
209 * po/opcodes.pot: Updated template.
210 * po/es.po: Updated Spanish translation.
211 * po/fi.po: Updated Finnish translation.
212
c4dd807e
MF		 2132012-07-27 Mike Frysinger <vapier@gentoo.org>
214
215 * configure.in (BFD_VERSION): Run bfd/configure --version and
216 parse the output of that.
217 * configure: Regenerate.
218
03edbe3b
JL		 2192012-07-25 James Lemke <jwlemke@codesourcery.com>
220
221 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
222
63d08c68
NC		 2232012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
224 Dr David Alan Gilbert <dave@treblig.org>
d908c8af
NC		 225
226 PR binutils/13135
227 * arm-dis.c: Add necessary casts for printing integer values.
228 Use %s when printing string values.
229 * hppa-dis.c: Likewise.
230 * m68k-dis.c: Likewise.
231 * microblaze-dis.c: Likewise.
232 * mips-dis.c: Likewise.
233 * sparc-dis.c: Likewise.
234
ff688e1f
L		 2352012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
236
237 PR binutils/14355
238 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
239 (VEX_LEN_0FXOP_08_CD): Likewise.
240 (VEX_LEN_0FXOP_08_CE): Likewise.
241 (VEX_LEN_0FXOP_08_CF): Likewise.
242 (VEX_LEN_0FXOP_08_EC): Likewise.
243 (VEX_LEN_0FXOP_08_ED): Likewise.
244 (VEX_LEN_0FXOP_08_EE): Likewise.
245 (VEX_LEN_0FXOP_08_EF): Likewise.
246 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
247 vpcomub, vpcomuw, vpcomud, vpcomuq.
248 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
249 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
250 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
251 VEX_LEN_0FXOP_08_EF.
252
e2e1fcde
L		 2532012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
254
255 * i386-dis.c (PREFIX_0F38F6): New.
256 (prefix_table): Add adcx, adox instructions.
257 (three_byte_table): Use PREFIX_0F38F6.
258 (mod_table): Add rdseed instruction.
259 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
260 (cpu_flags): Likewise.
261 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
262 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
263 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
264 prefetchw.
265 * i386-tbl.h: Regenerate.
266 * i386-init.h: Likewise.
267
8b99bf0b
TS		 2682012-07-05 Thomas Schwinge <thomas@codesourcery.com>
269
f4263ca2 270 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 271
416cf80a
SK		 2722012-07-05 Sean Keys <skeys@ipdatasys.com>
273
274 * xgate-dis.c: Removed an IF statement that will
e67ed0e8
AM		 275 always be false due to overlapping operand masks.
276 * xgate-opc.c: Corrected 'com' opcode entry and
277 fixed spacing.
416cf80a 278
9fa0f14a
RM		 2792012-07-02 Roland McGrath <mcgrathr@google.com>
280
281 * i386-opc.tbl: Add RepPrefixOk to nop.
282 * i386-tbl.h: Regenerate.
283
4c6a93d3
NC		 2842012-06-28 Nick Clifton <nickc@redhat.com>
285
286 * po/vi.po: Updated Vietnamese translation.
287
29c048b6
RM		 2882012-06-22 Roland McGrath <mcgrathr@google.com>
289
fe13e45b
RM		 290 * i386-opc.tbl: Add RepPrefixOk to ret.
291 * i386-tbl.h: Regenerate.
292
29c048b6
RM		 293 * i386-opc.h (RepPrefixOk): New enum constant.
294 (i386_opcode_modifier): New bitfield 'repprefixok'.
295 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
296 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
297 instructions that have IsString.
298 * i386-tbl.h: Regenerate.
299
c7a8dbf9
AS		 3002012-06-11 Andreas Schwab <schwab@linux-m68k.org>
301
302 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
303 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
304 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
305 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
306 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
307 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
308 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
309 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
310 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
311
94caa966
AM		 3122012-05-19 Alan Modra <amodra@gmail.com>
313
314 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
315 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
316
5eb3690e
AM		 3172012-05-18 Alan Modra <amodra@gmail.com>
318
71fe7bab
AM		 319 * ia64-opc.c: Remove #include "ansidecl.h".
320 * z8kgen.c: Include sysdep.h first.
321
5eb3690e
AM		 322 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
323 * bfin-dis.c: Likewise.
324 * i860-dis.c: Likewise.
325 * ia64-dis.c: Likewise.
326 * ia64-gen.c: Likewise.
327 * m68hc11-dis.c: Likewise.
328 * mmix-dis.c: Likewise.
329 * msp430-dis.c: Likewise.
330 * or32-dis.c: Likewise.
331 * rl78-dis.c: Likewise.
332 * rx-dis.c: Likewise.
333 * tic4x-dis.c: Likewise.
334 * tilegx-opc.c: Likewise.
335 * tilepro-opc.c: Likewise.
336 * rx-decode.c: Regenerate.
337
a4ebc835
AM		 3382012-05-17 James Lemke <jwlemke@codesourcery.com>
339
340 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
341
98c76446
AM		 3422012-05-17 James Lemke <jwlemke@codesourcery.com>
343
344 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
345
df7b86aa
NC		 3462012-05-17 Daniel Richard G. <skunk@iskunk.org>
347 Nick Clifton <nickc@redhat.com>
348
349 PR 14072
350 * configure.in: Add check that sysdep.h has been included before
351 any system header files.
352 * configure: Regenerate.
353 * config.in: Regenerate.
354 * sysdep.h: Generate an error if included before config.h.
355 * alpha-opc.c: Include sysdep.h before any other header file.
356 * alpha-dis.c: Likewise.
357 * avr-dis.c: Likewise.
358 * cgen-opc.c: Likewise.
359 * cr16-dis.c: Likewise.
360 * cris-dis.c: Likewise.
361 * crx-dis.c: Likewise.
362 * d10v-dis.c: Likewise.
363 * d10v-opc.c: Likewise.
364 * d30v-dis.c: Likewise.
365 * d30v-opc.c: Likewise.
366 * h8500-dis.c: Likewise.
367 * i370-dis.c: Likewise.
368 * i370-opc.c: Likewise.
369 * m10200-dis.c: Likewise.
370 * m10300-dis.c: Likewise.
371 * micromips-opc.c: Likewise.
372 * mips-opc.c: Likewise.
373 * mips61-opc.c: Likewise.
374 * moxie-dis.c: Likewise.
375 * or32-opc.c: Likewise.
376 * pj-dis.c: Likewise.
377 * ppc-dis.c: Likewise.
378 * ppc-opc.c: Likewise.
379 * s390-dis.c: Likewise.
380 * sh-dis.c: Likewise.
381 * sh64-dis.c: Likewise.
382 * sparc-dis.c: Likewise.
383 * sparc-opc.c: Likewise.
384 * spu-dis.c: Likewise.
385 * tic30-dis.c: Likewise.
386 * tic54x-dis.c: Likewise.
387 * tic80-dis.c: Likewise.
388 * tic80-opc.c: Likewise.
389 * tilegx-dis.c: Likewise.
390 * tilepro-dis.c: Likewise.
391 * v850-dis.c: Likewise.
392 * v850-opc.c: Likewise.
393 * vax-dis.c: Likewise.
394 * w65-dis.c: Likewise.
395 * xgate-dis.c: Likewise.
396 * xtensa-dis.c: Likewise.
397 * rl78-decode.opc: Likewise.
398 * rl78-decode.c: Regenerate.
399 * rx-decode.opc: Likewise.
400 * rx-decode.c: Regenerate.
401
e1dad58d
AM		 4022012-05-17 Alan Modra <amodra@gmail.com>
403
404 * ppc_dis.c: Don't include elf/ppc.h.
405
101af531
NC		 4062012-05-16 Meador Inge <meadori@codesourcery.com>
407
408 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
409 to PUSH/POP {reg}.
410
6927f982
NC		 4112012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
412 Stephane Carrez <stcarrez@nerim.fr>
413
414 * configure.in: Add S12X and XGATE co-processor support to m68hc11
415 target.
416 * disassemble.c: Likewise.
417 * configure: Regenerate.
418 * m68hc11-dis.c: Make objdump output more consistent, use hex
419 instead of decimal and use 0x prefix for hex.
420 * m68hc11-opc.c: Add S12X and XGATE opcodes.
421
b9c361e0
JL		 4222012-05-14 James Lemke <jwlemke@codesourcery.com>
423
424 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
425 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
426 (vle_opcd_indices): New array.
427 (lookup_vle): New function.
428 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
429 (print_insn_powerpc): Likewise.
430 * ppc-opc.c: Likewise.
431
4322012-05-14 Catherine Moore <clm@codesourcery.com>
433 Maciej W. Rozycki <macro@codesourcery.com>
434 Rhonda Wittels <rhonda@codesourcery.com>
435 Nathan Froyd <froydnj@codesourcery.com>
436
437 * ppc-opc.c (insert_arx, extract_arx): New functions.
438 (insert_ary, extract_ary): New functions.
439 (insert_li20, extract_li20): New functions.
440 (insert_rx, extract_rx): New functions.
441 (insert_ry, extract_ry): New functions.
442 (insert_sci8, extract_sci8): New functions.
443 (insert_sci8n, extract_sci8n): New functions.
444 (insert_sd4h, extract_sd4h): New functions.
445 (insert_sd4w, extract_sd4w): New functions.
446 (insert_vlesi, extract_vlesi): New functions.
447 (insert_vlensi, extract_vlensi): New functions.
448 (insert_vleui, extract_vleui): New functions.
449 (insert_vleil, extract_vleil): New functions.
450 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
451 (BI16, BI32, BO32, B8): New.
452 (B15, B24, CRD32, CRS): New.
453 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
454 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
455 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
456 (SH6_MASK): Use PPC_OPSHIFT_INV.
457 (SI8, UI5, OIMM5, UI7, BO16): New.
458 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
459 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
460 (ALLOW8_SPRG): New.
461 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
462 (OPVUP, OPVUP_MASK OPVUP): New
463 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
464 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
465 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
466 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
467 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
468 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
469 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
470 (SE_IM5, SE_IM5_MASK): New.
471 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
472 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
473 (BO32DNZ, BO32DZ): New.
474 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
475 (PPCVLE): New.
476 (powerpc_opcodes): Add new VLE instructions. Update existing
477 instruction to include PPCVLE if supported.
478 * ppc-dis.c (ppc_opts): Add vle entry.
479 (get_powerpc_dialect): New function.
480 (powerpc_init_dialect): VLE support.
481 (print_insn_big_powerpc): Call get_powerpc_dialect.
482 (print_insn_little_powerpc): Likewise.
483 (operand_value_powerpc): Handle negative shift counts.
484 (print_insn_powerpc): Handle 2-byte instruction lengths.
485
208a4923
NC		 4862012-05-11 Daniel Richard G. <skunk@iskunk.org>
487
488 PR binutils/14028
489 * configure.in: Invoke ACX_HEADER_STRING.
490 * configure: Regenerate.
491 * config.in: Regenerate.
492 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
493 string.h and strings.h.
494
6750a3a7
NC		 4952012-05-11 Nick Clifton <nickc@redhat.com>
496
497 PR binutils/14006
498 * arm-dis.c (print_insn): Fix detection of instruction mode in
499 files containing multiple executable sections.
500
f6c1a2d5
NC		 5012012-05-03 Sean Keys <skeys@ipdatasys.com>
502
503 * Makefile.in, configure: regenerate
504 * disassemble.c (disassembler): Recognize ARCH_XGATE.
505 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
506 New functions.
507 * configure.in: Recognize xgate.
508 * xgate-dis.c, xgate-opc.c: New files for support of xgate
509 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
510 and opcode generation for xgate.
511
78e98aab
DD		 5122012-04-30 DJ Delorie <dj@redhat.com>
513
514 * rx-decode.opc (MOV): Do not sign-extend immediates which are
515 already the maximum bit size.
516 * rx-decode.c: Regenerate.
517
ec668d69
DM		 5182012-04-27 David S. Miller <davem@davemloft.net>
519
2e52845b
DM		 520 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
521 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
522
58004e23
DM		 523 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
524 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
525
698544e1
DM		 526 * sparc-opc.c (CBCOND): New define.
527 (CBCOND_XCC): Likewise.
528 (cbcond): New helper macro.
529 (sparc_opcodes): Add compare-and-branch instructions.
530
6cda1326
DM		 531 * sparc-dis.c (print_insn_sparc): Handle ')'.
532 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
533
ec668d69
DM		 534 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
535 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
536
2615994e
DM		 5372012-04-12 David S. Miller <davem@davemloft.net>
538
539 * sparc-dis.c (X_DISP10): Define.
540 (print_insn_sparc): Handle '='.
541
5de10af0
MF		 5422012-04-01 Mike Frysinger <vapier@gentoo.org>
543
544 * bfin-dis.c (fmtconst): Replace decimal handling with a single
545 sprintf call and the '*' field width.
546
55a36193
MK		 5472012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
548
549 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
550
d6688282
AM		 5512012-03-16 Alan Modra <amodra@gmail.com>
552
553 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
554 (powerpc_opcd_indices): Bump array size.
555 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
556 corresponding to unused opcodes to following entry.
557 (lookup_powerpc): New function, extracted and optimised from..
558 (print_insn_powerpc): ..here.
559
b240011a
AM		 5602012-03-15 Alan Modra <amodra@gmail.com>
561 James Lemke <jwlemke@codesourcery.com>
562
563 * disassemble.c (disassemble_init_for_target): Handle ppc init.
564 * ppc-dis.c (private): New var.
565 (powerpc_init_dialect): Don't return calloc failure, instead use
566 private.
567 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
568 (powerpc_opcd_indices): New array.
569 (disassemble_init_powerpc): New function.
570 (print_insn_big_powerpc): Don't init dialect here.
571 (print_insn_little_powerpc): Likewise.
572 (print_insn_powerpc): Start search using powerpc_opcd_indices.
573
aea77599
AM		 5742012-03-10 Edmar Wienskoski <edmar@freescale.com>
575
576 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
577 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
578 (PPCVEC2, PPCTMR, E6500): New short names.
579 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
580 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
581 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
582 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
583 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
584 optional operands on sync instruction for E6500 target.
585
5333187a
AK		 5862012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
587
588 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
589
a597d2d3
AM		 5902012-02-27 Alan Modra <amodra@gmail.com>
591
592 * mt-dis.c: Regenerate.
593
3f26eb3a
AM		 5942012-02-27 Alan Modra <amodra@gmail.com>
595
596 * v850-opc.c (extract_v8): Rearrange to make it obvious this
597 is the inverse of corresponding insert function.
598 (extract_d22, extract_u9, extract_r4): Likewise.
599 (extract_d9): Correct sign extension.
600 (extract_d16_15): Don't assume "long" is 32 bits, and don't
601 rely on implementation defined behaviour for shift right of
602 signed types.
603 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
604 (extract_d23): Likewise, and correct mask.
605
1f42f8b3
AM		 6062012-02-27 Alan Modra <amodra@gmail.com>
607
608 * crx-dis.c (print_arg): Mask constant to 32 bits.
609 * crx-opc.c (cst4_map): Use int array.
610
cdb06235
AM		 6112012-02-27 Alan Modra <amodra@gmail.com>
612
613 * arc-dis.c (BITS): Don't use shifts to mask off bits.
614 (FIELDD): Sign extend with xor,sub.
615
6f7be959
WL		 6162012-02-25 Walter Lee <walt@tilera.com>
617
618 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
619 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
620 TILEPRO_OPC_LW_TLS_SN.
621
82c2def5
L		 6222012-02-21 H.J. Lu <hongjiu.lu@intel.com>
623
624 * i386-opc.h (HLEPrefixNone): New.
625 (HLEPrefixLock): Likewise.
626 (HLEPrefixAny): Likewise.
627 (HLEPrefixRelease): Likewise.
628
42164a71
L		 6292012-02-08 H.J. Lu <hongjiu.lu@intel.com>
630
631 * i386-dis.c (HLE_Fixup1): New.
632 (HLE_Fixup2): Likewise.
633 (HLE_Fixup3): Likewise.
634 (Ebh1): Likewise.
635 (Evh1): Likewise.
636 (Ebh2): Likewise.
637 (Evh2): Likewise.
638 (Ebh3): Likewise.
639 (Evh3): Likewise.
640 (MOD_C6_REG_7): Likewise.
641 (MOD_C7_REG_7): Likewise.
642 (RM_C6_REG_7): Likewise.
643 (RM_C7_REG_7): Likewise.
644 (XACQUIRE_PREFIX): Likewise.
645 (XRELEASE_PREFIX): Likewise.
646 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
647 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
648 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
649 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
650 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
651 MOD_C6_REG_7 and MOD_C7_REG_7.
652 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
653 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
654 xtest.
655 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
656 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
657
658 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
659 CPU_RTM_FLAGS.
660 (cpu_flags): Add CpuHLE and CpuRTM.
661 (opcode_modifiers): Add HLEPrefixOk.
662
663 * i386-opc.h (CpuHLE): New.
664 (CpuRTM): Likewise.
665 (HLEPrefixOk): Likewise.
666 (i386_cpu_flags): Add cpuhle and cpurtm.
667 (i386_opcode_modifier): Add hleprefixok.
668
669 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
670 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
671 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
672 operand. Add xacquire, xrelease, xabort, xbegin, xend and
673 xtest.
674 * i386-init.h: Regenerated.
675 * i386-tbl.h: Likewise.
676
21abe33a
DD		 6772012-01-24 DJ Delorie <dj@redhat.com>
678
679 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
680 * rl78-decode.c: Regenerate.
681
e20cc039
AM		 6822012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
683
684 PR binutils/10173
685 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
686
e143d25c
AS		 6872012-01-17 Andreas Schwab <schwab@linux-m68k.org>
688
689 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
690 register and move them after pmove with PSR/PCSR register.
691
8729a6f6
L		 6922012-01-13 H.J. Lu <hongjiu.lu@intel.com>
693
694 * i386-dis.c (mod_table): Add vmfunc.
695
696 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
697 (cpu_flags): CpuVMFUNC.
698
699 * i386-opc.h (CpuVMFUNC): New.
700 (i386_cpu_flags): Add cpuvmfunc.
701
702 * i386-opc.tbl: Add vmfunc.
703 * i386-init.h: Regenerated.
704 * i386-tbl.h: Likewise.
5011093d 705
23e1d329 706For older changes see ChangeLog-2011
252b5132
RH		 707\f
708Local Variables:
2f6d2f85
NC		 709mode: change-log
710left-margin: 8
711fill-column: 74
252b5132
RH		 712version-control: never
713End:
GDB Binutils - Deliverables
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