x86: CpuXSAVE is a prereq for various other features
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
59ef5df4
JB
12018-04-26 Jan Beulich <jbeulich@suse.com>
2
3 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
4 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
5 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
6 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
7 * i386-init.h: Re-generate.
8
6e041cf4
JB
92018-04-26 Jan Beulich <jbeulich@suse.com>
10
11 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
12 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
13 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
14 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
15 comment.
16 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
17 and CpuRegMask.
18 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
19 CpuRegMask: Delete.
20 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
21 cpuregzmm, and cpuregmask.
22 * i386-init.h: Re-generate.
23 * i386-tbl.h: Re-generate.
24
0e0eea78
JB
252018-04-26 Jan Beulich <jbeulich@suse.com>
26
27 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
28 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
29 * i386-init.h: Re-generate.
30
2f1bada2
JB
312018-04-26 Jan Beulich <jbeulich@suse.com>
32
33 * i386-gen.c (VexImmExt): Delete.
34 * i386-opc.h (VexImmExt, veximmext): Delete.
35 * i386-opc.tbl: Drop all VexImmExt uses.
36 * i386-tlb.h: Re-generate.
37
bacd1457
JB
382018-04-25 Jan Beulich <jbeulich@suse.com>
39
40 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
41 register-only forms.
42 * i386-tlb.h: Re-generate.
43
10bba94b
TC
442018-04-25 Tamar Christina <tamar.christina@arm.com>
45
46 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
47
c48935d7
IT
482018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
49
50 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
51 PREFIX_0F1C.
52 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
53 (cpu_flags): Add CpuCLDEMOTE.
54 * i386-init.h: Regenerate.
55 * i386-opc.h (enum): Add CpuCLDEMOTE,
56 (i386_cpu_flags): Add cpucldemote.
57 * i386-opc.tbl: Add cldemote.
58 * i386-tbl.h: Regenerate.
59
211dc24b
AM
602018-04-16 Alan Modra <amodra@gmail.com>
61
62 * Makefile.am: Remove sh5 and sh64 support.
63 * configure.ac: Likewise.
64 * disassemble.c: Likewise.
65 * disassemble.h: Likewise.
66 * sh-dis.c: Likewise.
67 * sh64-dis.c: Delete.
68 * sh64-opc.c: Delete.
69 * sh64-opc.h: Delete.
70 * Makefile.in: Regenerate.
71 * configure: Regenerate.
72 * po/POTFILES.in: Regenerate.
73
a9a4b302
AM
742018-04-16 Alan Modra <amodra@gmail.com>
75
76 * Makefile.am: Remove w65 support.
77 * configure.ac: Likewise.
78 * disassemble.c: Likewise.
79 * disassemble.h: Likewise.
80 * w65-dis.c: Delete.
81 * w65-opc.h: Delete.
82 * Makefile.in: Regenerate.
83 * configure: Regenerate.
84 * po/POTFILES.in: Regenerate.
85
04cb01fd
AM
862018-04-16 Alan Modra <amodra@gmail.com>
87
88 * configure.ac: Remove we32k support.
89 * configure: Regenerate.
90
c2bf1eec
AM
912018-04-16 Alan Modra <amodra@gmail.com>
92
93 * Makefile.am: Remove m88k support.
94 * configure.ac: Likewise.
95 * disassemble.c: Likewise.
96 * disassemble.h: Likewise.
97 * m88k-dis.c: Delete.
98 * Makefile.in: Regenerate.
99 * configure: Regenerate.
100 * po/POTFILES.in: Regenerate.
101
6793974d
AM
1022018-04-16 Alan Modra <amodra@gmail.com>
103
104 * Makefile.am: Remove i370 support.
105 * configure.ac: Likewise.
106 * disassemble.c: Likewise.
107 * disassemble.h: Likewise.
108 * i370-dis.c: Delete.
109 * i370-opc.c: Delete.
110 * Makefile.in: Regenerate.
111 * configure: Regenerate.
112 * po/POTFILES.in: Regenerate.
113
e82aa794
AM
1142018-04-16 Alan Modra <amodra@gmail.com>
115
116 * Makefile.am: Remove h8500 support.
117 * configure.ac: Likewise.
118 * disassemble.c: Likewise.
119 * disassemble.h: Likewise.
120 * h8500-dis.c: Delete.
121 * h8500-opc.h: Delete.
122 * Makefile.in: Regenerate.
123 * configure: Regenerate.
124 * po/POTFILES.in: Regenerate.
125
fceadf09
AM
1262018-04-16 Alan Modra <amodra@gmail.com>
127
128 * configure.ac: Remove tahoe support.
129 * configure: Regenerate.
130
ae1d3843
L
1312018-04-15 H.J. Lu <hongjiu.lu@intel.com>
132
133 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
134 umwait.
135 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
136 64-bit mode.
137 * i386-tbl.h: Regenerated.
138
de89d0a3
IT
1392018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
140
141 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
142 PREFIX_MOD_1_0FAE_REG_6.
143 (va_mode): New.
144 (OP_E_register): Use va_mode.
145 * i386-dis-evex.h (prefix_table):
146 New instructions (see prefixes above).
147 * i386-gen.c (cpu_flag_init): Add WAITPKG.
148 (cpu_flags): Likewise.
149 * i386-opc.h (enum): Likewise.
150 (i386_cpu_flags): Likewise.
151 * i386-opc.tbl: Add umonitor, umwait, tpause.
152 * i386-init.h: Regenerate.
153 * i386-tbl.h: Likewise.
154
a8eb42a8
AM
1552018-04-11 Alan Modra <amodra@gmail.com>
156
157 * opcodes/i860-dis.c: Delete.
158 * opcodes/i960-dis.c: Delete.
159 * Makefile.am: Remove i860 and i960 support.
160 * configure.ac: Likewise.
161 * disassemble.c: Likewise.
162 * disassemble.h: Likewise.
163 * Makefile.in: Regenerate.
164 * configure: Regenerate.
165 * po/POTFILES.in: Regenerate.
166
caf0678c
L
1672018-04-04 H.J. Lu <hongjiu.lu@intel.com>
168
169 PR binutils/23025
170 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
171 to 0.
172 (print_insn): Clear vex instead of vex.evex.
173
4fb0d2b9
NC
1742018-04-04 Nick Clifton <nickc@redhat.com>
175
176 * po/es.po: Updated Spanish translation.
177
c39e5b26
JB
1782018-03-28 Jan Beulich <jbeulich@suse.com>
179
180 * i386-gen.c (opcode_modifiers): Delete VecESize.
181 * i386-opc.h (VecESize): Delete.
182 (struct i386_opcode_modifier): Delete vecesize.
183 * i386-opc.tbl: Drop VecESize.
184 * i386-tlb.h: Re-generate.
185
8e6e0792
JB
1862018-03-28 Jan Beulich <jbeulich@suse.com>
187
188 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
189 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
190 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
191 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
192 * i386-tlb.h: Re-generate.
193
9f123b91
JB
1942018-03-28 Jan Beulich <jbeulich@suse.com>
195
196 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
197 Fold AVX512 forms
198 * i386-tlb.h: Re-generate.
199
9646c87b
JB
2002018-03-28 Jan Beulich <jbeulich@suse.com>
201
202 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
203 (vex_len_table): Drop Y for vcvt*2si.
204 (putop): Replace plain 'Y' handling by abort().
205
c8d59609
NC
2062018-03-28 Nick Clifton <nickc@redhat.com>
207
208 PR 22988
209 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
210 instructions with only a base address register.
211 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
212 handle AARHC64_OPND_SVE_ADDR_R.
213 (aarch64_print_operand): Likewise.
214 * aarch64-asm-2.c: Regenerate.
215 * aarch64_dis-2.c: Regenerate.
216 * aarch64-opc-2.c: Regenerate.
217
b8c169f3
JB
2182018-03-22 Jan Beulich <jbeulich@suse.com>
219
220 * i386-opc.tbl: Drop VecESize from register only insn forms and
221 memory forms not allowing broadcast.
222 * i386-tlb.h: Re-generate.
223
96bc132a
JB
2242018-03-22 Jan Beulich <jbeulich@suse.com>
225
226 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
227 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
228 sha256*): Drop Disp<N>.
229
9f79e886
JB
2302018-03-22 Jan Beulich <jbeulich@suse.com>
231
232 * i386-dis.c (EbndS, bnd_swap_mode): New.
233 (prefix_table): Use EbndS.
234 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
235 * i386-opc.tbl (bndmov): Move misplaced Load.
236 * i386-tlb.h: Re-generate.
237
d6793fa1
JB
2382018-03-22 Jan Beulich <jbeulich@suse.com>
239
240 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
241 templates allowing memory operands and folded ones for register
242 only flavors.
243 * i386-tlb.h: Re-generate.
244
f7768225
JB
2452018-03-22 Jan Beulich <jbeulich@suse.com>
246
247 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
248 256-bit templates. Drop redundant leftover Disp<N>.
249 * i386-tlb.h: Re-generate.
250
0e35537d
JW
2512018-03-14 Kito Cheng <kito.cheng@gmail.com>
252
253 * riscv-opc.c (riscv_insn_types): New.
254
b4a3689a
NC
2552018-03-13 Nick Clifton <nickc@redhat.com>
256
257 * po/pt_BR.po: Updated Brazilian Portuguese translation.
258
d3d50934
L
2592018-03-08 H.J. Lu <hongjiu.lu@intel.com>
260
261 * i386-opc.tbl: Add Optimize to clr.
262 * i386-tbl.h: Regenerated.
263
bd5dea88
L
2642018-03-08 H.J. Lu <hongjiu.lu@intel.com>
265
266 * i386-gen.c (opcode_modifiers): Remove OldGcc.
267 * i386-opc.h (OldGcc): Removed.
268 (i386_opcode_modifier): Remove oldgcc.
269 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
270 instructions for old (<= 2.8.1) versions of gcc.
271 * i386-tbl.h: Regenerated.
272
e771e7c9
JB
2732018-03-08 Jan Beulich <jbeulich@suse.com>
274
275 * i386-opc.h (EVEXDYN): New.
276 * i386-opc.tbl: Fold various AVX512VL templates.
277 * i386-tlb.h: Re-generate.
278
ed438a93
JB
2792018-03-08 Jan Beulich <jbeulich@suse.com>
280
281 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
282 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
283 vpexpandd, vpexpandq): Fold AFX512VF templates.
284 * i386-tlb.h: Re-generate.
285
454172a9
JB
2862018-03-08 Jan Beulich <jbeulich@suse.com>
287
288 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
289 Fold 128- and 256-bit VEX-encoded templates.
290 * i386-tlb.h: Re-generate.
291
36824150
JB
2922018-03-08 Jan Beulich <jbeulich@suse.com>
293
294 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
295 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
296 vpexpandd, vpexpandq): Fold AVX512F templates.
297 * i386-tlb.h: Re-generate.
298
e7f5c0a9
JB
2992018-03-08 Jan Beulich <jbeulich@suse.com>
300
301 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
302 64-bit templates. Drop Disp<N>.
303 * i386-tlb.h: Re-generate.
304
25a4277f
JB
3052018-03-08 Jan Beulich <jbeulich@suse.com>
306
307 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
308 and 256-bit templates.
309 * i386-tlb.h: Re-generate.
310
d2224064
JB
3112018-03-08 Jan Beulich <jbeulich@suse.com>
312
313 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
314 * i386-tlb.h: Re-generate.
315
1b193f0b
JB
3162018-03-08 Jan Beulich <jbeulich@suse.com>
317
318 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
319 Drop NoAVX.
320 * i386-tlb.h: Re-generate.
321
f2f6a710
JB
3222018-03-08 Jan Beulich <jbeulich@suse.com>
323
324 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
325 * i386-tlb.h: Re-generate.
326
38e314eb
JB
3272018-03-08 Jan Beulich <jbeulich@suse.com>
328
329 * i386-gen.c (opcode_modifiers): Delete FloatD.
330 * i386-opc.h (FloatD): Delete.
331 (struct i386_opcode_modifier): Delete floatd.
332 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
333 FloatD by D.
334 * i386-tlb.h: Re-generate.
335
d53e6b98
JB
3362018-03-08 Jan Beulich <jbeulich@suse.com>
337
338 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
339
2907c2f5
JB
3402018-03-08 Jan Beulich <jbeulich@suse.com>
341
342 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
343 * i386-tlb.h: Re-generate.
344
73053c1f
JB
3452018-03-08 Jan Beulich <jbeulich@suse.com>
346
347 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
348 forms.
349 * i386-tlb.h: Re-generate.
350
52fe4420
AM
3512018-03-07 Alan Modra <amodra@gmail.com>
352
353 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
354 bfd_arch_rs6000.
355 * disassemble.h (print_insn_rs6000): Delete.
356 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
357 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
358 (print_insn_rs6000): Delete.
359
a6743a54
AM
3602018-03-03 Alan Modra <amodra@gmail.com>
361
362 * sysdep.h (opcodes_error_handler): Define.
363 (_bfd_error_handler): Declare.
364 * Makefile.am: Remove stray #.
365 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
366 EDIT" comment.
367 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
368 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
369 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
370 opcodes_error_handler to print errors. Standardize error messages.
371 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
372 and include opintl.h.
373 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
374 * i386-gen.c: Standardize error messages.
375 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
376 * Makefile.in: Regenerate.
377 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
378 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
379 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
380 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
381 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
382 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
383 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
384 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
385 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
386 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
387 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
388 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
389 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
390
8305403a
L
3912018-03-01 H.J. Lu <hongjiu.lu@intel.com>
392
393 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
394 vpsub[bwdq] instructions.
395 * i386-tbl.h: Regenerated.
396
e184813f
AM
3972018-03-01 Alan Modra <amodra@gmail.com>
398
399 * configure.ac (ALL_LINGUAS): Sort.
400 * configure: Regenerate.
401
5b616bef
TP
4022018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
403
404 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
405 macro by assignements.
406
b6f8c7c4
L
4072018-02-27 H.J. Lu <hongjiu.lu@intel.com>
408
409 PR gas/22871
410 * i386-gen.c (opcode_modifiers): Add Optimize.
411 * i386-opc.h (Optimize): New enum.
412 (i386_opcode_modifier): Add optimize.
413 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
414 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
415 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
416 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
417 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
418 vpxord and vpxorq.
419 * i386-tbl.h: Regenerated.
420
e95b887f
AM
4212018-02-26 Alan Modra <amodra@gmail.com>
422
423 * crx-dis.c (getregliststring): Allocate a large enough buffer
424 to silence false positive gcc8 warning.
425
0bccfb29
JW
4262018-02-22 Shea Levy <shea@shealevy.com>
427
428 * disassemble.c (ARCH_riscv): Define if ARCH_all.
429
6b6b6807
L
4302018-02-22 H.J. Lu <hongjiu.lu@intel.com>
431
432 * i386-opc.tbl: Add {rex},
433 * i386-tbl.h: Regenerated.
434
75f31665
MR
4352018-02-20 Maciej W. Rozycki <macro@mips.com>
436
437 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
438 (mips16_opcodes): Replace `M' with `m' for "restore".
439
e207bc53
TP
4402018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
441
442 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
443
87993319
MR
4442018-02-13 Maciej W. Rozycki <macro@mips.com>
445
446 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
447 variable to `function_index'.
448
68d20676
NC
4492018-02-13 Nick Clifton <nickc@redhat.com>
450
451 PR 22823
452 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
453 about truncation of printing.
454
d2159fdc
HW
4552018-02-12 Henry Wong <henry@stuffedcow.net>
456
457 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
458
f174ef9f
NC
4592018-02-05 Nick Clifton <nickc@redhat.com>
460
461 * po/pt_BR.po: Updated Brazilian Portuguese translation.
462
be3a8dca
IT
4632018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
464
465 * i386-dis.c (enum): Add pconfig.
466 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
467 (cpu_flags): Add CpuPCONFIG.
468 * i386-opc.h (enum): Add CpuPCONFIG.
469 (i386_cpu_flags): Add cpupconfig.
470 * i386-opc.tbl: Add PCONFIG instruction.
471 * i386-init.h: Regenerate.
472 * i386-tbl.h: Likewise.
473
3233d7d0
IT
4742018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
475
476 * i386-dis.c (enum): Add PREFIX_0F09.
477 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
478 (cpu_flags): Add CpuWBNOINVD.
479 * i386-opc.h (enum): Add CpuWBNOINVD.
480 (i386_cpu_flags): Add cpuwbnoinvd.
481 * i386-opc.tbl: Add WBNOINVD instruction.
482 * i386-init.h: Regenerate.
483 * i386-tbl.h: Likewise.
484
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4852018-01-17 Jim Wilson <jimw@sifive.com>
486
487 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
488
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4892018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
490
491 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
492 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
493 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
494 (cpu_flags): Add CpuIBT, CpuSHSTK.
495 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
496 (i386_cpu_flags): Add cpuibt, cpushstk.
497 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
498 * i386-init.h: Regenerate.
499 * i386-tbl.h: Likewise.
500
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5012018-01-16 Nick Clifton <nickc@redhat.com>
502
503 * po/pt_BR.po: Updated Brazilian Portugese translation.
504 * po/de.po: Updated German translation.
505
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5062018-01-15 Jim Wilson <jimw@sifive.com>
507
508 * riscv-opc.c (match_c_nop): New.
509 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
510
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5112018-01-15 Nick Clifton <nickc@redhat.com>
512
513 * po/uk.po: Updated Ukranian translation.
514
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5152018-01-13 Nick Clifton <nickc@redhat.com>
516
517 * po/opcodes.pot: Regenerated.
518
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5192018-01-13 Nick Clifton <nickc@redhat.com>
520
521 * configure: Regenerate.
522
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5232018-01-13 Nick Clifton <nickc@redhat.com>
524
525 2.30 branch created.
526
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5272018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
528
529 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
530 * i386-tbl.h: Regenerate.
531
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5322018-01-10 Jan Beulich <jbeulich@suse.com>
533
534 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
535 * i386-tbl.h: Re-generate.
536
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JB
5372018-01-10 Jan Beulich <jbeulich@suse.com>
538
539 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
540 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
541 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
542 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
543 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
544 Disp8MemShift of AVX512VL forms.
545 * i386-tbl.h: Re-generate.
546
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5472018-01-09 Jim Wilson <jimw@sifive.com>
548
549 * riscv-dis.c (maybe_print_address): If base_reg is zero,
550 then the hi_addr value is zero.
551
91d8b670
JG
5522018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
553
554 * arm-dis.c (arm_opcodes): Add csdb.
555 (thumb32_opcodes): Add csdb.
556
be2e7d95
JG
5572018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
558
559 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
560 * aarch64-asm-2.c: Regenerate.
561 * aarch64-dis-2.c: Regenerate.
562 * aarch64-opc-2.c: Regenerate.
563
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L
5642018-01-08 H.J. Lu <hongjiu.lu@intel.com>
565
566 PR gas/22681
567 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
568 Remove AVX512 vmovd with 64-bit operands.
569 * i386-tbl.h: Regenerated.
570
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JW
5712018-01-05 Jim Wilson <jimw@sifive.com>
572
573 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
574 jalr.
575
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5762018-01-03 Alan Modra <amodra@gmail.com>
577
578 Update year range in copyright notice of all files.
579
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5802018-01-02 Jan Beulich <jbeulich@suse.com>
581
582 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
583 and OPERAND_TYPE_REGZMM entries.
584
1e563868 585For older changes see ChangeLog-2017
3499769a 586\f
1e563868 587Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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588
589Copying and distribution of this file, with or without modification,
590are permitted in any medium without royalty provided the copyright
591notice and this notice are preserved.
592
593Local Variables:
594mode: change-log
595left-margin: 8
596fill-column: 74
597version-control: never
598End:
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